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    Method of manufacturing build-up printed circuit board
    24.
    发明授权
    Method of manufacturing build-up printed circuit board 失效
    制造印刷电路板的方法

    公开(公告)号：US07707716B2

    公开(公告)日：2010-05-04

    申请号：US11709215

    申请日：2007-02-22

    Applicant: Jong Seok Song ,  Taehoon Kim ,  Dong Sun Kim ,  Hye Yeon Cha

    Inventor： Jong Seok Song ,  Taehoon Kim ,  Dong Sun Kim ,  Hye Yeon Cha

    IPC: H01K3/10

    CPC classification number: H05K3/381 ,  H05K3/108 ,  H05K3/146 ,  H05K3/4069 ,  H05K3/426 ,  H05K3/4602 ,  H05K2201/0959 ,  H05K2203/092 ,  H05K2203/1152 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: A method of manufacturing a build-up printed circuit board, in which the circuit of a build-up printed circuit board including a core layer and an outer layer is realized by forming the metal seed layer of the core layer using a dry process, consisting of ion beam surface treatment and vacuum deposition, instead of a conventional wet process, including a wet surface roughening process and electroless plating. When the wet process is replaced with the dry process in the method of the invention, the circuit layer can be formed in an environmentally friendly manner, and as well, all circuit layers of the substrate including the core layer and the outer layer can be manufactured through a semi-additive process. Further, the peel strength between the resin substrate and the metal layer can be increased, thus realizing a highly reliable fine circuit.

    Abstract translation: 一种积层印刷电路板的制造方法，其中通过使用干法形成芯层的金属种子层来实现包括芯层和外层的积层印刷电路板的电路，其包括 的离子束表面处理和真空沉积，而不是常规的湿法，包括湿表面粗糙化处理和无电镀。 当在本发明的方法中用干法代替湿法时，电路层可以以环境友好的方式形成，并且可以制造包括芯层和外层的基片的所有电路层 通过半加成过程。 此外，可以提高树脂基板和金属层之间的剥离强度，从而实现高可靠性的精细电路。

    Apparatus for dry-surface cleaning using a laser
    25.
    发明申请
    Apparatus for dry-surface cleaning using a laser 审中-公开
    使用激光干燥表面清洁的设备

    公开(公告)号：US20060108330A1

    公开(公告)日：2006-05-25

    申请号：US11194445

    申请日：2005-08-02

    Applicant: Jong-Myoung Lee ,  Taehoon Kim

    Inventor： Jong-Myoung Lee ,  Taehoon Kim

    IPC: B23K26/00

    CPC classification number: C21D10/005 ,  B08B7/0042

    Abstract: A dry-surface cleaning apparatus includes a laser for generating laser beams, a focus lens for generating a plasma shock wave around a laser focus by converging the laser beams into the laser focus around a workpiece to be cleaned, wherein contaminants on the workpiece are removed by colliding the plasma shock wave against the workpiece, and a thermal radiation protector for avoiding a surface damage on the workpiece induced by a plasma thermal radiation entailed by the generation of the plasma shock wave. The thermal radiation protector is installed between the laser focus and the workpiece and is extended toward a downstream of the laser focus to a position where a portion of remaining laser beam when generating the plasma shock wave reaches in order to reflect the remaining laser beam.

    Abstract translation: 干式表面清洁装置包括用于产生激光束的激光器，聚焦透镜，用于通过将激光束聚焦在待清洁的工件周围的激光焦点中来产生激光焦点周围的等离子体冲击波，其中去除工件上的污染物 通过使等离子体冲击波与工件相撞，以及热辐射保护器，用于避免由等离子体冲击波的产生所引起的等离子体热辐射引起的对工件的表面损伤。 热辐射保护器安装在激光焦点和工件之间，并且朝向激光焦点的下游延伸到当产生等离子体冲击波时剩余激光束的一部分到达以便反射剩余的激光束的位置。

    Sigma-delta analog-to-digital converter using mixed-mode integrator
    26.
    发明授权
    Sigma-delta analog-to-digital converter using mixed-mode integrator 失效
    使用混合模式积分器的Sigma-delta模数转换器

    公开(公告)号：US06424279B1

    公开(公告)日：2002-07-23

    申请号：US09598625

    申请日：2000-06-21

    Applicant: Beomsup Kim ,  Taehoon Kim

    Inventor： Beomsup Kim ,  Taehoon Kim

    IPC: H03M300

    CPC classification number: H03M3/362 ,  H03M3/428 ,  H03M3/454

    Abstract: The present invention relates to a sigma-delta analog-to-digital converter using a mixed mode integrator composed of an analog integrator and a digital integrator, which can prevent the performance degradation due to the saturation of an integrator of the overload of a quantizer. A sigma-delta analog-to-digital converter having an anti-aliasing filter, a sample and hold circuit, a sigma-delta modulator and a decimation filter comprises an overload estimating unit for judging the saturation or overload of an analog integrator; a mixed mode integrator which has the analog integrator and a digital integrator composed of a digital adder and a digital storing unit and integrates the output of the overload estimating unit in analog or digitally; and a quantization unit for converting the output of the mixed mode integrator to a digital signal.

    Abstract translation: 本发明涉及一种使用由模拟积分器和数字积分器组成的混合模式积分器的Σ-Δ模数转换器，其可以防止由于量化器的过载的积分器的饱和引起的性能劣化。 具有抗混叠滤波器，采样和保持电路，Σ-Δ调制器和抽取滤波器的Σ-Δ模数转换器包括用于判断模拟积分器的饱和或过载的过载估计单元; 具有模拟积分器的混合模式积分器和由数字加法器和数字存储单元组成的数字积分器，并且以模拟或数字方式对过载估计单元的输出进行积分; 以及用于将混合模式积分器的输出转换为数字信号的量化单元。

    Multiple level program verify in a memory device
    28.
    发明授权
    Multiple level program verify in a memory device 有权
    在存储设备中进行多级程序验证

    公开(公告)号：US08223555B2

    公开(公告)日：2012-07-17

    申请号：US12436955

    申请日：2009-05-07

    Applicant: Taehoon Kim ,  Deping He ,  Jeffrey Alan Kessenich

    Inventor： Taehoon Kim ,  Deping He ,  Jeffrey Alan Kessenich

    IPC: G11C11/34

    CPC classification number: G11C11/5628 ,  G11C16/3454 ,  G11C16/3459 ,  G11C2211/5621

    Abstract: Methods for multiple level program verify, memory devices, and memory systems are provided. In one such method, a series of programming pulses are applied to a memory cell to be programmed. A program verify pulse, at an initial program verify voltage, is applied to the memory cell after each programming pulse. The initial program verify voltage is a verify voltage that has been increased by a quick charge loss voltage. The quick charge loss voltage is subtracted from the initial program verify voltage after either a programming pulse has reached a certain reference voltage or a quantity of programming pulses has reached a pulse count threshold.

    Abstract translation: 提供了多级程序验证，存储器件和存储器系统的方法。 在一种这样的方法中，一系列编程脉冲被施加到待编程的存储器单元。 在每个编程脉冲之后，在初始程序验证电压下将程序验证脉冲施加到存储单元。 初始程序验证电压是通过快速充电损耗电压增加的验证电压。 在编程脉冲达到某个参考电压或编程脉冲数达到脉冲计数阈值之后，从初始编程验证电压中减去快速充电损耗电压。

    LIGHTING SYSTEM AND METHOD FOR CONTROLLING THE SAME
    30.
    发明申请
    LIGHTING SYSTEM AND METHOD FOR CONTROLLING THE SAME 有权
    照明系统及其控制方法

    公开(公告)号：US20120098445A1

    公开(公告)日：2012-04-26

    申请号：US13340209

    申请日：2011-12-29

    Applicant: Heegu PARK ,  Taehoon Kim ,  Junwan Bang

    Inventor： Heegu PARK ,  Taehoon Kim ,  Junwan Bang

    IPC: H05B37/02

    CPC classification number: H05B37/0272

    Abstract: A lighting system which automatically assigns a unique address to each lighting device and controls each lighting device assigned the unique address is disclosed. The lighting system may include a plurality of lighting apparatuses, at least one bridge coupled to the plurality of lighting apparatuses, and a lighting controller coupled to the at least one bridge for controlling the lighting apparatuses. One of the at least one bridge or the controller may generate address data for assigning an address to one of the plurality of lighting apparatuses. The plurality of lighting apparatuses may include an LED module, a connection circuit configured to control a connection between the at least one bridge and the plurality of lighting apparatuses, and a controller configured to control the connection circuit based on the address.

    Abstract translation: 公开了一种自动为每个照明装置分配唯一地址并控制分配了唯一地址的每个照明装置的照明系统。 照明系统可以包括多个照明设备，耦合到多个照明设备的至少一个桥接器，以及耦合到至少一个桥接器用于控制照明设备的照明控制器。 至少一个桥接器或控制器中的一个可以产生用于将地址分配给多个照明设备中的一个的地址数据。 所述多个照明装置可以包括LED模块，被配置为控制所述至少一个桥与所述多个照明装置之间的连接的连接电路，以及被配置为基于所述地址来控制所述连接电路的控制器。

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