公开(公告)号：US07794820B2

公开(公告)日：2010-09-14

申请号：US11878165

申请日：2007-07-20

申请人： Dong Sun Kim ,  Taehoon Kim ,  Jong Seok Song ,  Sam Jin Her ,  Jun Heyoung Park

发明人： Dong Sun Kim ,  Taehoon Kim ,  Jong Seok Song ,  Sam Jin Her ,  Jun Heyoung Park

IPC分类号： B32B15/00

CPC分类号： H05K3/381 ,  H05K1/0346 ,  H05K3/108 ,  H05K3/146 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/092 ,  Y10S428/901 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/24917

摘要： Disclosed herein are a printed circuit board and a fabrication method thereof, which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The printed circuit board includes an insulating material; a via-hole formed in a given location of the insulating material; a copper seed layer formed through ion beam surface treatment and vacuum deposition on the surface of the insulating material having the via-hole formed therein; and a copper pattern plating layer formed on a given region of the insulating material, which has the copper seed layer formed thereon, and in the via-hole.

摘要翻译： 这里公开了一种印刷电路板及其制造方法，其可以通过实现超薄精细电路图案来改善电性能，缩短处理时间并减小芯片封装的厚度。 印刷电路板包括绝缘材料; 形成在绝缘材料的给定位置的通孔; 通过离子束表面处理形成的铜籽晶层，并且在其中形成有通孔的绝缘材料的表面上真空沉积; 以及形成在其上形成有铜种子层的绝缘材料的给定区域上的铜图案镀层和通孔。

公开(公告)号：US08065798B2

公开(公告)日：2011-11-29

申请号：US12805293

申请日：2010-07-22

申请人： Dong Sun Kim ,  Taehoon Kim ,  Jong Seok Song ,  Sam Jin Her ,  Jun Heyoung Park

发明人： Dong Sun Kim ,  Taehoon Kim ,  Jong Seok Song ,  Sam Jin Her ,  Jun Heyoung Park

IPC分类号： H01K13/00 ,  H01B13/00

CPC分类号： H05K3/381 ,  H05K1/0346 ,  H05K3/108 ,  H05K3/146 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/092 ,  Y10S428/901 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/24917

摘要： A fabrication method which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The method for fabricating a printed circuit board includes: providing an insulating material; forming in the insulating material at least one via-hole for interlayer electrical connection; ion beam treating the surface of the insulating material having the via-hole formed therein; forming a copper seed layer on the surface-treated insulating material using a vacuum deposition process; and plating a copper pattern on the copper seed layer to form a circuit pattern.

公开(公告)号：US20110099807A1

公开(公告)日：2011-05-05

申请号：US12805293

申请日：2010-07-22

申请人： Dong Sun Kim ,  Taehoon Kim ,  Jong Seok Song ,  Sam Jin Her ,  Jun Heyoung Park

发明人： Dong Sun Kim ,  Taehoon Kim ,  Jong Seok Song ,  Sam Jin Her ,  Jun Heyoung Park

IPC分类号： H05K3/10 ,  H05K3/42

CPC分类号： H05K3/381 ,  H05K1/0346 ,  H05K3/108 ,  H05K3/146 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/092 ,  Y10S428/901 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/24917

摘要： A fabrication method which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The method for fabricating a printed circuit board includes: providing an insulating material; forming in the insulating material at least one via-hole for interlayer electrical connection; ion beam treating the surface of the insulating material having the via-hole formed therein; forming a copper seed layer on the surface-treated insulating material using a vacuum deposition process; and plating a copper pattern on the copper seed layer to form a circuit pattern.

摘要翻译： 通过实现超薄精细电路图案，能够提高电性能，缩短加工时间，减小芯片封装的厚度的制造方法。 制造印刷电路板的方法包括：提供绝缘材料; 在所述绝缘材料中形成至少一个用于层间电连接的通孔; 离子束处理其中形成有通孔的绝缘材料的表面; 使用真空沉积工艺在表面处理的绝缘材料上形成铜种子层; 并在铜籽晶层上镀铜图案以形成电路图案。

公开(公告)号：US20080307641A1

公开(公告)日：2008-12-18

申请号：US12005353

申请日：2007-12-27

申请人： Jee Soo Mok ,  Jun Heyoung Park ,  Ki Hwan Kim ,  Sung Yong Kim ,  Sang Hyun Park

发明人： Jee Soo Mok ,  Jun Heyoung Park ,  Ki Hwan Kim ,  Sung Yong Kim ,  Sang Hyun Park

IPC分类号： H05K3/00

CPC分类号： H05K3/4069 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2203/0139 ,  H05K2203/0278 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49222 ,  Y10T29/53243

摘要： This invention relates to a method of fabricating a paste bump for a printed circuit board, which can decrease the number of printings to thus reduce the fabrication cost and process time in the formation of the paste bump on the printed circuit board.

摘要翻译： 本发明涉及制造用于印刷电路板的膏状凸块的方法，其可以减少打印数量，从而降低在印刷电路板上形成糊状凸块的制造成本和处理时间。

公开(公告)号：US20090294956A1

公开(公告)日：2009-12-03

申请号：US12219442

申请日：2008-07-22

申请人： Eung Suek Lee ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Jun Oh Hwang ,  Jun Heyoung Park ,  Jee Soo Mok

发明人： Eung Suek Lee ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Jun Oh Hwang ,  Jun Heyoung Park ,  Jee Soo Mok

IPC分类号： H01L23/467 ,  F28F7/00 ,  H01L21/58 ,  B21D53/02

CPC分类号： H01L23/373 ,  B82Y30/00 ,  C04B35/80 ,  C04B2235/3217 ,  C04B2235/3418 ,  C04B2235/407 ,  C04B2235/408 ,  C04B2235/5288 ,  F28F3/02 ,  F28F21/02 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/3025 ,  Y10T29/49002 ,  Y10T29/4935 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed herein is a cooling fin, which is excellent in cooling performance and is simply manufactured, a package substrate comprising the cooling fin, and a manufacturing method thereof. Fireable paste containing a carbon component is applied into grooves of a mold, thus forming a cooling fin having a pattern corresponding to the grooves. Thus, it enables the production of cooling fins having various configurations, thus improving a cooling performance of a package substrate incorporating the cooling fin.

摘要翻译： 本发明公开了一种冷却翅片，其冷却性能优良，制造简单，包括冷却翅片的封装基板及其制造方法。 含有碳成分的可燃糊剂被施加到模具的凹槽中，从而形成具有对应于凹槽的图案的冷却翅片。 因此，能够制造具有各种构造的散热片，从而提高包含冷却片的封装基板的冷却性能。

公开(公告)号：US20080296055A1

公开(公告)日：2008-12-04

申请号：US12073712

申请日：2008-03-07

申请人： Jee Soo Mok ,  Jun Heyoung Park

发明人： Jee Soo Mok ,  Jun Heyoung Park

IPC分类号： H05K1/11 ,  H05K3/02

CPC分类号： H05K3/4069 ,  H05K3/107 ,  H05K3/386 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2203/0278 ,  H05K2203/1461 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49163 ,  Y10T156/109

摘要： This invention relates to a printed circuit board and a method of fabricating the same, in which the thickness of a circuit pattern is decreased to thus realize a fine circuit, the circuit pattern is embedded in an insulating layer to thus decrease the thickness of a printed circuit board, and the time and cost required for the process of fabricating a printed circuit board are decreased.

摘要翻译： 印刷电路板及其制造方法技术领域本发明涉及一种印刷电路板及其制造方法，其中电路图案的厚度减小，从而实现精细电路，电路图案嵌入在绝缘层中，从而减小了印刷电路板的厚度 电路板，并且制造印刷电路板的过程所需的时间和成本降低。

公开(公告)号：US08377748B2

公开(公告)日：2013-02-19

申请号：US13137669

申请日：2011-09-01

申请人： Eung Suek Lee ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Jun Oh Hwang ,  Jun Heyoung Park ,  Jee Soo Mok

发明人： Eung Suek Lee ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Jun Oh Hwang ,  Jun Heyoung Park ,  Jee Soo Mok

IPC分类号： H01L23/467

CPC分类号： H01L23/373 ,  B82Y30/00 ,  C04B35/80 ,  C04B2235/3217 ,  C04B2235/3418 ,  C04B2235/407 ,  C04B2235/408 ,  C04B2235/5288 ,  F28F3/02 ,  F28F21/02 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/3025 ,  Y10T29/49002 ,  Y10T29/4935 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacturing a cooling fin and package substrate that includes preparing a mold, which has a support base and a resin layer formed on the support base and including on a side thereof a groove, which is configured to form a cooling fin; printing fireable paste containing a carbon component on a side of the mold that has the groove configured to form a cooling fin; removing the support base to leave a cooling object; and firing the cooling object.

摘要翻译： 一种冷却翅片和封装基板的制造方法，其特征在于，包括：准备模具，所述模具具有支撑基体和树脂层，所述支撑基部和树脂层形成在所述支撑基部上，并且在其一侧包括凹槽，所述凹槽被构造成形成冷却翅片; 在所述模具的侧面上印刷含有碳成分的可燃性糊料，所述成型体具有形成冷却翅片的所述凹槽; 移除支撑底座以留下冷却物体; 并发射冷却对象。

公开(公告)号：US07841074B2

公开(公告)日：2010-11-30

申请号：US12005353

申请日：2007-12-27

申请人： Jee Soo Mok ,  Jun Heyoung Park ,  Ki Hwan Kim ,  Sung Yong Kim ,  Sang Hyun Park

发明人： Jee Soo Mok ,  Jun Heyoung Park ,  Ki Hwan Kim ,  Sung Yong Kim ,  Sang Hyun Park

IPC分类号： H01R43/00

CPC分类号： H05K3/4069 ,  H05K3/4614 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2203/0139 ,  H05K2203/0278 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49222 ,  Y10T29/53243

摘要： A method of fabricating a paste bump for a printed circuit board, provides preparing a base plate; printing a conductive paste on the base plate and drying the conductive paste on the base plate, thus forming a first paste bump; flattening an upper surface of the first paste bump through coining; and printing a conductive paste on the first paste bump and drying the conductive paste on the first bump, thus forming a second paste bump, wherein the printing a conductive paste on the base plate and drying the conductive paste on the base plate includes placing a first mask having a hole having a first size on the base plate; applying a conductive paste on the first mask, and pressing the conductive paste using a squeegee; filling the hole having a first size in the first mask with the conductive paste, and sticking a bottom of the conductive paste to the base plate; and removing the first mask and drying the conductive paste, thus forming the first paste bump.

摘要翻译： 一种制造印刷电路板用焊膏凸块的方法，提供制备基板; 在基板上印刷导电膏并干燥基板上的导电膏，从而形成第一浆料凸块; 通过压印使第一糊状凸块的上表面变平; 以及在所述第一贴片凸块上印刷导电膏并干燥所述第一凸点上的导电膏，从而形成第二膏凸，其中在所述基板上印刷导电膏并干燥所述基板上的导电膏包括： 掩模，在基板上具有第一尺寸的孔; 在第一掩模上施加导电膏，并使用刮板压接导电膏; 在第一掩模中用导电膏填充具有第一尺寸的孔，并将导电糊的底部粘贴到基板上; 并且去除第一掩模并干燥导电膏，从而形成第一浆料凸块。

公开(公告)号：US08161634B2

公开(公告)日：2012-04-24

申请号：US12073712

申请日：2008-03-07

申请人： Jee Soo Mok ,  Jun Heyoung Park

发明人： Jee Soo Mok ,  Jun Heyoung Park

IPC分类号： H01K3/22

CPC分类号： H05K3/4069 ,  H05K3/107 ,  H05K3/386 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2203/0278 ,  H05K2203/1461 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49163 ,  Y10T156/109

摘要： A method of fabricating a printed circuit, which involves forming a bump on a first metal layer; laminating an insulating layer on the bump so that the bumps passes through the insulating layer; placing a second metal layer on the insulating layer and then conducting heating and pressing, thus laminating the second metal layer on the insulating layer; etching the first metal layer and the second metal layer, thus forming circuit patterns on both surfaces of the insulating layer; and heating and pressing both surfaces of the insulating layer, thus embedding the circuit patterns in the insulating layer, such that the circuit pattern is embedded in an insulating layer to decrease the thickness of a printed circuit board, and the time and cost required for the process of fabricating a printed circuit board are decreased.

摘要翻译： 一种制造印刷电路的方法，其包括在第一金属层上形成凸块; 在凸块上层叠绝缘层，使得凸块穿过绝缘层; 在绝缘层上放置第二金属层，然后进行加热和加压，从而将第二金属层层压在绝缘层上; 蚀刻第一金属层和第二金属层，从而在绝缘层的两个表面上形成电路图案; 并且对绝缘层的两个表面进行加热和加压，从而将电路图案嵌入绝缘层中，使得电路图案嵌入绝缘层中以减小印刷电路板的厚度，并且所需的时间和成本 制造印刷电路板的工艺减少。

公开(公告)号：US20120080401A1

公开(公告)日：2012-04-05

申请号：US13316909

申请日：2011-12-12

申请人： Jee Soo MOK ,  Jun Heyoung Park ,  Ki Hwan Kim ,  Sung Yong Kim

发明人： Jee Soo MOK ,  Jun Heyoung Park ,  Ki Hwan Kim ,  Sung Yong Kim

IPC分类号： H05K3/06

CPC分类号： H05K3/462 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4647 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2201/096

摘要： A method of fabricating a multilayer printed circuit board includes preparing a first substrate, and preparing a second substrate, in parallel to the formation of the first substrate, that is, at the same time of the formation of the first substrate, by forming a third inner circuit pattern on one surface of a third insulating layer and forming a window on the other surface of the third insulating layer.

摘要翻译： 一种制造多层印刷电路板的方法包括：制备第一衬底并制备第二衬底，与第一衬底的形成平行，即形成第一衬底的同时，通过形成第三衬底 在第三绝缘层的一个表面上形成内部电路图案，并在第三绝缘层的另一个表面上形成窗口。