Method of manufacturing build-up printed circuit board
    4.
    发明申请
    Method of manufacturing build-up printed circuit board 失效
    制造印刷电路板的方法

    公开(公告)号:US20070261234A1

    公开(公告)日:2007-11-15

    申请号:US11709215

    申请日:2007-02-22

    IPC分类号: H01K3/10 H05K3/10 H05K3/02

    摘要: Disclosed is a method of manufacturing a build-up printed circuit board, in which the circuit of a build-up printed circuit board including a core layer and an outer layer is realized by forming the metal seed layer of the core layer using a dry process, consisting of ion beam surface treatment and vacuum deposition, instead of a conventional wet process, including a wet surface roughening process and electroless plating. When the wet process is replaced with the dry process in the method of the invention, the circuit layer can be formed in an environmentally friendly manner, and as well, all circuit layers of the substrate including the core layer and the outer layer can be manufactured through a semi-additive process. Further, the peel strength between the resin substrate and the metal layer can be increased, thus realizing a highly reliable fine circuit.

    摘要翻译: 公开了一种积层印刷电路板的制造方法,其中通过使用干法形成芯层的金属种子层来实现包括芯层和外层的积层印刷电路板的电路 ,由离子束表面处理和真空沉积组成,代替常规的湿法,包括湿表面粗糙化处理和无电镀。 当在本发明的方法中用干法代替湿法时,电路层可以以环境友好的方式形成,并且可以制造包括芯层和外层的基片的所有电路层 通过半加成过程。 此外,可以提高树脂基板和金属层之间的剥离强度,从而实现高可靠性的精细电路。

    Method of manufacturing build-up printed circuit board
    5.
    发明授权
    Method of manufacturing build-up printed circuit board 失效
    制造印刷电路板的方法

    公开(公告)号:US07707716B2

    公开(公告)日:2010-05-04

    申请号:US11709215

    申请日:2007-02-22

    IPC分类号: H01K3/10

    摘要: A method of manufacturing a build-up printed circuit board, in which the circuit of a build-up printed circuit board including a core layer and an outer layer is realized by forming the metal seed layer of the core layer using a dry process, consisting of ion beam surface treatment and vacuum deposition, instead of a conventional wet process, including a wet surface roughening process and electroless plating. When the wet process is replaced with the dry process in the method of the invention, the circuit layer can be formed in an environmentally friendly manner, and as well, all circuit layers of the substrate including the core layer and the outer layer can be manufactured through a semi-additive process. Further, the peel strength between the resin substrate and the metal layer can be increased, thus realizing a highly reliable fine circuit.

    摘要翻译: 一种积层印刷电路板的制造方法,其中通过使用干法形成芯层的金属种子层来实现包括芯层和外层的积层印刷电路板的电路,其包括 的离子束表面处理和真空沉积,而不是常规的湿法,包括湿表面粗糙化处理和无电镀。 当在本发明的方法中用干法代替湿法时,电路层可以以环境友好的方式形成,并且可以制造包括芯层和外层的基片的所有电路层 通过半加成过程。 此外,可以提高树脂基板和金属层之间的剥离强度,从而实现高可靠性的精细电路。

    CALIBRATION SYSTEM FOR STEREO CAMERA AND CALIBRATION APPARATUS FOR CALIBRATING STEREO IMAGE
    6.
    发明申请
    CALIBRATION SYSTEM FOR STEREO CAMERA AND CALIBRATION APPARATUS FOR CALIBRATING STEREO IMAGE 有权
    用于校正立体图像的立体相机和校准装置的校准系统

    公开(公告)号:US20140118501A1

    公开(公告)日:2014-05-01

    申请号:US14116458

    申请日:2011-08-01

    IPC分类号: G06T7/00

    摘要: Disclosed is a calibration system for stereo cameras. The calibration system includes a rig control module configured to, when a camera calibration parameter is input, control an auto rig according to the camera calibration parameter to perform physical calibration for a camera, a stereo image calibration apparatus configured to calibrate a stereo image to acquire the camera calibration parameter, and output the acquired camera calibration parameter, and a camera control module configured to output the camera calibration parameter, which is input from the stereo image calibration apparatus, to the rig control module, or screen-output the camera calibration parameter. Therefore, physical calibration and image processing calibration for a camera are performed in association with each other.

    摘要翻译: 公开了用于立体照相机的校准系统。 所述校准系统包括钻机控制模块,所述钻机控制模块被配置为当输入相机校准参数时,根据所述相机校准参数来控制自动钻机以执行相机的物理校准;立体图像校准装置,被配置为校准立体图像以获取 相机校准参数,并输出所获取的相机校准参数,以及相机控制模块,被配置为将从立体图像校准装置输入的相机校准参数输出到钻机控制模块,或者屏幕输出相机校准参数 。 因此,对相机进行物理校准和图像处理校准。

    Method of fabricating SRAM cell having a field region
    8.
    发明授权
    Method of fabricating SRAM cell having a field region 有权
    制造具有场区域的SRAM单元的方法

    公开(公告)号:US06352888B1

    公开(公告)日:2002-03-05

    申请号:US09478490

    申请日:2000-01-06

    申请人: Dong Sun Kim

    发明人: Dong Sun Kim

    IPC分类号: H01L218234

    摘要: A static random access memory (SRAM) cell includes first and second load devices, first and second access transistors, first and second drive transistors, and two bit lines. The SRAM includes a substrate; an active region in the substrate, the active region being formed in a direction; gate electrodes of the first and second access transistors crossing the active region, the gate electrodes of the first and second access transistors are parallel with each other; gate electrodes of the first and second drive transistors crossing the active region, the gate electrodes of the first and second drive transistors are parallel with each other; and first and second load devices on the gate electrodes of the first and second access transistors, the first and second load devices are parallel with each other.

    摘要翻译: 静态随机存取存储器(SRAM)单元包括第一和第二负载器件,第一和第二存取晶体管,第一和第二驱动晶体管以及两个位线。 SRAM包括基板; 在所述衬底中的有源区,所述有源区沿一个方向形成; 第一和第二存取晶体管的栅电极与有源区交叉,第一和第二存取晶体管的栅电极彼此平行; 第一和第二驱动晶体管的栅电极与有源区交叉,第一和第二驱动晶体管的栅电极彼此平行; 以及在第一和第二存取晶体管的栅电极上的第一和第二负载装置,第一和第二负载装置彼此平行。

    Fabrication method for a capacitor having high capacitance
    9.
    发明授权
    Fabrication method for a capacitor having high capacitance 有权
    具有高电容的电容器的制造方法

    公开(公告)号:US6114213A

    公开(公告)日:2000-09-05

    申请号:US431048

    申请日:1999-11-01

    申请人: Dong Sun Kim

    发明人: Dong Sun Kim

    摘要: A fabrication method for a capacitor having high capacitance that increases capacitance of a capacitor and consequently decreases defective semiconductor devices includes: forming a doped first polysilicon layer pattern on a semiconductor substrate; forming a silicide film pattern on the first polysilicon layer pattern; annealing the semiconductor substrate; sequentially forming a first insulating film and a second insulating film over the silicide film pattern; forming a contact hole to expose a portion of the silicide film pattern and then sequentially placing the semiconductor substrate in an etchant solution and a buffered etchant solution to remove a portion of the first insulating film formed on the silicide film pattern; forming a first capacitor electrode on a portion of an upper surface of the second insulating film pattern and the silicide film pattern, and at inner walls of the contact hole; and forming a dielectric layer on an outer surface of the lower electrode and then a second capacitor electrode.

    摘要翻译: 一种具有高电容的电容器的制造方法,该电容器增加电容器的电容,从而减少有缺陷的半导体器件,包括:在半导体衬底上形成掺杂的第一多晶硅层图案; 在所述第一多晶硅层图案上形成硅化物膜图案; 退火半导体衬底; 在硅化物膜图案上依次形成第一绝缘膜和第二绝缘膜; 形成接触孔以暴露硅化物膜图案的一部分,然后依次将半导体衬底放置在蚀刻溶液和缓冲蚀刻溶液中以去除在硅化物膜图案上形成的第一绝缘膜的一部分; 在第二绝缘膜图案和硅化物膜图案的上表面的一部分上以及在接触孔的内壁处形成第一电容器电极; 以及在所述下电极的外表面上形成电介质层,然后形成第二电容电极。