公开(公告)号：US07384837B2

公开(公告)日：2008-06-10

申请号：US11073185

申请日：2005-03-03

申请人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Jer-shen Maa

发明人： Sheng Teng Hsu ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Jer-shen Maa

IPC分类号： H01L21/8238

CPC分类号： H01L29/1054 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823842 ,  H01L21/823878 ,  H01L27/1203 ,  H01L29/78645

摘要： A dual gate strained-Si MOSFET with thin SiGe dislocation regions and a method for fabricating the same are provided. The method forms a first layer of relaxed SiGe overlying a substrate, having a thickness of less than 5000 Å; forms a second layer of relaxed SiGe overlying the substrate and adjacent to the first layer of SiGe, having a thickness of less than 5000 Å; forms a layer of strained-Si overlying the first and second SiGe layers; forms a shallow trench isolation region interposed between the first SiGe layer and the second SiGe layer; forms an p-well in the substrate and the overlying first layer of SiGe; forming forms a p-well in the substrate and the overlying second layer of SiGe; forms channel regions, in the strained-Si, and forms PMOS and NMOS transistor source and drain regions.

摘要翻译： 提供具有薄SiGe位错区域的双栅应变Si MOSFET及其制造方法。 该方法形成覆盖衬底的第一层松弛SiGe，厚度小于5000; 形成覆盖衬底并且邻近第一SiGe层的第二层松弛SiGe，其厚度小于5000; 形成层叠在第一和第二SiGe层上的应变层; 形成介于第一SiGe层和第二SiGe层之间的浅沟槽隔离区; 在衬底和SiGe的上覆第一层中形成p阱; 在衬底和SiGe的上覆第二层中形成p阱; 在应变Si中形成沟道区，并形成PMOS和NMOS晶体管的源极和漏极区。

公开(公告)号：US07378309B2

公开(公告)日：2008-05-27

申请号：US11376542

申请日：2006-03-15

申请人： Jong-Jan Lee ,  Paul J. Schuele ,  Sheng Teng Hsu ,  Jer-Shen Maa

发明人： Jong-Jan Lee ,  Paul J. Schuele ,  Sheng Teng Hsu ,  Jer-Shen Maa

IPC分类号： H01L21/8234

CPC分类号： H01L21/823871 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/28525 ,  H01L21/76895 ,  H01L27/11 ,  H01L27/1108

摘要： A method of fabricating local interconnect on a silicon-germanium 3D CMOS includes fabricating an active silicon CMOS device on a silicon substrate. An insulator layer is deposited on the silicon substrate and a seed window is opened through the insulator layer to the silicon substrate and to a silicon CMOS device gate. A germanium thin film is deposited on the insulator layer and into windows, forming a contact between the germanium thin film and the silicon device. The germanium thin film is encapsulated in a dielectric material. The wafer is heated at a temperature sufficient to flow the germanium, while maintaining the other layers in a solid condition. The wafer is cooled to solidify the germanium as single crystal germanium and as polycrystalline germanium, which provides local interconnects. Germanium CMOS devices may be fabricated on the single crystal germanium thin film.

摘要翻译： 在硅 - 锗3D CMOS上制造局部互连的方法包括在硅衬底上制造有源硅CMOS器件。 绝缘体层沉积在硅衬底上，并且晶种窗通过绝缘体层向硅衬底和硅CMOS器件栅极打开。 在绝缘体层和窗口上沉积锗薄膜，形成锗薄膜和硅器件之间的接触。 锗薄膜被封装在电介质材料中。 在足以使锗流动的温度下加热晶片，同时将其它层保持在固体状态。 将晶片冷却以将锗固化为单晶锗和作为多晶锗，其提供局部互连。 可以在单晶锗薄膜上制造锗CMOS器件。

公开(公告)号：US20080067499A1

公开(公告)日：2008-03-20

申请号：US11522003

申请日：2006-09-15

申请人： Jer-Shen Maa ,  Jinke Tang ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

发明人： Jer-Shen Maa ,  Jinke Tang ,  Jong-Jan Lee ,  Douglas J. Tweet ,  Sheng Teng Hsu

IPC分类号： H01L29/06 ,  H01L21/00

CPC分类号： H01L31/035254 ,  B82Y20/00 ,  H01L27/14649 ,  H01L31/028 ,  H01L31/101 ,  H01L31/1804 ,  Y02P70/521

摘要： A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

公开(公告)号：US07226504B2

公开(公告)日：2007-06-05

申请号：US10062336

申请日：2002-01-31

申请人： Jer-Shen Maa ,  Douglas James Tweet ,  Tingkai Li ,  Jong-Jan Lee ,  Sheng Teng Hsu

发明人： Jer-Shen Maa ,  Douglas James Tweet ,  Tingkai Li ,  Jong-Jan Lee ,  Sheng Teng Hsu

IPC分类号： C30B33/02

CPC分类号： H01L21/3247 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02694 ,  H01L21/324

摘要： A method of forming a SiGe layer having a relatively high germanium content and a relatively low threading dislocation density includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the germanium content of the SiGe layer is greater than 20%, by atomic ratio; implanting H+ ions into the SiGe layer at a dose of between about 1·1016 cm−2 to 5·1016 cm−2, at an energy of between about 20 keV to 45 keV; patterning the SiGe layer with photoresist; plasma etching the structure to form trenches about regions; removing the photoresist; and thermal annealing the substrate and SiGe layer, to relax the SiGe layer, in an inert atmosphere at a temperature of between about 650° C. to 950° C. for between about 30 seconds and 30 minutes.

摘要翻译： 形成具有较高锗含量和较低穿透位错密度的SiGe层的方法包括制备硅衬底; 将SiGe层沉积至约100nm至500nm的厚度，其中SiGe层的锗含量按原子比大于20％; 将H +离子以约1.10×16cm -2至0.0010±0.2cm的剂量注入SiGe层中， SUP>，在约20keV至45keV之间的能量; 用光致抗蚀剂图案化SiGe层; 等离子体蚀刻结构以形成关于区域的沟槽; 去除光致抗蚀剂; 以及对基板和SiGe层进行热退火，以在惰性气氛中在约650℃至950℃的温度下放置SiGe层约30秒至30分钟。

公开(公告)号：US07176072B2

公开(公告)日：2007-02-13

申请号：US11046411

申请日：2005-01-28

申请人： Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu

发明人： Jong-Jan Lee ,  Jer-Shen Maa ,  Sheng Teng Hsu

IPC分类号： H01L21/84 ,  H01L21/00 ,  H01L21/658

CPC分类号： H01L27/1266 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78687

摘要： A method of fabricating strained silicon devices for transfer to glass for display applications includes preparing a wafer having a silicon substrate thereon; forming a relaxed SiGe layer on the silicon substrate; forming a strained silicon layer on the relaxed SiGe layer; fabricating an IC device on the strained silicon layer; depositing a dielectric layer on the wafer to cover a gate module of the IC device; smoothing the dielectric; implanting ions to form a defect layer; cutting the wafer into individual silicon dies; preparing a glass panel and the silicon dies for bonding; bonding the silicon dies onto the glass panel to form a bonded structure; annealing the bonded structure; splitting the bonded structure along the defect layer; removing the remaining silicon layer from the silicon substrate and relaxed SiGe layer on the silicon die on the glass panel; and completing the glass panel circuitry.

摘要翻译： 制造用于转移到用于显示器应用的玻璃的应变硅器件的方法包括制备其上具有硅衬底的晶片; 在硅衬底上形成松弛的SiGe层; 在松弛的SiGe层上形成应变硅层; 在应变硅层上制造IC器件; 在所述晶片上沉积介电层以覆盖所述IC器件的栅极模块; 平滑电介质; 注入离子以形成缺陷层; 将晶片切割成单独的硅模具; 制备玻璃面板和用于接合的硅模具; 将硅模具接合到玻璃面板上以形成接合结构; 退火键合结构; 沿着缺陷层分离粘结结构; 从硅衬底去除剩余的硅层并在玻璃面板上的硅晶片上松弛SiGe层; 并完成玻璃面板电路。

公开(公告)号：US07129488B2

公开(公告)日：2006-10-31

申请号：US10746952

申请日：2003-12-23

申请人： Jong Jan Lee ,  Jer-Shen Maa ,  Douglas J. Tweet ,  Sheng Teng Hsu

发明人： Jong Jan Lee ,  Jer-Shen Maa ,  Douglas J. Tweet ,  Sheng Teng Hsu

IPC分类号： G01J5/20 ,  G01J5/08

CPC分类号： H01L31/105 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02639 ,  H01L27/14627 ,  H01L27/14643 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/108 ,  H01L31/109 ,  H01L31/1812 ,  Y02E10/547

摘要： A SiGe surface-normal optical path photodetector structure and a method for forming the SiGe optical path normal structure are provided. The method comprises: forming a Si substrate with a surface; forming a Si feature, normal with respect to the Si substrate surface, such as a via, trench, or pillar; depositing SiGe overlying the Si normal feature to a thickness in the range of 5 to 1000 nanometers (nm); and, forming a SiGe optical path normal structure having an optical path length in the range of 0.1 to 10 microns. Typically, the SiGe has a Ge concentration in the range from 5 to 100%. The Ge concentration may be graded to increase with respect to the deposition thickness. For example, the SiGe may have a 20% concentration of Ge at the Si substrate interface, a 30% concentration of Ge at a SiGe film top surface, and a thickness of 400 nm.

摘要翻译： 提供SiGe表面法线光路检测器结构和形成SiGe光路法线结构的方法。 该方法包括：用表面形成Si衬底; 形成Si特征，相对于诸如通孔，沟槽或柱的Si衬底表面是正常的; 将Si覆盖Si正常特征的SiGe沉积到5至1000纳米（nm）范围内的厚度; 并且形成光程长度为0.1〜10微米的SiGe光路法线结构。 通常，SiGe的Ge浓度为5〜100％。 Ge浓度可以相对于沉积厚度而分级增加。 例如，SiGe可以在Si衬底界面处具有20％的Ge浓度，在SiGe膜顶表面上可以具有30％的Ge浓度，并且厚度为400nm。

公开(公告)号：US07037856B1

公开(公告)日：2006-05-02

申请号：US11149883

申请日：2005-06-10

申请人： Jer-Shen Maa ,  Douglas J. Tweet ,  Jong-Jan Lee ,  Sheng Teng Hsu

发明人： Jer-Shen Maa ,  Douglas J. Tweet ,  Jong-Jan Lee ,  Sheng Teng Hsu

IPC分类号： H01L21/31

CPC分类号： H01L21/0262 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/823807

摘要： A method of fabricating a germanium film on a silicon substrate includes preparing a silicon substrate; depositing a first germanium film to form a continuous germanium film on the silicon substrate; annealing the silicon substrate and the germanium film thereon in a first annealing process to relax the germanium film; depositing a second germanium film on the first germanium film to form a germanium layer; patterning and etching the germanium layer; depositing a layer of dielectric material on the germanium layer; cyclic annealing the silicon substrate having the germanium layer and dielectric material thereon; and completing a device containing the silicon substrate and germanium layer.

摘要翻译： 在硅衬底上制造锗膜的方法包括制备硅衬底; 沉积第一锗膜以在硅衬底上形成连续的锗膜; 在第一退火工艺中将硅衬底和锗膜退火以使锗膜松弛; 在第一锗膜上沉积第二锗膜以形成锗层; 图案化和蚀刻锗层; 在锗层上沉积介电材料层; 对其上具有锗层和介电材料的硅衬底进行循环退火; 并完成包含硅衬底和锗层的器件。

公开(公告)号：US06699764B1

公开(公告)日：2004-03-02

申请号：US10238146

申请日：2002-09-09

申请人： Douglas J. Tweet ,  Jer-shen Maa ,  Jong-Jan Lee ,  Sheng Teng Hsu

发明人： Douglas J. Tweet ,  Jer-shen Maa ,  Jong-Jan Lee ,  Sheng Teng Hsu

IPC分类号： H01L21336

CPC分类号： H01L21/263 ,  C30B1/023 ,  C30B1/04 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02694 ,  H01L29/1054 ,  H01L29/165 ,  Y10S438/933

摘要： A method of fabricating a Si1−XGeX film on a silicon substrate includes preparing a silicon substrate; epitaxially depositing a Si1−XGeX layer on the silicon substrate forming a Si1−XGeX/Si interface there between; epitaxially growing a silicon cap on the Si1−XGeX layer; implanting hydrogen ions through the Si1−XGeX layer to a depth of between about 3 nm to 100 nm below the Si1−XGeX/Si interface; amorphizing the Si1−XGeX layer to form an amorphous, graded SiGe layer; and annealing the structure at a temperature of between about 650° C. to 1100° C. for between about ten seconds and sixty minutes to recrystallize the SiGe layer.

摘要翻译： 在硅衬底上制造Si1-XGeX膜的方法包括制备硅衬底; 在硅衬底上外延沉积形成Si1-XGeX / Si界面的Si1-XGeX层; 在Si1-XGeX层上外延生长硅帽; 通过Si1-XGeX层将氢离子注入Si1-XGeX / Si界面以下约3nm至100nm之间的深度; 将Si1-XGeX层非晶化以形成无定形的梯度SiGe层; 并在约650℃至1100℃的温度下对该结构退火约十秒至六十分钟以使SiGe层重结晶。

公开(公告)号：US06537361B2

公开(公告)日：2003-03-25

申请号：US09822637

申请日：2001-03-30

申请人： Wei-Wei Zhuang ,  Fengyan Zhang ,  Jer-Shen Maa ,  Sheng Teng Hsu

发明人： Wei-Wei Zhuang ,  Fengyan Zhang ,  Jer-Shen Maa ,  Sheng Teng Hsu

IPC分类号： H01L2122

CPC分类号： H01L21/02197 ,  C01G21/00 ,  C01P2002/86 ,  H01L21/02112 ,  H01L21/02175 ,  H01L21/02282 ,  H01L21/31604 ,  H01L21/31691

摘要： A method of synthesizing a PGO spin-coating precursor solution includes utilizing the starting materials of lead acetate trihydrate (Pb(OAc)2•3H2O) and germanium alkoxide (Ge(OR)4(R=C2H5 and CH(CH3)2)). The organic solvent is di(ethylene glycol) ethyl ether. The mixed solution of lead and di(ethylene glycol) ethyl ether is heated in an atmosphere of air at a temperature no greater than 185° C., and preferably no greater than 190° C. for a time period in a range of thirty minutes to four hours. During the heating step the color of the solution is monitored to determine when the reaction is complete and when decomposition of the desired product begins to take place. The solution is then added to germanium di(ethylene glycol) ethyl ether to make the PGO spin-coating solution. This second step also entails heating the solution to a temperature no greater than 190° C. for a time period in a range of 0.5 to 2.0 hours. The process results in a PGO precursor solution suitable for use in spin-coating.

公开(公告)号：US20100090110A1

公开(公告)日：2010-04-15

申请号：US12630893

申请日：2009-12-04

申请人： Douglas J. Tweet ,  Jer-Shen Maa ,  Jong-Jan Lee ,  Sheng Teng Hsu

发明人： Douglas J. Tweet ,  Jer-Shen Maa ,  Jong-Jan Lee ,  Sheng Teng Hsu

IPC分类号： H01L31/028

CPC分类号： H01L31/1055 ,  H01L27/14643 ,  H01L27/14689

摘要： A germanium (Ge) short wavelength infrared (SWIR) imager and associated fabrication process are provided. The imager comprises a silicon (Si) substrate with doped wells. An array of pin diodes is formed in a relaxed Ge-containing film overlying the Si substrate, each pin diode having a flip-chip interface. There is a Ge/Si interface, and a doped Ge-containing buffer interposed between the Ge-containing film and the Ge/Si interface. An array of Si CMOS readout circuits is bonded to the flip-chip interfaces. Each readout circuit has a zero volt diode bias interface.

摘要翻译： 提供锗（Ge）短波长红外（SWIR）成像器和相关制造工艺。 该成像器包括具有掺杂阱的硅（Si）衬底。 在位于Si衬底上的松弛的含Ge膜中形成一个pin二极管阵列，每个pin二极管具有倒装芯片接口。 存在Ge / Si界面和插入含Ge膜和Ge / Si界面之间的含掺杂Ge的缓冲层。 Si CMOS读出电路阵列结合到倒装芯片接口。 每个读出电路都具有零伏二极管偏置接口。