公开(公告)号：US20230207669A1

公开(公告)日：2023-06-29

申请号：US18118154

申请日：2023-03-07

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chung-Fu Chang ,  Kuan-Hung Chen ,  Guang-Yu Lo ,  Chun-Chia Chen ,  Chun-Tsen Lu

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/51 ,  H01L21/02 ,  H01L21/28

CPC分类号： H01L29/66795 ,  H01L29/785 ,  H01L29/7834 ,  H01L29/511 ,  H01L21/022 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/28202

摘要： A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.

公开(公告)号：US11631753B2

公开(公告)日：2023-04-18

申请号：US16282323

申请日：2019-02-22

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chung-Fu Chang ,  Kuan-Hung Chen ,  Guang-Yu Lo ,  Chun-Chia Chen ,  Chun-Tsen Lu

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/51 ,  H01L21/02 ,  H01L21/28

摘要： A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.

公开(公告)号：US20200235227A1

公开(公告)日：2020-07-23

申请号：US16282323

申请日：2019-02-22

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chung-Fu Chang ,  Kuan-Hung Chen ,  Guang-Yu Lo ,  Chun-Chia Chen ,  Chun-Tsen Lu

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L21/02 ,  H01L29/51

摘要： A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.

公开(公告)号：US10403715B2

公开(公告)日：2019-09-03

申请号：US16222709

申请日：2018-12-17

申请人： United Microelectronics Corp.

发明人： Rung-Yuan Lee ,  Chun-Tsen Lu ,  Kuan-Hung Chen

IPC分类号： H01L29/06 ,  H01L29/423 ,  H01L29/41 ,  H01L29/417 ,  H01L23/535 ,  H01L21/306 ,  H01L29/66 ,  H01L21/308 ,  H01L29/786 ,  H01L21/84 ,  H01L27/12

摘要： A semiconductor device is provided. The semiconductor device includes a substrate, a semiconductor nanowire, a gate structure, a first metal nanowire and a second metal nanowire. The semiconductor nanowire is disposed vertically on the substrate. The gate structure surrounds a middle portion of the semiconductor nanowire. The first metal nanowire is located on a side of the semiconductor nanowire and is electronically connected to a lower portion of the semiconductor nanowire. The second metal nanowire is located on the other side of the semiconductor nanowire and is electronically connected to the gate structure.

公开(公告)号：US10290723B2

公开(公告)日：2019-05-14

申请号：US15981913

申请日：2018-05-17

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chun-Tsen Lu ,  Chien-Ming Lai ,  Lu-Sheng Chou ,  Ya-Huei Tsai ,  Ching-Hsiang Chiu ,  Yu-Tung Hsiao ,  Chen-Ming Huang ,  Kun-Ju Li ,  Yu-Ping Wang

IPC分类号： H01L29/51 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  C22C32/00 ,  H01L21/28 ,  B32B1/00 ,  B32B18/00

摘要： A semiconductor device includes a substrate and a gate structure on the substrate, in which the gate structure includes a high-k dielectric layer on the substrate and a bottom barrier metal (BBM) layer on the high-k dielectric layer. Preferably, the BBM layer includes a top portion, a middle portion, and a bottom portion, the middle portion being a nitrogen rich portion, the top portion and the bottom portion being titanium rich portions, and the top portion, the middle portion, and the bottom portion are of same material composition.

公开(公告)号：US20180269308A1

公开(公告)日：2018-09-20

申请号：US15981913

申请日：2018-05-17

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chun-Tsen Lu ,  Chien-Ming Lai ,  Lu-Sheng Chou ,  Ya-Huei Tsai ,  Ching-Hsiang Chiu ,  Yu-Tung Hsiao ,  Chen-Ming Huang ,  Kun-Ju Li ,  Yu-Ping Wang

IPC分类号： H01L29/66 ,  H01L21/28 ,  B32B1/00 ,  H01L29/49 ,  H01L29/51 ,  C22C32/00 ,  H01L29/423

CPC分类号： H01L29/66545 ,  B32B1/00 ,  B32B18/00 ,  C22C32/0068 ,  H01L21/28088 ,  H01L29/4238 ,  H01L29/4966 ,  H01L29/511

摘要： A semiconductor device includes a substrate and a gate structure on the substrate, in which the gate structure includes a high-k dielectric layer on the substrate and a bottom barrier metal (BBM) layer on the high-k dielectric layer. Preferably, the BBM layer includes a top portion, a middle portion, and a bottom portion, the middle portion being a nitrogen rich portion, the top portion and the bottom portion being titanium rich portions, and the top portion, the middle portion, and the bottom portion are of same material composition.

公开(公告)号：US10043807B1

公开(公告)日：2018-08-07

申请号：US15641236

申请日：2017-07-04

申请人： UNITED MICROELECTRONICS CORP.

发明人： Rung-Yuan Lee ,  Yu-Cheng Tung ,  Chun-Tsen Lu ,  En-Chiuan Liou ,  Kuan-Hung Chen

IPC分类号： H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L27/092 ,  H01L27/02 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/02

摘要： A semiconductor device and a method of forming the same, the semiconductor device includes a plural fin structures, two gates, a protection layer and an interlayer dielectric layer. The fin structures are disposed on a substrate. The two gates are disposed on the substrate across the fin structures. The protection layer is disposed on the substrate, surrounded sidewalls of the two gates. The interlayer dielectric layer is disposed on the substrate, covering the fin structures and the two gates.

公开(公告)号：US20160268125A1

公开(公告)日：2016-09-15

申请号：US14656733

申请日：2015-03-13

申请人： United Microelectronics Corp.

发明人： Kun-Ju Li ,  Po-Cheng Huang ,  Yu-Ting Li ,  Jen-Chieh Lin ,  Chih-Hsun Lin ,  Tzu-Hsiang Hung ,  Wu-Sian Sie ,  I-Lun Hung ,  Wen-Chin Lin ,  Chun-Tsen Lu

IPC分类号： H01L21/02 ,  H01L21/321 ,  H01L21/66 ,  H01L21/324

CPC分类号： H01L29/42364 ,  H01L21/02271 ,  H01L21/02354 ,  H01L21/02362 ,  H01L21/31051 ,  H01L21/3212 ,  H01L21/324 ,  H01L21/823437 ,  H01L22/12 ,  H01L22/20 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A semiconductor process includes the following steps. A dielectric layer is formed on a substrate, where the dielectric layer has at least a dishing from a first top surface. A shrinkable layer is formed to cover the dielectric layer, where the shrinkable layer has a second top surface. A treatment process is performed to shrink a part of the shrinkable layer according to a topography of the second top surface, thereby flattening the second top surface.

摘要翻译： 半导体工艺包括以下步骤。 电介质层形成在基板上，其中电介质层至少具有来自第一顶表面的凹陷。 形成可收缩层以覆盖电介质层，其中可收缩层具有第二顶表面。 执行处理过程以根据第二顶表面的形貌收缩可收缩层的一部分，从而使第二顶表面变平。

公开(公告)号：US09443726B1

公开(公告)日：2016-09-13

申请号：US14656733

申请日：2015-03-13

申请人： UNITED MICROELECTRONICS CORP.

发明人： Kun-Ju Li ,  Po-Cheng Huang ,  Yu-Ting Li ,  Jen-Chieh Lin ,  Chih-Hsun Lin ,  Tzu-Hsiang Hung ,  Wu-Sian Sie ,  I-Lun Hung ,  Wen-Chin Lin ,  Chun-Tsen Lu

IPC分类号： H01L21/02 ,  H01L21/324 ,  H01L21/321 ,  H01L21/66

CPC分类号： H01L29/42364 ,  H01L21/02271 ,  H01L21/02354 ,  H01L21/02362 ,  H01L21/31051 ,  H01L21/3212 ,  H01L21/324 ,  H01L21/823437 ,  H01L22/12 ,  H01L22/20 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545

摘要： A semiconductor process includes the following steps. A dielectric layer is formed on a substrate, where the dielectric layer has at least a dishing from a first top surface. A shrinkable layer is formed to cover the dielectric layer, where the shrinkable layer has a second top surface. A treatment process is performed to shrink a part of the shrinkable layer according to a topography of the second top surface, thereby flattening the second top surface.

摘要翻译： 半导体工艺包括以下步骤。 电介质层形成在基板上，其中电介质层至少具有来自第一顶表面的凹陷。 形成可收缩层以覆盖电介质层，其中可收缩层具有第二顶表面。 执行处理过程以根据第二顶表面的形貌收缩可收缩层的一部分，从而使第二顶表面变平。

公开(公告)号：US20240282843A1

公开(公告)日：2024-08-22

申请号：US18653933

申请日：2024-05-02

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chung-Fu Chang ,  Kuan-Hung Chen ,  Guang-Yu Lo ,  Chun-Chia Chen ,  Chun-Tsen Lu

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/28 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L29/66795 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/28202 ,  H01L29/511 ,  H01L29/7834 ,  H01L29/785

摘要： A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.