公开(公告)号：US08466465B2

公开(公告)日：2013-06-18

申请号：US12382743

申请日：2009-03-23

申请人： Jong-Han Jeong ,  Tae-Kyung Ahn ,  Jae-Kyeong Jeong ,  Jin-Sung Park ,  Hun-Jung Lee ,  Hyun-Soo Shin ,  Yeon-Gon Mo

发明人： Jong-Han Jeong ,  Tae-Kyung Ahn ,  Jae-Kyeong Jeong ,  Jin-Sung Park ,  Hun-Jung Lee ,  Hyun-Soo Shin ,  Yeon-Gon Mo

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L29/76 ,  H01L31/112 ,  H01L27/108 ,  H01L29/12 ,  H01L29/15

CPC分类号： H01L29/78696 ,  H01L27/1225 ,  H01L29/7869

摘要： Disclosed is a thin film transistor which has an oxide semiconductor as an activation layer, a method of manufacturing the same and a flat panel display device having the same. The thin film transistor includes an oxide semiconductor layer formed on a substrate and including a channel region, a source region and a drain region, a gate electrode insulated from the oxide semiconductor layer by a gate insulating film, and source electrode and drain electrode which are coupled to the source region and the drain region, respectively. The oxide semiconductor layer includes a first layer portion and a second layer portion. The first layer portion has a first thickness and a first carrier concentration, and the second layer portion has a second thickness and a second carrier concentration. The second carrier concentration is lower than the first carrier concentration.

摘要翻译： 公开了具有氧化物半导体作为活化层的薄膜晶体管，其制造方法和具有该活性层的平板显示装置。 薄膜晶体管包括形成在基板上的氧化物半导体层，其包括沟道区域，源极区域和漏极区域，通过栅极绝缘膜与氧化物半导体层绝缘的栅极电极以及源极电极和漏极电极 耦合到源区和漏区。 氧化物半导体层包括第一层部分和第二层部分。 第一层部分具有第一厚度和第一载流子浓度，并且第二层部分具有第二厚度和第二载流子浓度。 第二载流子浓度低于第一载流子浓度。

公开(公告)号：US07800971B2

公开(公告)日：2010-09-21

申请号：US12541429

申请日：2009-08-14

申请人： Jin-Sung Park ,  Dae-Seok Byeon

发明人： Jin-Sung Park ,  Dae-Seok Byeon

IPC分类号： G11C7/00 ,  G11C11/34 ,  G11C16/04

CPC分类号： G11C16/10 ,  G11C2216/14

摘要： A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first memory block of the first mat.

摘要翻译： 通过将第一数据加载到第一垫的页缓冲器中来编程闪存器件。 第二数据被加载到第二垫的页缓冲器中，同时在第一垫的第一存储块中编程第一数据。

公开(公告)号：US20090049858A1

公开(公告)日：2009-02-26

申请号：US12062827

申请日：2008-04-04

申请人： Tae-Hee Lee ,  Hong-Hee Park ,  Joon-Hwan Oh ,  Young-Jin Kim ,  Kwang-Ha Suh ,  Jin-Sung Park

发明人： Tae-Hee Lee ,  Hong-Hee Park ,  Joon-Hwan Oh ,  Young-Jin Kim ,  Kwang-Ha Suh ,  Jin-Sung Park

IPC分类号： F25C5/08 ,  F25C1/04 ,  F25C1/00

CPC分类号： F25C1/18 ,  F25C1/08 ,  F25C5/08 ,  F25C2400/10

摘要： An ice maker and a refrigerator having the same include an ice making container which is maintained at a temperature higher than a freezing point of water. Ace core rods having the temperature lower than the freezing point are inserted into the ice making container to cause water in the container to freeze. Accordingly, water at the periphery of the ice making container remains liquid which the water surrounding the ice core rods freezes. As a result, air bubbles generated when the ice is made can be discharged from the liquid portions of the water at the outer edges of the container. This results in ice without trapped air bubbles, which allows excellent transparent ice pieces to be formed. In some embodiments, the exterior surfaces of the ice making container are maintained at a temperature lower than the freezing point of water, and thawing rods maintained at the temperature higher than the freezing point of water are inserted into the center portions of the ice making container. In this embodiment, water at the edges of the ice making container are frozen first, while the water surrounding the thawing rods remains liquid. This also allows air bubbles to escape during formation of the ice, which results in transparent ice pieces.

摘要翻译： 制冰机和具有该制冰机的冰箱包括保持在比水的冰点高的温度的制冰容器。 将具有低于凝固点温度的Ace芯棒插入制冰容器中，使容器内的水冻结。 因此，制冰容器周围的水保持液体，冰芯棒周围的水冻结。 结果，当制冰时产生的气泡可以从容器的外边缘处的水的液体部分排出。 这导致没有被捕获的气泡的冰，这允许形成优异的透明冰块。 在一些实施例中，制冰容器的外表面保持在低于水的凝固点的温度，并且保持在高于水的凝固点的温度的解冻杆被插入制冰容器的中心部分 。 在该实施例中，首先冻结制冰容器边缘处的水，同时围绕解冻杆的水保持液体。 这也允许在形成冰期间气泡逸出，这导致透明的冰块。

公开(公告)号：US07449934B2

公开(公告)日：2008-11-11

申请号：US11585465

申请日：2006-10-24

申请人： Sang-Hyun Woo ,  Jin-Sung Park ,  Chang-Ho Lee ,  Joy Laskar

发明人： Sang-Hyun Woo ,  Jin-Sung Park ,  Chang-Ho Lee ,  Joy Laskar

IPC分类号： G06F7/44

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D2200/0043 ,  H03D2200/0084

摘要： Provided is a mixer for use in a direct conversion receiver. The mixer includes Field Effect Transistors (FETs), a current source (IBias), two load resistors (RLoad), another FET, and two inductors L1 and L2. The FET M21 constitutes a current bleeding circuitry and the other components except for the two inductors L1 and L2 constitute a so-called Gilbert cell mixer.

摘要翻译： 提供一种用于直接转换接收机的混频器。 混频器包括场效应晶体管（FET），电流源（IBias），两个负载电阻（RLoad），另一个FET和两个电感器L 1和L 2。 FET M 21构成电流泄放电路，除了两个电感器L 1和L 2之外的其它部件构成所谓的吉尔伯特细胞混合器。

公开(公告)号：US07394719B2

公开(公告)日：2008-07-01

申请号：US11345995

申请日：2006-02-01

申请人： Seung-Keun Lee ,  Jin-Sung Park

发明人： Seung-Keun Lee ,  Jin-Sung Park

IPC分类号： G11C8/00

CPC分类号： G11C7/1027 ,  G11C7/12 ,  G11C7/18 ,  G11C16/24 ,  G11C16/26 ,  G11C2207/005

摘要： A flash memory device that includes a number of columns each of which is connected with a plurality of memory cells. A column selector circuit selects a part of the columns in response to a column address, and a plurality of sense amplifier groups are connected with the selected columns by the column selector circuit. The column selector circuit variably selects the columns according to whether the column address is 4N-aligned (where N is an integer having a value of 1 or more). For example, the column selector circuit chooses columns of the column address when the column address is 4N-aligned, and chooses columns of an upper column address when the column address is not 4N-aligned.

摘要翻译： 一种闪速存储器件，其包括多个列，每个列与多个存储器单元连接。 列选择器电路响应于列地址选择列的一部分，并且多个读出放大器组通过列选择器电路与所选择的列连接。 列选择器电路根据列地址是否4N对齐（其中N是具有1或更大的值的整数）可变地选择列。 例如，当列地址为4N对齐时，列选择器电路选择列地址的列，并且当列地址不是4N对齐时选择列列地址的列。

公开(公告)号：US07349256B2

公开(公告)日：2008-03-25

申请号：US11283646

申请日：2005-11-21

申请人： Jin-Sung Park ,  Dae-Seok Byeon

发明人： Jin-Sung Park ,  Dae-Seok Byeon

IPC分类号： G11C16/04 ,  G11C11/34 ,  G11C7/00

CPC分类号： G11C16/10 ,  G11C2216/14

摘要： A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first memory block of the first mat.

摘要翻译： 通过将第一数据加载到第一垫的页缓冲器中来编程闪存器件。 第二数据被加载到第二垫的页缓冲器中，同时在第一垫的第一存储块中编程第一数据。

公开(公告)号：US20060077717A1

公开(公告)日：2006-04-13

申请号：US11167984

申请日：2005-06-27

申请人： Jin-Sung Park ,  Myong-Jae Kim ,  Seung-Keun Lee

发明人： Jin-Sung Park ,  Myong-Jae Kim ,  Seung-Keun Lee

IPC分类号： G11C11/34

CPC分类号： G11C8/08 ,  G11C16/08

摘要： The invention disclosed herein is a non-volatile memory device. The non-volatile memory device comprises: a first transistor connected between a first voltage and a control node, and controlled by a second voltage; a second transistor connected between the first voltage and the control node, and controlled by a third voltage, and a word line driver for driving a word line in responsive to a voltage of the control node. The second voltage is set to a ground voltage during an erase operation. The third voltage is set to a power voltage during the erase operation.

摘要翻译： 本文公开的发明是非易失性存储器件。 非易失性存储器件包括：连接在第一电压和控制节点之间并由第二电压控制的第一晶体管; 连接在第一电压和控制节点之间并由第三电压控制的第二晶体管，以及用于响应于控制节点的电压驱动字线的字线驱动器。 在擦除操作期间将第二电压设置为接地电压。 在擦除操作期间将第三电压设置为电源电压。

公开(公告)号：US08351262B2

公开(公告)日：2013-01-08

申请号：US12482590

申请日：2009-06-11

申请人： Jin-Sung Park

发明人： Jin-Sung Park

IPC分类号： G11C11/34

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3454 ,  G11C2211/5621

摘要： A nonvolatile memory device that includes first and second storage areas, and a control logic configured to control the first and second storage areas, wherein when a program operation of the first storage area is passed before a program operation of the second storage area is passed, the control logic completes the program operation of the first storage area and continues the program operation of the second storage area is provided.

摘要翻译： 一种包括第一和第二存储区域的非易失性存储器件，以及被配置为控制第一和第二存储区域的控制逻辑，其中当在第二存储区域的程序操作通过之前第一存储区域的程序操作被通过时， 控制逻辑完成第一存储区域的编程操作并且继续提供第二存储区域的编程操作。

公开(公告)号：US20120129011A1

公开(公告)日：2012-05-24

申请号：US13137790

申请日：2011-09-13

申请人： Jin-Sung Park

发明人： Jin-Sung Park

IPC分类号： H01M10/42 ,  H05K1/11

CPC分类号： H05K1/18 ,  H01M10/425 ,  H05K1/115 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/10037 ,  H05K2201/10295

摘要： A printed circuit board includes a base substrate, at least one through-hole in the base substrate, a connection tab extending through the through-hole, an electrical element on the base substrate and adjacent to the through-hole, and at least one groove portion in the base substrate and adjacent to the electrical element.

摘要翻译： 印刷电路板包括基底基底，基底基底中的至少一个通孔，延伸穿过通孔的连接舌片，基底基板上的电气元件和与通孔相邻的至少一个凹槽 并且与电气元件相邻。

公开(公告)号：US20110315080A1

公开(公告)日：2011-12-29

申请号：US13254375

申请日：2010-03-04

申请人： Myong-Ho Choi ,  Jin-Sung Park ,  Jin-Chul Park ,  Ji-Suk Jang

发明人： Myong-Ho Choi ,  Jin-Sung Park ,  Jin-Chul Park ,  Ji-Suk Jang

IPC分类号： C23C16/458 ,  C23C16/50 ,  C23C16/455

CPC分类号： H01L21/68742

摘要： In a lift pin and an apparatus for processing a substrate having the same, the lift pin includes a body inserted into a penetration hole of a susceptor on which the substrate is positioned and moving along the penetration hole upward and downward in a direction vertical to an upper surface of the susceptor, and a contact member secured to an upper portion of the body and comprising a soft material having hardness smaller than that of the substrate. Thus, the contact member of the lift pin makes contact with the substrate without scratches on a surface of the substrate, to thereby reduce substrate failures in the process.

摘要翻译： 在提升销和用于处理具有该基座的基板的装置中，提升销包括插入到基座的贯穿孔中的主体，基座位于该基座的贯通孔中，并沿垂直于 基座的上表面和固定到主体的上部的接触构件，并且包括具有小于基底的硬度的软质材料。 因此，提升销的接触构件在基板的表面上与基板​​接触而没有划痕，从而减少了该过程中的基板故障。