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公开(公告)号:US12062549B2
公开(公告)日:2024-08-13
申请号:US17304792
申请日:2021-06-25
发明人: Yong Liu , Yusheng Lin , Liangbiao Chen
IPC分类号: H01L21/48 , H01L21/56 , H01L23/28 , H01L23/495 , H01L23/498
CPC分类号: H01L21/4821 , H01L21/56 , H01L23/28 , H01L23/49534 , H01L23/49575 , H01L23/49582 , H01L23/498 , H01L23/49822 , H01L23/49861
摘要: Methods of forming semiconductor packages include providing a first insulator layer coupled with a first metallic layer. A recess is formed in the first metallic layer and a semiconductor die is mechanically coupled therein. The die is mechanically coupled with a second metallic layer and the second metallic layer is coupled with a second insulator layer. The die and layers are at least partially encapsulated to form the semiconductor package. The first and/or second metallic layers may be insulator-metal substrates, metal-insulator-metal (MIM) substrates, or may be formed of lead frames. In implementations the package does not include a spacer between the die and the first metallic layer and does not include a spacer between the die and the second metallic layer. In implementations the first insulator layer and the second insulator layer are exposed through the encapsulant or are mechanically coupled with metallic layers exposed through the encapsulant.
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公开(公告)号:US12055665B2
公开(公告)日:2024-08-06
申请号:US18069528
申请日:2022-12-21
发明人: Steven John Buckley
IPC分类号: G01S17/10 , G01S7/4861 , G04F10/00
CPC分类号: G01S7/4861 , G01S17/10 , G04F10/005
摘要: Various embodiments of the present technology may provide methods and apparatus for repetitive histogramming. The apparatus may provide a limited number of physical bins to perform multiple histograms on a total number of virtual bins. The apparatus may provide a single physical bin that is used to sweep over the total number of virtual bins.
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公开(公告)号:US20240259705A1
公开(公告)日:2024-08-01
申请号:US18360972
申请日:2023-07-28
发明人: Sergey VELICHKO
IPC分类号: H04N25/571 , H04N25/78
CPC分类号: H04N25/571 , H04N25/78
摘要: An image sensor may include an array of imaging pixels arranged in rows and columns. A method of operating an imaging pixel is provided that includes accumulating charge in a photosensitive element, allowing the accumulated charge in the photodiode to overflow into a capacitor that is coupled to a reset transistor having a gate terminal configured to receive a reset control signal during an integration phase, and extending the dynamic range of the imaging pixel by dynamically adjusting the reset control signal from a first voltage level to a second voltage level during the integration phase. The reset control signal can be lowered from the first voltage level to the second voltage level in a discrete or continuous fashion such that a portion of the overflow charge in the capacitor represents a linear signal and a portion of the overflow charge in the capacitor represents a non-linear signal.
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公开(公告)号:US20240243014A1
公开(公告)日:2024-07-18
申请号:US18619594
申请日:2024-03-28
发明人: Gordon M. GRIVNA
IPC分类号: H01L21/78 , H01L23/00 , H01L29/66 , H01L29/778
CPC分类号: H01L21/7806 , H01L21/78 , H01L24/94 , H01L24/96 , H01L29/66431 , H01L29/7786 , H01L2224/94
摘要: A process can be used to allow processing of thin layers of a workpiece including dies. The workpiece can include a base substrate and a plurality of layers overlying the base substrate. The process can include forming a polymer support layer over the plurality of layers; thinning or removing the base substrate within a component region of the workpiece, wherein the component region includes an electronic device; and singulating the workpiece into a plurality of dies after thinning or removing the base substrate. In another aspect, an electronic device can be formed using such process. In an embodiment, the workpiece may have a size corresponding to a semiconductor wafer to allow wafer-level, as opposed to die-level, processing.
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公开(公告)号:US12040192B2
公开(公告)日:2024-07-16
申请号:US17813348
申请日:2022-07-19
发明人: Francis J. Carney , Yusheng Lin , Michael J. Seddon , Chee Hiong Chew , Soon Wei Wang , Eiji Kurose
CPC分类号: H01L21/302 , H01L21/48 , H01L21/561 , H01L21/565 , H01L21/78 , H01L23/12 , H01L23/3185 , H01L24/04 , H01L24/26 , H01L2224/94
摘要: Various implementations of a method of forming a semiconductor package may include forming a plurality of notches into the first side of a semiconductor substrate; applying a permanent coating material into the plurality of notches; forming a first organic material over the first side of the semiconductor substrate and the plurality of notches; thinning a second side of the semiconductor substrate opposite the first side one of to or into the plurality of notches; and singulating the semiconductor substrate through the permanent coating material into a plurality of semiconductor packages.
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公开(公告)号:US20240234471A1
公开(公告)日:2024-07-11
申请号:US18151595
申请日:2023-01-09
发明人: Tomas GEURTS , Swarnal BORTHAKUR
IPC分类号: H01L27/146
CPC分类号: H01L27/1464 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/14636 , H01L27/14685
摘要: A semiconductor device may include a primary circuit chip and an image sensor chip stacked thereon. The image sensor chip may have a backside illuminated (BSI) surface and a frontside surface opposed to the BSI surface, with the image sensor chip being disposed on the primary circuit chip with the frontside surface facing the primary circuit chip. An auxiliary chip may be disposed on the BSI surface of the image sensor chip and connected to the primary circuit chip through the image sensor chip.
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公开(公告)号:US20240234155A1
公开(公告)日:2024-07-11
申请号:US18613913
申请日:2024-03-22
IPC分类号: H01L21/304 , H01L29/16
CPC分类号: H01L21/3043 , H01L29/1602 , H01L29/1608
摘要: A method of singulating a silicon carbide (SiC) semiconductor wafer can include defining a cut within the silicon carbide (SiC) semiconductor wafer by performing a partial dicing operation where the SiC semiconductor wafer is aligned along a plane and the cut has a depth less than a first thickness of the SiC semiconductor wafer. The cut is aligned along a vertical direction orthogonal to the plane such that a portion of the SiC semiconductor wafer has a second thickness that extends between a bottom of the cut and an outer surface of the SiC semiconductor wafer. The method can further include defining a cleave, by performing a cleaving operation, through the portion of the SiC semiconductor wafer having the second thickness. The cleave can be aligned with the cut and extending to the outer surface of the SiC semiconductor wafer.
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公开(公告)号:US12034023B2
公开(公告)日:2024-07-09
申请号:US18149862
申请日:2023-01-04
IPC分类号: H01L27/146 , H01L31/107
CPC分类号: H01L27/14627 , H01L27/14643 , H01L27/14689 , H01L31/107
摘要: An imaging device may include a plurality of single-photon avalanche diode (SPAD) pixels. The SPAD pixels may be overlapped by microlenses to direct light incident on the pixels onto photosensitive regions of the pixels and a containment grid with openings that surround each of the microlenses. During formation of the microlenses, the containment grid may prevent microlens material for adjacent SPAD pixels from merging. To ensure separation between the microlenses, the containment grid may be formed from material phobic to microlens material, or phobic material may be added over the containment grid material. Additionally, the containment grid may be formed from material that can absorb stray or off-angle light so that it does not reach the associated SPAD pixel, thereby reducing crosstalk during operation of the SPAD pixels.
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公开(公告)号:US12015381B2
公开(公告)日:2024-06-18
申请号:US18450123
申请日:2023-08-15
发明人: Seiji Takeuchi
CPC分类号: H03F1/30 , G03B13/36 , G05F3/24 , H02P25/034 , H03F3/45 , H03F2200/453 , H03M1/1009
摘要: Driver circuits, systems for driving actuators, and imaging systems with actuators. The driver circuit includes a current comparator circuit, a driver, and a replica circuit. The current comparator circuit includes a first node having a first voltage. The current comparator circuit also includes a second node having a second voltage. The driver includes a first terminal responsive to the second voltage. The driver also includes a second terminal connected to a reference voltage. The replica circuit includes a third terminal connected to the first node. The replica circuit also includes a fourth terminal connected to the second terminal of the driver. The replica circuit also includes a fifth terminal connected to the first terminal of the driver.
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公开(公告)号:US20240194710A1
公开(公告)日:2024-06-13
申请号:US18586731
申请日:2024-02-26
IPC分类号: H01L27/146
CPC分类号: H01L27/14618 , H01L27/14634 , H01L27/14636
摘要: Implementations of semiconductor packages may include: a digital signal processor having a first side and a second side and an image sensor array, having a first side and a second side. The first side of the image sensor array may be coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal. One or more openings may extend from the second side of the image sensor array into the second side of the digital signal processor to an etch stop layer in the second side of the digital signal processor. The one or more openings may form a second edge seal between the plurality of HBI bond pads and the edge of the digital signal processor.
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