公开(公告)号：US20130049042A1

公开(公告)日：2013-02-28

申请号：US13223033

申请日：2011-08-31

Applicant: Yi Chieh Lin ,  Rong Ren Lee

Inventor： Yi Chieh Lin ,  Rong Ren Lee

IPC: H01L33/60

CPC classification number: H01L33/14 ,  H01L33/0079

Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; a first light-emitting stack comprising a first active layer; a bonding interface formed between the substrate and the first light-emitting stack; and a contact structure formed on the first light-emitting stack and comprising first, second and third contact layers. Each of the first, second and third contact layers comprises a doping material.

Abstract translation: 本公开公开了一种发光装置。 发光装置包括：基板; 包括第一有源层的第一发光堆叠; 形成在所述基板和所述第一发光叠层之间的接合界面; 以及形成在第一发光叠层上并包括第一，第二和第三接触层的接触结构。 第一，第二和第三接触层中的每一个包括掺杂材料。

公开(公告)号：US20130049034A1

公开(公告)日：2013-02-28

申请号：US13611681

申请日：2012-09-12

Applicant: Yi Chieh LIN

Inventor： Yi Chieh LIN

IPC: H01L33/08

CPC classification number: H01L33/30 ,  H01L33/40

Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; a first light-emitting stack comprising a first active layer; a bonding interface formed between the substrate and the first light-emitting stack; and a contact structure formed between the first light-emitting stack and the bonding interface and comprising a first contact layer and a second contact layer closer to the bonding interface than the first contact layer; wherein the first contact layer and the second contact layer comprises the same material and the first contact layer has an impurity concentration lower than that of the second contact layer.

Abstract translation: 本公开公开了一种发光装置。 发光装置包括：基板; 包括第一有源层的第一发光堆叠; 形成在所述基板和所述第一发光叠层之间的接合界面; 以及形成在第一发光叠层和接合界面之间的接触结构，并且包括比第一接触层更靠近接合界面的第一接触层和第二接触层; 其中所述第一接触层和所述第二接触层包含相同的材料，并且所述第一接触层的杂质浓度低于所述第二接触层的杂质浓度。

公开(公告)号：US20130038375A1

公开(公告)日：2013-02-14

申请号：US13205058

申请日：2011-08-08

Applicant: Sung-Chieh LIN ,  Wei-Li LIAO ,  Kuoyuan (Peter) HSU

Inventor： Sung-Chieh LIN ,  Wei-Li LIAO ,  Kuoyuan (Peter) HSU

IPC: H03L5/00

CPC classification number: H03K3/356182

Abstract: A circuit includes a power switch and a level shifter. The level shifter has a node and an assistant circuit. The node is configured to control the power switch. The assistant circuitry is coupled to the node and configured for the node to receive a first voltage value through the assistant circuit. The first voltage value is different from a second voltage value of an input signal received by the level shifter.

Abstract translation: 电路包括电源开关和电平转换器。 电平移位器具有节点和辅助电路。 该节点配置为控制电源开关。 辅助电路耦合到节点并且被配置用于节点通过辅助电路接收第一电压值。 第一电压值不同于由电平移位器接收的输入信号的第二电压值。

公开(公告)号：US08338960B2

公开(公告)日：2012-12-25

申请号：US13437575

申请日：2012-04-02

Applicant: Ling-Chieh Lin ,  Chien-Fu Lee ,  I-Hsiung Huang

Inventor： Ling-Chieh Lin ,  Chien-Fu Lee ,  I-Hsiung Huang

IPC: H01L23/522

CPC classification number: G03F1/36

Abstract: A method of manufacturing a photomask is described. The graphic data of the photomask are provided, and than an optical proximity correction is performed to the graphic data. A process rule check is then performed to the graphic data with the optical proximity correction. When at least one failed pattern not passing the process rule check is found in the graphic data, a repair procedure is performed only to the failed pattern so that the failed pattern can pass the process rule check. The patterns of the photomask are then formed according to the corrected and repaired graphic data.

公开(公告)号：US20120319278A1

公开(公告)日：2012-12-20

申请号：US13161701

申请日：2011-06-16

Applicant: Chun-Chieh Lin ,  Hung-Wen Su ,  Minghsing Tsai ,  Syun-Ming Jang

Inventor： Chun-Chieh Lin ,  Hung-Wen Su ,  Minghsing Tsai ,  Syun-Ming Jang

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76877 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L29/511 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patterned dielectric layer having a plurality of first openings. The method includes forming a conductive liner layer over the patterned dielectric layer, the conductive liner layer partially filling the first openings. The method includes forming a trench mask layer over portions of the conductive liner layer outside the first openings, thereby forming a plurality of second openings, a subset of which are formed over the first openings. The method includes depositing a conductive material in the first openings to form a plurality of vias and in the second openings to form a plurality of metal lines. The method includes removing the trench mask layer.

Abstract translation: 本公开提供了制造半导体器件的方法。 该方法包括形成具有多个第一开口的图案化电介质层。 该方法包括在图案化的介电层上形成导电衬垫层，导电衬垫层部分填充第一开口。 该方法包括在第一开口之外的导电衬垫层的部分上形成沟槽掩模层，从而形成多个第二开口，其中一部分形成在第一开口上。 该方法包括在第一开口中沉积导电材料以形成多个通孔，并且在第二开口中形成多个金属线。 该方法包括去除沟槽掩模层。

公开(公告)号：US20120277182A1

公开(公告)日：2012-11-01

申请号：US13546744

申请日：2012-07-11

Applicant: Wen-Chuan LIN ,  Chang-Chi HSIEH ,  Ting-Jang LU ,  Hsin-Sheng TSAY ,  Li-Chan YANG ,  Chia-Chieh LIN ,  Chung-Huang WANG

Inventor： Wen-Chuan LIN ,  Chang-Chi HSIEH ,  Ting-Jang LU ,  Hsin-Sheng TSAY ,  Li-Chan YANG ,  Chia-Chieh LIN ,  Chung-Huang WANG

IPC: A61K31/715 ,  A61P11/06 ,  A61P37/00 ,  A61P1/00 ,  A61P19/10

CPC classification number: A61K31/715

Abstract: An Anoectochilus spp. polysaccharide extract for stimulating the growth of advantageous bacteria, stimulating the release of granulocyte colony-stimulating factor (G-CSF), modulating T helper cell type I (Th1 cell), and/or modulating T helper cell type II (Th2 cell) is provided. The extract comprises an effective amount of a type II arabinogalactan of Anoectochilus spp. Also provided are a method for the preparation of the Anoectochilus spp. polysaccharide extract and the use of the extract.

Abstract translation: Anoectochilus spp。 用于刺激有益细菌生长的多糖提取物，刺激粒细胞集落刺激因子（G-CSF）的释放，调节T辅助细胞I型（Th1细胞）和/或调节II型（Th2细胞）的T辅助细胞是 提供。 提取物包含有效量的Anoectochilus spp的II型阿拉伯半乳聚糖。 还提供了制备Anoectochilus spp的方法。 多糖提取物和使用提取物。

公开(公告)号：US20120256740A1

公开(公告)日：2012-10-11

申请号：US13323835

申请日：2011-12-13

Applicant: YU-CHIEH LIN

Inventor： YU-CHIEH LIN

IPC: B60R25/10 ,  G08B29/00

CPC classification number: B60R25/10

Abstract: A computing device and an automobile controlling method stores identification information in an electronic tag of authorized communication devices and a memory of the computing device. The identification information of an electronic tag of a communication device is obtained and a door of an automobile is unlocked if the obtained identification information matches identification information stored in the memory.

Abstract translation: 计算装置和汽车控制方法将识别信息存储在授权通信装置的电子标签和计算装置的存储器中。 如果获得的识别信息与存储在存储器中的识别信息相匹配，则获得通信装置的电子标签的识别信息，并且汽车的门被解锁。

公开(公告)号：US20120229171A1

公开(公告)日：2012-09-13

申请号：US13412653

申请日：2012-03-06

Applicant: Liming Xiu ,  Ming-Chieh Lin

Inventor： Liming Xiu ,  Ming-Chieh Lin

IPC: H03B21/00

CPC classification number: G06F1/025 ,  G06F1/02 ,  G06F1/022 ,  G06F1/0328

Abstract: One of the advantages of direct frequency synthesis technique (e.g., flying-adder architecture) is its capability of generating arbitrary frequency by utilizing the time-average-frequency concept. In the clock output of the direct frequency synthesizer, instead of one type of cycle, there are two types of cycles. Unlike the conventional one-type-cycle clock wherein clock energy is concentrated at its designed frequency, Time-Average-Frequency based clock spreads some of its energy into spurious tones, which could be harmful to certain applications. The spurious tones are caused by the periodic carry sequence generated from a fractional part accumulator inside the frequency synthesizer. The invention suggests a method and an apparatus to break this periodicity and convert the spurious tones into broadband noise.

Abstract translation: 直接频率合成技术（例如飞行加法器结构）的优点之一是其通过利用时间平均频率概念产生任意频率的能力。 在直接频率合成器的时钟输出中，代替一种类型的周期，有两种类型的周期。 与其中时钟能量集中在其设计频率的常规单周期时钟不同，基于时间 - 平均频率的时钟将其一些能量扩展到伪噪声，这可能对某些应用有害。 伪噪声是由频率合成器内的分数分量累加器产生的周期性进位序列引起的。 本发明提出了一种破坏这种周期性并将伪噪声转换成宽带噪声的方法和装置。

公开(公告)号：US08243464B2

公开(公告)日：2012-08-14

申请号：US12646904

申请日：2009-12-23

Applicant: Hsien-Chieh Lin

Inventor： Hsien-Chieh Lin

IPC: H05K7/12 ,  H05K7/00 ,  H05K1/11

CPC classification number: H05K1/111 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4644 ,  H05K2201/09745 ,  H05K2201/099 ,  Y02P70/611 ,  H01L2924/00

Abstract: Disclosed is a printed circuit board structure which is manufactured by providing a core board, forming an inner circuit layer on the core board surface, forming a bonding pad on the inner circuit, forming a ring-shaped anti-etching layer on the bonding pad, forming an anti-soldering insulation layer on the ring-shaped anti-etching layer and the bonding pad, and forming an opening to expose a part of the bonding pad, wherein the radius of the opening is shorter than the radius of the ring-shaped anti-etching layer, and the bonding pad surface is free of concave. The described structure may prevent the solder extending along the bottom void of the anti-soldering insulation layer to other regions.

Abstract translation: 公开了一种印刷电路板结构，其通过提供芯板来制造，在芯板表面上形成内部电路层，在内部电路上形成接合焊盘，在焊盘上形成环状防蚀刻层， 在所述环形防蚀层和所述接合焊盘上形成防焊绝缘层，并且形成用于暴露所述接合焊盘的一部分的开口，其中所述开口的半径比所述环形防蚀层的半径小 抗蚀刻层，并且焊盘表面没有凹陷。 所描述的结构可以防止焊料沿着防焊绝缘层的底部空隙延伸到其它区域。

公开(公告)号：US20120187999A1

公开(公告)日：2012-07-26

申请号：US13044566

申请日：2011-03-10

Applicant: Ming-Chieh Lin

Inventor： Ming-Chieh Lin

IPC: G06G7/12

CPC classification number: G06F7/544

Abstract: An interpolation circuit adapted to receive a plurality of inputs is provided. The inputs include a first input group and a second input group. The interpolation circuit includes a first selecting channel, a second selecting channel, and an interpolation unit. The first selecting channel receives the first input group and outputs a first input of the first input group according to a selecting signal. The second selecting channel receives the second input group and the first input and outputs a second input of the second input group according to the selecting signal. The first selecting channel and the second selecting channel respectively output the first input or the second input. The interpolation unit is coupled to the first selecting channel and the second selecting channel, and receives the first input and the second input, and accordingly performs an interpolation to output an interpolation result.

Abstract translation: 提供了适于接收多个输入的内插电路。 输入包括第一输入组和第二输入组。 插值电路包括第一选择信道，第二选择信道和插值单元。 第一选择通道接收第一输入组，并根据选择信号输出第一输入组的第一输入。 第二选择通道接收第二输入组和第一输入，并根据选择信号输出第二输入组的第二输入。 第一选择通道和第二选择通道分别输出第一输入或第二输入。 插值单元耦合到第一选择通道和第二选择通道，并且接收第一输入和第二输入，并且因此执行插值以输出插值结果。