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    Method and system of finding a read voltage for a flash memory
    31.
    发明授权
    Method and system of finding a read voltage for a flash memory 有权
    找到闪存读取电压的方法和系统

    公开(公告)号：US08072805B2

    公开(公告)日：2011-12-06

    申请号：US12543496

    申请日：2009-08-18

    Applicant: Ming-Hung Chou ,  Chien-Fu Huang ,  Han-Lung Huang ,  Shih-Keng Cho

    Inventor： Ming-Hung Chou ,  Chien-Fu Huang ,  Han-Lung Huang ,  Shih-Keng Cho

    IPC: G11C16/04

    CPC classification number: G11C16/34 ,  G11C7/1006 ,  G11C11/5642

    Abstract: A method and system of finding a read voltage for a flash memory is disclosed. Data are read from array cells of the flash memory with a default read voltage, and a recorded state bit number that is recorded during programming is also read. Determine an optimal read voltage if the readout data do not pass the error correction control (ECC). Data are then re-read from the array cells of the flash memory with the determined optimal read voltage.

    Abstract translation: 公开了一种找到闪存的读取电压的方法和系统。 数据从闪速存储器的阵列单元读取，具有默认读取电压，并且还读取在编程期间记录的记录状态位数。 如果读出数据未通过纠错控制（ECC），则确定最佳读取电压。 然后用确定的最佳读取电压从闪速存储器的阵列单元重新读取数据。

    DISPLAY WITH CLK PHASE OR DATA PHASE AUTO-ADJUSTING MECHANISM AND METHOD OF DRIVING SAME
    32.
    发明申请
    DISPLAY WITH CLK PHASE OR DATA PHASE AUTO-ADJUSTING MECHANISM AND METHOD OF DRIVING SAME 有权
    显示与时钟相位或数据相位自动调节机制及其驱动方法

    公开(公告)号：US20110199369A1

    公开(公告)日：2011-08-18

    申请号：US12986056

    申请日：2011-01-06

    Applicant: Chien-Fu Huang ,  Chun-Fan Chung

    Inventor： Chien-Fu Huang ,  Chun-Fan Chung

    IPC: G06F3/038

    CPC classification number: G09G3/20 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2370/08

    Abstract: One aspect of the present invention relates to a display for displaying data. In one embodiment, the display includes a timing controller (TCON) configured to provide a plurality of data signals to be displayed, at least one clock signal and a data training code corresponding to at least one clock signal; a plurality of source drivers, each source driver configured to receive one or more corresponding data signals, the at least one clock signal and the data training code from the TCON, generate a plurality of data phase signals according to the one or more corresponding data signals, select one data signal from the plurality of data phase signals as an optimal data signal according to the data training code, and latch the one or more corresponding data signals according to the optimal data signal; and a display panel configured to display the plurality of latched data received from the plurality of source drivers.

    Abstract translation: 本发明的一个方面涉及一种用于显示数据的显示器。 在一个实施例中，显示器包括定时控制器（TCON），其被配置为提供要显示的多个数据信号，至少一个时钟信号和对应于至少一个时钟信号的数据训练代码; 多个源极驱动器，每个源极驱动器被配置为从TCON接收一个或多个对应的数据信号，所述至少一个时钟信号和数据训练代码，根据所述一个或多个相应数据信号产生多个数据相位信号 根据数据训练码从多个数据相位信号中选择一个数据信号作为最佳数据信号，并根据最佳数据信号锁存一个或多个对应的数据信号; 以及显示面板，被配置为显示从所述多个源驱动器接收的所述多个锁存数据。

    Method and system for obtaining a reference block for a MLC flash memory
    34.
    发明授权
    Method and system for obtaining a reference block for a MLC flash memory 有权
    用于获得MLC闪存的参考块的方法和系统

    公开(公告)号：US07907445B2

    公开(公告)日：2011-03-15

    申请号：US12486691

    申请日：2009-06-17

    Applicant: Chien-Fu Huang ,  Ming-Hung Chou ,  Han-Lung Huang ,  Shih-Keng Cho

    Inventor： Chien-Fu Huang ,  Ming-Hung Chou ,  Han-Lung Huang ,  Shih-Keng Cho

    IPC: G11C16/04 ,  G11C16/06

    CPC classification number: G11C11/5628 ,  G11C11/5642 ,  G11C16/349 ,  G11C16/3495

    Abstract: A method and system for obtaining a reference block on which reference voltages may be found for a MLC flash memory are disclosed. A first block and a second block are provided in the flash memory. A memory controller alternatively controls one of the first and the second blocks to act as the reference block and the other one as a cycle block in a respective period, during which the reference block stays idle and the cycle block is subjected to program/erase cycles.

    Abstract translation: 公开了一种用于获得参考块的方法和系统，其中可以针对MLC闪速存储器找到参考电压。 闪存中提供第一块和第二块。 存储器控制器交替地控制第一和第二块中的一个作为参考块，而另一个作为周期块在相应的周期内，在此期间参考块保持空闲并且循环块经受编程/擦除周期 。

    LIGHT-EMITTING DEVICE CONTAINING A COMPOSITE ELECTROPLATED SUBSTRATE
    37.
    发明申请
    LIGHT-EMITTING DEVICE CONTAINING A COMPOSITE ELECTROPLATED SUBSTRATE 审中-公开
    包含复合电极基板的发光装置

    公开(公告)号：US20100025714A1

    公开(公告)日：2010-02-04

    申请号：US12533211

    申请日：2009-07-31

    Applicant: Chia-Liang HSU ,  Min-Hsun HSIEH ,  Chih-Chiang LU ,  Chien-Fu HUANG

    Inventor： Chia-Liang HSU ,  Min-Hsun HSIEH ,  Chih-Chiang LU ,  Chien-Fu HUANG

    IPC: H01L33/00

    CPC classification number: H01L33/0079 ,  H01L33/405 ,  H01L33/46

    Abstract: The application is related to a method of forming a substrate of a light-emitting diode by composite electroplating. The application illustrates a light-emitting diode comprising the following elements: a light-emitting epitaxy structure, a reflective layer disposed on the light-emitting epitaxy structure, a seed layer disposed on the reflective layer, a composite electroplating substrate disposed on the seed layer by composite electroplating, and a protection layer disposed on the composite electroplating substrate.

    Abstract translation: 该应用涉及通过复合电镀形成发光二极管的基板的方法。 本发明示出了包括以下元件的发光二极管：发光外延结构，设置在发光外延结构上的反射层，设置在反射层上的种子层，设置在种子层上的复合电镀基板 通过复合电镀，以及设置在复合电镀基板上的保护层。

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