Memory device with different termination units for different signal frequencies
    31.
    发明申请
    Memory device with different termination units for different signal frequencies 失效
    具有不同信号频率的不同终端单元的存储器件

    公开(公告)号:US20050180235A1

    公开(公告)日:2005-08-18

    申请号:US10975808

    申请日:2004-10-27

    Applicant: Jung-Joon Lee

    Inventor: Jung-Joon Lee

    CPC classification number: G11C7/1084 G11C7/1048 G11C7/1078 G11C2207/105

    Abstract: A memory device includes a first termination unit coupled to a first pin for receiving a first signal having a first frequency component. The memory device also includes a second termination unit coupled to a second pin for receiving a second signal having a second frequency component higher than the first frequency component. The first termination unit is a different type from the second termination unit that provides less signal distortion than the first termination unit. For example, the first termination unit is of an open-drain type that has less power consumption, and the second termination unit is of a push-pull type that has less signal distortion.

    Abstract translation: 存储器件包括耦合到第一引脚的第一终端单元,用于接收具有第一频率分量的第一信号。 存储器件还包括耦合到第二引脚的第二终端单元,用于接收具有高于第一频率分量的第二频率分量的第二信号。 第一终端单元是与第二终端单元不同的类型,其提供比第一终端单元更少的信号失真。 例如,第一终端单元是具有较少功耗的开漏型,并且第二终端单元是具有较小信号失真的推挽式。

    Isocoumarin derivatives inhibiting angiogenesis
    33.
    发明授权
    Isocoumarin derivatives inhibiting angiogenesis 失效
    抑制血管生成的异香豆素衍生物

    公开(公告)号:US06451846B1

    公开(公告)日:2002-09-17

    申请号:US09980904

    申请日:2002-02-26

    CPC classification number: C07D311/76

    Abstract: The present invention relates to novel isocoumarin derivatves inhibiting angiogenesis, a method for preparation thereof and pharmaceutical compositions comprising the said derivatives as pharmaceutically active ingredients. More particularly, the present invention relates to novel isocoumarin derivatves represented by formula (1), especially 6,8-dihydroxy-4-acetyl-isocoumarin, a method for preparing 6,8-dihydroxy-4-acetyl-isocoumarin from fungi, and pharmaceutical compositions comprising the compounds and/or 6,8-dihydroxy-4-acetyl-isocoumarin as pharmaceutically active ingredients, which would be effective for the treatment of angiogenic diseases such as cancers, rheumatoid arthritis and diabetic retinopathy.

    Abstract translation: 本发明涉及抑制血管生成的新型异香豆素衍生物,其制备方法和包含所述衍生物作为药物活性成分的药物组合物。 更具体地说,本发明涉及由式(1)表示的新型异香豆素衍生物,特别是6,8-二羟基-4-乙酰基异香豆素,一种从真菌中制备6,8-二羟基-4-乙酰基异香豆素的方法,以及 包含化合物和/或6,8-二羟基-4-乙酰基异香豆素作为药物活性成分的药物组合物,其对于治疗血管生成疾病如癌症,类风湿性关节炎和糖尿病性视网膜病变是有效的。

    Memory module and memory module socket
    34.
    发明授权
    Memory module and memory module socket 有权
    内存模块和内存模块插座

    公开(公告)号:US06347039B1

    公开(公告)日:2002-02-12

    申请号:US09364677

    申请日:1999-07-30

    Applicant: Jung Joon Lee

    Inventor: Jung Joon Lee

    Abstract: A memory module includes a plurality of semiconductor memory devices mounted on a printed wiring board (PWB); longitudinal contact terminals that are for connection to a computer mother board and are arranged along at least one longitudinal edge of the PWB; and transverse contact terminals that are for connection to the computer mother board and are arranged along at least one transverse edge of the PWB. A socket for the module includes at least one longitudinal part into which the longitudinal contact terminals are inserted and at least one transverse part into which the transverse contact terminals are inserted. Each transverse socket part can be mounted on a pivot attached to the longitudinal part and rotated to engage a PWB inserted in the longitudinal part. Alternatively, each transverse part can be a flexible circuit carrier.

    Abstract translation: 存储模块包括安装在印刷电路板(PWB)上的多个半导体存储器件; 用于连接到计算机母板并且沿着所述PWB的至少一个纵向边缘布置的纵向接触端子; 以及用于连接到计算机母板并且沿着PWB的至少一个横向边缘布置的横向接触端子。 用于模块的插座包括插入纵向接触端子的至少一个纵向部分和横向接触端子插入其中的至少一个横向部分。 每个横向插座部分可以安装在附接到纵向部分的枢轴上并且旋转以接合插入在纵向部分中的PWB。 或者,每个横向部分可以是柔性电路载体。

    Memory system and method for preventing system hang
    36.
    发明授权
    Memory system and method for preventing system hang 有权
    用于防止系统挂起的内存系统和方法

    公开(公告)号:US08499206B2

    公开(公告)日:2013-07-30

    申请号:US12966171

    申请日:2010-12-13

    CPC classification number: G06F11/00

    Abstract: A memory system includes an error detection circuit having an error counter. When a bit error rate (BER) determined by the error counter exceeds a reference BER, the memory system reduces the BER by adjusting its operating speed or operating voltage, re-performing data training or impedance matching, or by adjusting a data swing width. Accordingly, a method of controlling a bit error rate may be performed, and a system hang is prevented.

    Abstract translation: 存储器系统包括具有错误计数器的错误检测电路。 当由错误计数器确定的误码率(BER)超过参考BER时,存储器系统通过调整其运行速度或工作电压,重新执行数据训练或阻抗匹配或调整数据摆幅宽度来降低BER。 因此,可以执行控制误码率的方法,并且防止系统挂起。

    Circuit Board Assemblies and Data Processing Systems Including the Same
    39.
    发明申请
    Circuit Board Assemblies and Data Processing Systems Including the Same 审中-公开
    电路板组件和包括其的数据处理系统

    公开(公告)号:US20120218703A1

    公开(公告)日:2012-08-30

    申请号:US13240439

    申请日:2011-09-22

    CPC classification number: H05K1/141 G06F1/183 H05K1/147 H05K2201/10189

    Abstract: A circuit board assembly includes a first circuit board having an electrical connection circuit on a surface thereof. A second circuit board is on the surface of the first circuit board. A first memory socket is mounted on the second circuit board. The first memory socket is only electrically connected to the electrical connection circuit through the second circuit board. A second memory socket is mounted on the second circuit board. The second memory socket that is only electrically connected to the electrical connection circuit through the second circuit board.

    Abstract translation: 电路板组件包括在其表面上具有电连接电路的第一电路板。 第二电路板位于第一电路板的表面上。 第一个存储器插座安装在第二个电路板上。 第一存储器插座仅通过第二电路板电连接到电连接电路。 第二个存储器插座安装在第二个电路板上。 第二存储器插座仅通过第二电路板电连接到电连接电路。

    MEMORY MODULE, MEMORY MODULE SOCKET AND MAINBOARD USING SAME
    40.
    发明申请
    MEMORY MODULE, MEMORY MODULE SOCKET AND MAINBOARD USING SAME 审中-公开
    存储模块,存储模块插座和使用相同的主板

    公开(公告)号:US20090209134A1

    公开(公告)日:2009-08-20

    申请号:US12428530

    申请日:2009-04-23

    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.

    Abstract translation: 存储模块插座,设置在主板的主表面上,并且适于机械地接收和电连接存储器模块与主板,所述存储器模块插座包括第一单元插座,所述第一单元插座具有多个第一插座引脚,所述第一插座引脚适于电连接第一 连接器,其设置在存储器模块的边缘上,以及第二单元插座,其具有多个第二插座引脚,其适于电连接到设置在与第一连接器正交的存储器模块上的第二连接器,其中存储器模块安装在存储器 模块插座平行于主板的主表面。

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