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31.发明授权Capacitor structure in trench structures of semiconductor devices and semiconductor devices comprising capacitor structures of this type and methods for fabricating the same 有权包括这种类型的电容器结构的半导体器件和半导体器件的沟槽结构中的电容器结构及其制造方法公开(公告)号：US08187947B2
公开(公告)日：2012-05-29
申请号：US12827035
申请日：2010-06-30
IPC分类号： H01L21/02
CPC分类号： H01L29/66181 , H01L27/10861 , H01L28/82
摘要： A capacitor structure in trench structures of a semiconductor device includes conductive regions made of metallic and/or semiconducting materials. The conducting regions are surrounded by a dielectric and form stacked layers in the trench structure of the semiconductor device.
摘要翻译： 半导体器件的沟槽结构中的电容器结构包括由金属和/或半导体材料制成的导电区域。 导电区域被电介质包围，并在半导体器件的沟槽结构中形成叠层。
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公开(公告)号：US20110147883A1
公开(公告)日：2011-06-23
申请号：US12646503
申请日：2009-12-23
IPC分类号： H01L27/12 , H01L21/762
CPC分类号： H01L29/0649 , H01L21/0237 , H01L21/02642 , H01L21/02647 , H01L21/31144 , H01L21/74 , H01L21/76224 , H01L21/7624 , H01L21/76248 , H01L21/76283
摘要： Disclosed is a method for forming a buried material layer in a semiconductor body, and a semiconductor arrangement including a buried material layer.
摘要翻译： 公开了一种在半导体本体中形成掩埋材料层的方法，以及包括掩埋材料层的半导体装置。
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公开(公告)号：US07511353B2
公开(公告)日：2009-03-31
申请号：US10971572
申请日：2004-10-22
申请人： Anton Mauder , Frank Hille , Vytla Rajeev Krishna , Elmar Falck , Hans-Joachim Schulze , Franz-Josef Niedernostheide , Helmut Strack
发明人： Anton Mauder , Frank Hille , Vytla Rajeev Krishna , Elmar Falck , Hans-Joachim Schulze , Franz-Josef Niedernostheide , Helmut Strack
IPC分类号： H01L29/72
CPC分类号： H01L21/263 , H01L29/32 , H01L29/6609 , H01L29/861
摘要： A semiconductor diode (30) has an anode (32), a cathode (33) and a semiconductor volume (31) provided between the anode (32) and the cathode (33). An electron mobility and/or hole mobility within a zone (34) of the semiconductor volume (31) that is situated in front of the cathode (33) is reduced relative to the rest of the semiconductor volume (31).
摘要翻译： 半导体二极管（30）具有设置在阳极（32）和阴极（33）之间的阳极（32），阴极（33）和半导体体积（31）。 位于阴极（33）前方的半导体体积（31）的区域（34）内的电子迁移率和/或空穴迁移率相对于半导体体积（31）的其余部分减小。
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公开(公告)号：US06441408B2
公开(公告)日：2002-08-27
申请号：US09761241
申请日：2001-01-17
申请人： Alfred Porst , Helmut Strack , Anton Mauder , Hans-Joachim Schulze , Heinrich Brunner , Josef Bauer , Reiner Barthelmess
发明人： Alfred Porst , Helmut Strack , Anton Mauder , Hans-Joachim Schulze , Heinrich Brunner , Josef Bauer , Reiner Barthelmess
IPC分类号： H01L3300
CPC分类号： H01L29/1016 , H01L29/7395 , H01L29/7455 , H01L29/749
摘要： A power semiconductor components has stop zones. In order to optimize the static and dynamic losses of the power semiconductor components, the stop zone is provided with donors which have at least one donor level which lies within the band gap of silicon and is at least 200 meV away from the conduction band edge of silicon.
摘要翻译： 功率半导体元件具有停止区域。 为了优化功率半导体部件的静态和动态损耗，停止区域具有供体，其具有位于硅的带隙内的至少一个施主电平，并且距离导电带边缘至少200meV 硅。
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35.发明授权Power semiconductor component with charge compensation structure and method for the fabrication thereof 有权具有电荷补偿结构的功率半导体元件及其制造方法公开(公告)号：US08263450B2
公开(公告)日：2012-09-11
申请号：US12350776
申请日：2009-01-08
申请人： Stefan Sedlmaier , Hans-Joachim Schulze , Anton Mauder , Helmut Strack , Armin Willmeroth , Frank Pfirsch
发明人： Stefan Sedlmaier , Hans-Joachim Schulze , Anton Mauder , Helmut Strack , Armin Willmeroth , Frank Pfirsch
IPC分类号： H01L21/00
CPC分类号： H01L29/7811 , H01L21/2205 , H01L21/2252 , H01L21/2255 , H01L23/291 , H01L23/298 , H01L29/0634 , H01L29/0661 , H01L29/1095 , H01L29/1604 , H01L29/1608 , H01L29/165 , H01L29/66712 , H01L29/7802 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component with charge compensation structure has a semiconductor body having a drift path between two electrodes. The drift path has drift zones of a first conduction type, which provide a current path between the electrodes in the drift path, while charge compensation zones of a complementary conduction type constrict the current path of the drift path. For this purpose, the drift path has two alternately arranged, epitaxially grown diffusion zone types, the first drift zone type having monocrystalline semiconductor material on a monocrystalline substrate, and a second drift zone type having monocrystalline semiconductor material in a trench structure, with complementarily doped walls, the complementarily doped walls forming the charge compensation zones.
摘要翻译： 具有电荷补偿结构的半导体部件具有在两个电极之间具有漂移路径的半导体本体。 漂移路径具有第一导电类型的漂移区域，其在漂移路径中的电极之间提供电流路径，而互补导电类型的电荷补偿区域限制漂移路径的电流路径。 为此，漂移路径具有两个交替布置的外延生长的扩散区类型，第一漂移区类型在单晶衬底上具有单晶半导体材料，以及在沟槽结构中具有单晶半导体材料的第二漂移区类型，具有互补掺杂 壁，形成电荷补偿区的互补掺杂壁。
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36.发明申请METHOD FOR TREATING AN OXYGEN-CONTAINING SEMICONDUCTOR WAFER, AND SEMICONDUCTOR COMPONENT 审中-公开用于处理含氧半导体波长的方法和半导体元件公开(公告)号：US20110042791A1
公开(公告)日：2011-02-24
申请号：US12161472
申请日：2007-01-19
IPC分类号： H01L29/08 , H01L21/26 , H01L21/322
CPC分类号： H01L21/26506 , H01L21/263 , H01L21/3221 , H01L21/3225 , H01L29/0873 , H01L29/0878 , H01L29/32 , H01L29/66704 , H01L29/66727 , H01L29/861
摘要： A method for treating an oxygen-containing semiconductor wafer, and semiconductor component. One embodiment provides a first side, a second side opposite the first side. A first semiconductor region adjoins the first side. A second semiconductor region adjoins the second side. The second side of the wafer is irridated such that lattice vacancies arise in the second semiconductor region. A first thermal process is carried out the duration of which is chosen such that oxygen agglomerates form in the second semiconductor region and that lattice vacancies diffuse from the first semiconductor region into the second semiconductor region.
摘要翻译： 一种处理含氧半导体晶片和半导体元件的方法。 一个实施例提供了第一侧，与第一侧相对的第二侧。 第一半导体区域邻接第一侧。 第二半导体区域邻接第二侧。 搅拌晶片的第二面使得在第二半导体区域中出现晶格空位。 进行第一热处理，其持续时间被选择为使得在第二半导体区域中形成氧团聚体，并且晶格空位从第一半导体区扩散到第二半导体区域。
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37.发明申请Capacitor Structure in Trench Structures of Semiconductor Devices and Semiconductor Devices Comprising Capacitor Structures of this Type and Methods for Fabricating the Same 有权包括这种类型的电容器结构的半导体器件和半导体器件的沟槽结构中的电容器结构及其制造方法公开(公告)号：US20100264456A1
公开(公告)日：2010-10-21
申请号：US12827035
申请日：2010-06-30
CPC分类号： H01L29/66181 , H01L27/10861 , H01L28/82
摘要： A capacitor structure in trench structures of a semiconductor device includes conductive regions made of metallic and/or semiconducting materials. The conducting regions are surrounded by a dielectric and form stacked layers in the trench structure of the semiconductor device.
摘要翻译： 半导体器件的沟槽结构中的电容器结构包括由金属和/或半导体材料制成的导电区域。 导电区域被电介质包围，并在半导体器件的沟槽结构中形成叠层。
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公开(公告)号：US07317252B2
公开(公告)日：2008-01-08
申请号：US10686849
申请日：2003-10-16
IPC分类号： H01L23/48
CPC分类号： H01L29/7802 , H01L29/1604 , H01L29/41766 , H01L29/456 , H01L29/7396 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： A contact configuration has an ohmic contact between a metalization layer and a semiconductor body of monocrystalline semiconductor material. An amorphous semiconductor layer is formed between the metalization layer and the monocrystalline semiconductor body. The layer is formed of the same semiconductor material as the body. The contact configuration is either produced by applying amorphous semiconductor material on the semiconductor body (e.g., sputtering, vapor deposition, glow discharge) or by damage formation in the semiconductor body.
摘要翻译： 接触构造在金属化层和单晶半导体材料的半导体本体之间具有欧姆接触。 在金属化层和单晶半导体本体之间形成非晶半导体层。 该层由与本体相同的半导体材料形成。 接触构造是通过在半导体本体上施加非晶半导体材料（例如溅射，气相沉积，辉光放电）或通过半导体本体中的损伤形成来制造的。
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39.发明授权公开(公告)号：US08786012B2
公开(公告)日：2014-07-22
申请号：US13542737
申请日：2012-07-06
申请人： Anton Mauder , Franz Hirler , Wolfgang Lehnert , Rudolf Berger , Klemens Pruegl , Hans-Joachim Schulze , Helmut Strack
发明人： Anton Mauder , Franz Hirler , Wolfgang Lehnert , Rudolf Berger , Klemens Pruegl , Hans-Joachim Schulze , Helmut Strack
IPC分类号： H01L29/66
CPC分类号： H01L21/28194 , H01L21/02109 , H01L21/02145 , H01L21/0228 , H01L29/0653 , H01L29/0878 , H01L29/1608 , H01L29/2003 , H01L29/402 , H01L29/407 , H01L29/408 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/51 , H01L29/513 , H01L29/66734 , H01L29/7393 , H01L29/7394 , H01L29/7397 , H01L29/7803 , H01L29/7811 , H01L29/7813 , H01L29/7835 , H01L29/792 , H01L29/8611
摘要： A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.
摘要翻译： 功率半导体器件具有半导体本体，该半导体本体包括有源区域和限定半导体本体的水平主表面的周边区域。 半导体本体还包括n型半导体层，pn结和至少一个沟槽。 n型半导体层嵌入半导体本体中并延伸到周边区域的主表面。 pn结布置在有源区域中的n型半导体层和主表面之间。 至少一个沟槽在外围区域中从主表面延伸到n型半导体层中，并且包括具有固定的负电荷的电介质层。 在垂直方向上，介电层布置在pn结的下方和上方。 具有固定负电荷的电介质层通常具有负的净电荷。 此外，提供了一种用于形成半导体器件的方法。
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公开(公告)号：US08748974B2
公开(公告)日：2014-06-10
申请号：US13542737
申请日：2012-07-06
申请人： Anton Mauder , Franz Hirler , Wolfgang Lehnert , Rudolf Berger , Klemens Pruegl , Hans-Joachim Schulze , Helmut Strack
发明人： Anton Mauder , Franz Hirler , Wolfgang Lehnert , Rudolf Berger , Klemens Pruegl , Hans-Joachim Schulze , Helmut Strack
IPC分类号： H01L29/66
摘要： A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.
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