公开(公告)号：US06884296B2

公开(公告)日：2005-04-26

申请号：US10226573

申请日：2002-08-23

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： C23C16/44 ,  C23C16/455 ,  C23C16/00 ,  C23F1/00 ,  H01L21/306

CPC分类号： C23C16/45574 ,  C23C16/45514 ,  C23C16/45544 ,  C23C16/45565

摘要： Reactors having gas distributors for depositing materials onto micro-device workpieces, systems that include such reactors, and methods for depositing materials onto micro-device workpieces are disclosed herein. In one embodiment, a reactor for depositing material on a micro-device workpiece includes a reaction chamber and a gas distributor in the reaction chamber. The gas distributor includes a first gas conduit having a first injector and a second gas conduit having a second injector. The first injector projects a first gas flow along a first vector and the second injector projects a second gas flow along a second vector that intersects the first vector in an external mixing zone facing the workpiece. In another embodiment, the mixing zone is an external mixing recess on a surface of the gas distributor that faces the workpiece.

摘要翻译： 具有用于将材料沉积到微器件工件上的气体分配器的反应器，包括这种反应器的系统以及将材料沉积到微器件工件上的方法在本文中公开。 在一个实施例中，用于在微器件工件上沉积材料的反应器包括在反应室中的反应室和气体分配器。 气体分配器包括具有第一喷射器的第一气体导管和具有第二喷射器的第二气体导管。 第一喷射器沿着第一矢量投射第一气流并且第二喷射器沿着与面向工件的外部混合区域中与第一矢量相交的第二矢量投射第二气流。 在另一个实施例中，混合区是在气体分配器的面向工件的表面上的外部混合凹部。

公开(公告)号：US06838293B2

公开(公告)日：2005-01-04

申请号：US10439774

申请日：2003-05-16

申请人： Cem Basceri ,  Dan Gealy ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Dan Gealy ,  Gurtej S. Sandhu

IPC分类号： C23C16/40 ,  C23C16/52 ,  H01L21/314 ,  H01L21/316 ,  H01L21/00

CPC分类号： H01L21/02271 ,  C23C16/409 ,  C23C16/52 ,  H01L21/02197 ,  H01L21/31691

摘要： A method for controlling stoichiometry of dielectric films, e.g., BST films, preferably formed at low deposition temperatures. A deposition process may use an adjustment in oxidizer flow and/or partial pressure, the provision of a hydrogen-containing component, an adjustment in hydrogen-containing component flow and/or partial pressure, an adjustment in deposition pressure, and/or a modification of system component parameters (e.g., heating a shower head or adjusting a distance between a shower head of the deposition system and a wafer upon which the film is to be deposited), to control the characteristics of the dielectric film, e.g., film stoichiometry.

摘要翻译： 用于控制电介质膜的化学计量的方法，例如BST膜，优选在低沉积温度下形成。 沉积过程可以使用氧化剂流和/或分压的调节，含氢组分的提供，含氢组分流和/或分压的调节，沉积压力的调节和/或修饰 的系统组件参数（例如，加热淋浴喷头或调整沉积系统的淋浴头与待沉积膜的晶片之间的距离），以控制电介质膜的特性，例如膜化学计量。

公开(公告)号：US06673669B2

公开(公告)日：2004-01-06

申请号：US10358727

申请日：2003-02-04

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L218242

CPC分类号： H01L28/55

摘要： A capacitor processing method includes forming a capacitor comprising first and second electrodes having a capacitor dielectric region therebetween. The first electrode interfaces with the capacitor dielectric region at a first interface. The second electrode interfaces with the capacitor dielectric region at a second interface. The capacitor dielectric region has a plurality of oxygen vacancies therein. After forming the capacitor, an electric field is applied to the capacitor dielectric region to cause oxygen vacancies to migrate towards one of the first and second interfaces. Oxygen atoms are preferably provided at the one interface effective to fill at least a portion of the oxygen vacancies in the capacitor dielectric region. Preferably at least a portion of the oxygen vacancies in the high k capacitor dielectric region are filled from oxide material comprising the first or second electrode most proximate the one interface. In one implementation, a DRAM processing method includes forming DRAM circuitry comprising DRAM array capacitors having a common cell electrode, respective storage node electrodes, and a high k capacitor dielectric region therebetween. A voltage is applied to at least one of the first and second electrodes to produce a voltage differential therebetween under conditions effective to cause oxygen vacancies in the high k capacitor dielectric region to migrate toward one of the cell electrode or the respective storage node electrodes and react with oxygen to fill at least a portion of the oxygen vacancies in the capacitor dielectric region.

摘要翻译： 电容器处理方法包括形成电容器，该电容器包括在其间具有电容器电介质区域的第一和第二电极。 第一电极在第一界面处与电容器介电区域接合。 第二电极在第二界面处与电容器介电区域接合。 电容器电介质区域中具有多个氧空位。 在形成电容器之后，电场被施加到电容器电介质区域，以引起氧空位向第一和第二界面之一迁移。 氧原子优选设置在有效填充电容器电介质区域中的氧空位的至少一部分的一个界面处。 优选地，高k电容器介电区域中的氧空位的至少一部分由包括最靠近一个界面的第一或第二电极的氧化物材料填充。 在一个实现中，DRAM处理方法包括形成DRAM电路，其包括DRAM阵列电容器，其具有公共单元电极，各自的存储节点电极和它们之间的高k电容器电介质区域。 电压施加到第一和第二电极中的至少一个，以在有效地引起高k电容器介电区域中的氧空位迁移到电池电极或相应存储节点电极之一的条件下产生它们之间的电压差，并且反应 用氧气填充电容器介质区域中的氧空位的至少一部分。

公开(公告)号：US08207563B2

公开(公告)日：2012-06-26

申请号：US11638931

申请日：2006-12-13

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L27/108

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852

摘要： A method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes comprising sidewalls. The plurality of capacitor electrodes are supported at least in part with a retaining structure which engages the sidewalls, with the retaining structure comprising a fluid pervious material. A capacitor dielectric material is deposited over the capacitor electrodes through the fluid pervious material of the retaining structure effective to deposit capacitor dielectric material over portions of the sidewalls received below the retaining structure. Capacitor electrode material is deposited over the capacitor dielectric material through the fluid pervious material of the retaining structure effective to deposit capacitor electrode material over at least some of the capacitor dielectric material received below the retaining structure. Integrated circuitry independent of method of fabrication is also contemplated.

摘要翻译： 形成多个电容器的方法包括提供包括侧壁的多个电容器电极。 多个电容器电极至少部分地由与侧壁接合的保持结构支撑，保持结构包括透液材料。 电容器电介质材料沉积在电容器电极上，通过保持结构的流体可渗透材料，其有效地将电容器电介质材料沉积在容纳在保持结构下方的侧壁的部分上。 电容器电极材料通过保持结构的流体可透过材料沉积在电容器介电材料上，有效地将电容器电极材料沉积在容纳在保持结构下方的电容器电介质材料的至少一些之上。 还考虑了与制造方法无关的集成电路。

公开(公告)号：US20120120549A1

公开(公告)日：2012-05-17

申请号：US13293778

申请日：2011-11-10

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01G9/00

CPC分类号： H01L21/0228 ,  C23C16/029 ,  C23C16/18 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02183 ,  H01L21/28562 ,  H01L21/31604 ,  H01L21/31683 ,  H01L28/40 ,  H01L28/60 ,  Y10T428/24917 ,  Y10T428/24926

摘要： An interface forming method includes forming a first layer containing a first chemical element and chemisorbing on the first layer an interface layer containing at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element. A second layer comprising the second chemical element can be formed on the interface layer. The first layer might not substantially contain the second chemical element, the second layer might not substantially contain the first chemical element, or both. An apparatus can include a first layer containing a first chemical element, an interface layer chemisorbed on the first layer, and a second layer containing a second element on the interface layer. The interface layer can contain at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element.

摘要翻译： 界面形成方法包括在第一层上形成含有第一化学元素和化学吸附的第一层，所述界面层含有与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。 包含第二化学元素的第二层可以形成在界面层上。 第一层可能基本上不包含第二化学元素，第二层可能基本上不含有第一化学元素，或两者都不包含。 装置可以包括含有第一化学元素的第一层，在第一层上化学吸附的界面层和在界面层上含有第二元素的第二层。 界面层可以包含与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。

公开(公告)号：USRE43025E1

公开(公告)日：2011-12-13

申请号：US12566533

申请日：2009-09-24

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： B32B9/00

CPC分类号： H01L21/0228 ,  C23C16/029 ,  C23C16/18 ,  C23C16/405 ,  C23C16/45525 ,  H01L21/02183 ,  H01L21/28562 ,  H01L21/31604 ,  H01L21/31683 ,  H01L28/40 ,  H01L28/60 ,  Y10T29/417 ,  Y10T428/24917 ,  Y10T428/24926

摘要： An interface forming method includes forming a first layer containing a first chemical element and chemisorbing on the first layer an interface layer containing at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element. A second layer comprising the second chemical element can be formed on the interface layer. The first layer might not substantially contain the second chemical element, the second layer might not substantially contain the first chemical element, or both. An apparatus can include a first layer containing a first chemical element, an interface layer chemisorbed on the first layer, and a second layer containing a second element on the interface layer. The interface layer can contain at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element.

摘要翻译： 界面形成方法包括在第一层上形成含有第一化学元素和化学吸附的第一层，所述界面层含有与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。 包含第二化学元素的第二层可以形成在界面层上。 第一层可能基本上不包含第二化学元素，第二层可能基本上不含有第一化学元素，或两者都不包含。 装置可以包括含有第一化学元素的第一层，在第一层上化学吸附的界面层和在界面层上含有第二元素的第二层。 界面层可以包含与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。

公开(公告)号：US07633116B2

公开(公告)日：2009-12-15

申请号：US11782442

申请日：2007-07-24

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L29/792

CPC分类号： G11C11/5671 ,  G11C8/12 ,  G11C16/0416 ,  G11C16/0466 ,  H01L29/513 ,  H01L29/792

摘要： One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.

摘要翻译： 单晶体管存储器件通过操纵场效应晶体管（FET）的俘获层内的氧空位来促进非易失性数据存储，从而提供晶体管的阈值电压的控制和变化。 可以为各种阈值电压分配数据值，提供将一个或多个位数据存储在单个存储器单元中的能力。 为了控制阈值电压，可以通过在空位内捕获电子来操纵氧空位，从空位释放被俘获的电子，移动捕获层内的空位并湮灭空位。

公开(公告)号：US07585728B2

公开(公告)日：2009-09-08

申请号：US11837149

申请日：2007-08-10

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L21/336

CPC分类号： G11C11/5671 ,  G11C8/12 ,  G11C16/0416 ,  G11C16/0466 ,  H01L29/513 ,  H01L29/792

摘要： One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.

摘要翻译： 单晶体管存储器件通过操纵场效应晶体管（FET）的俘获层内的氧空位来促进非易失性数据存储，从而提供晶体管的阈值电压的控制和变化。 可以为各种阈值电压分配数据值，提供将一个或多个位数据存储在单个存储器单元中的能力。 为了控制阈值电压，可以通过在空位内捕获电子来操纵氧空位，从空位释放被俘获的电子，移动捕获层内的空位并湮灭空位。

公开(公告)号：US07517758B2

公开(公告)日：2009-04-14

申请号：US11256430

申请日：2005-10-20

申请人： Nirmal Ramaswamy ,  Gurtej S. Sandhu ,  Cem Basceri ,  Eric R. Blomiley

发明人： Nirmal Ramaswamy ,  Gurtej S. Sandhu ,  Cem Basceri ,  Eric R. Blomiley

IPC分类号： H01L21/336

CPC分类号： H01L29/66787 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/66553 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/78642

摘要： The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括形成外延含硅材料的方法和形成垂直晶体管的方法。 在一个实施方案中，形成外延含硅材料的方法包括提供包括单晶材料的衬底。 单晶材料的第一部分向外暴露，而单晶材料的第二部分被掩蔽。 第一含硅层从第一部分的暴露的单晶材料而不是被掩蔽的第二部分的单晶材料外延生长。 在生长第一含硅层之后，单晶材料的第二部分被未掩蔽。 然后从第一含硅层和第二部分的未掩模的单晶材料外延生长第二含硅层。 考虑了其他方面和实现。

公开(公告)号：US07482239B2

公开(公告)日：2009-01-27

申请号：US11515432

申请日：2006-08-31

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L21/20

CPC分类号： H01L29/66181 ,  H01L28/91

摘要： In one implementation, an opening within a capacitor electrode forming layer is formed over a substrate. A spacing layer is deposited over the capacitor electrode forming layer to within the opening over at least upper portions of sidewalls of the opening. The spacing layer is formed to be laterally thicker at an elevationally outer portion within the opening as compared to an elevationally inner portion within the opening. A spacer is formed within the opening by anisotropically etching the spacing layer. The spacer is laterally thicker at an elevationally outer portion within the opening as compared to an elevationally inner portion within the opening. After forming a first capacitor electrode layer laterally over the spacer, at least a portion of the spacer is removed and a capacitor dielectric region and a second capacitor electrode layer are formed over the first capacitor electrode layer.

摘要翻译： 在一个实施方案中，电容器电极形成层之间的开口形成在衬底上。 间隔层沉积在电容器电极形成层上方至少在开口侧壁的上部的开口内。 与开口内的高度内部相比，间隔层形成为在开口内的正面外侧处侧向变厚。 通过各向异性蚀刻间隔层，在开口内形成间隔物。 与开口内的正面内部相比，间隔件在开口内的正面外侧处侧向变厚。 在间隔物上横向形成第一电容器电极层之后，去除间隔物的至少一部分，并且在第一电容器电极层上方形成电容器电介质区域和第二电容器电极层。