公开(公告)号：US20110205708A1

公开(公告)日：2011-08-25

申请号：US12711455

申请日：2010-02-24

申请人： Paul S. Andry ,  Thomas J. Brunschwiler ,  Evan G. Colgan ,  John H. Magerlein

发明人： Paul S. Andry ,  Thomas J. Brunschwiler ,  Evan G. Colgan ,  John H. Magerlein

IPC分类号： H05K7/20 ,  H01L21/50

CPC分类号： H01L23/473 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/0401

摘要： A plurality of heat-dissipating electronic chips are arranged in a vertical chip stack. The electronic chips have electronic components thereon. A cold plate is secured to a back side of the chip stack. A silicon carrier sandwich, defining a fluid cavity, is secured to a front side of the chip stack. An inlet manifold is configured to supply cooling fluid to the cold plate and the fluid cavity of the silicon carrier sandwich. An outlet manifold is configured to receive the cooling fluid from the cold plate and the fluid cavity of the silicon carrier sandwich. The cold plate, the silicon carrier sandwich, the inlet manifold, and the outlet manifold are configured and dimensioned to electrically isolate the cooling fluid from the electronic components. A method of operating an electronic apparatus and a method of manufacturing an electronic apparatus are also disclosed. Single-sided heat removal with double-sided electrical input-output and double-sided heat removal with double-sided electrical input-output are also disclosed.

摘要翻译： 多个散热电子芯片布置在垂直芯片堆叠中。 电子芯片上有电子部件。 冷板固定在芯片堆叠的背面。 限定流体腔的硅载体夹层固定到芯片组的前侧。 入口歧管构造成将冷却流体供应到冷却板和硅载体三明治的流体腔。 出口歧管构造成从冷板和硅载体三明治的流体腔接收冷却流体。 冷板，硅载体夹层，入口歧管和出口歧管的构造和尺寸被设计成将冷却流体与电子部件电隔离。 还公开了操作电子设备的方法和制造电子设备的方法。 还公开了具有双面电输入输出和双面电输入输出的双面除热的单面除热。

公开(公告)号：US07990711B1

公开(公告)日：2011-08-02

申请号：US12711455

申请日：2010-02-24

申请人： Paul S. Andry ,  Thomas J. Brunschwiler ,  Evan G. Colgan ,  John H. Magerlein

发明人： Paul S. Andry ,  Thomas J. Brunschwiler ,  Evan G. Colgan ,  John H. Magerlein

IPC分类号： H05K7/20

CPC分类号： H01L23/473 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/0401

摘要： A plurality of heat-dissipating electronic chips are arranged in a vertical chip stack. The electronic chips have electronic components thereon. A cold plate is secured to a back side of the chip stack. A silicon carrier sandwich, defining a fluid cavity, is secured to a front side of the chip stack. An inlet manifold is configured to supply cooling fluid to the cold plate and the fluid cavity of the silicon carrier sandwich. An outlet manifold is configured to receive the cooling fluid from the cold plate and the fluid cavity of the silicon carrier sandwich. The cold plate, the silicon carrier sandwich, the inlet manifold, and the outlet manifold are configured and dimensioned to electrically isolate the cooling fluid from the electronic components. A method of operating an electronic apparatus and a method of manufacturing an electronic apparatus are also disclosed. Single-sided heat removal with double-sided electrical input-output and double-sided heat removal with double-sided electrical input-output are also disclosed.

摘要翻译： 多个散热电子芯片布置在垂直芯片堆叠中。 电子芯片上有电子部件。 冷板固定在芯片堆叠的背面。 限定流体腔的硅载体夹层固定到芯片组的前侧。 入口歧管构造成将冷却流体供应到冷却板和硅载体三明治的流体腔。 出口歧管构造成从冷板和硅载体三明治的流体腔接收冷却流体。 冷板，硅载体夹层，入口歧管和出口歧管的构造和尺寸被设计成将冷却流体与电子部件电隔离。 还公开了操作电子设备的方法和制造电子设备的方法。 还公开了具有双面电输入输出和双面电输入输出的双面除热的单面除热。

公开(公告)号：US07928562B2

公开(公告)日：2011-04-19

申请号：US12177194

申请日：2008-07-22

申请人： Amilcar R. Arvelo ,  Evan G. Colgan ,  John H. Magerlein ,  Kenneth C. Marston ,  Kathryn C. Rivera ,  Kamal K. Sikka ,  Jamil A. Wakil ,  Xiaojin Wei ,  Jeffrey A. Zitz

发明人： Amilcar R. Arvelo ,  Evan G. Colgan ,  John H. Magerlein ,  Kenneth C. Marston ,  Kathryn C. Rivera ,  Kamal K. Sikka ,  Jamil A. Wakil ,  Xiaojin Wei ,  Jeffrey A. Zitz

IPC分类号： H01L23/36

CPC分类号： H01L23/3675 ,  H01L21/563 ,  H01L23/10 ,  H01L23/42 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2924/00

摘要： An apparatus to reduce a thermal penalty of a three-dimensional (3D) die stack for use in a computing environment is provided and includes a substrate installed within the computing environment, a first component to perform operations of the computing environment, which is coupled to the substrate in a stacking direction, a set of second components to perform operations of the computing environment, each of which is coupled to the first component and segmented with respect to one another to form a vacated region, a thermal interface material (TIM) disposed on exposed surfaces of the first and second components, and a lid, including a protrusion, coupled to the substrate to overlay the first and second components such that the protrusion extends into the vacated region and such that surfaces of the lid and the protrusion thermally communicate with the first and second components via the TIM.

摘要翻译： 提供了一种用于减少在计算环境中使用的三维（3D）裸片堆栈的热惩罚的装置，并且包括安装在计算环境内的基板，执行计算环境的操作的第一部件，其耦合到 所述基板在堆叠方向上，一组第二部件，用于执行所述计算环境的操作，每个部件耦合到所述第一部件并相对于彼此分割以形成空出的区域;布置在所述热界面材料（TIM） 在第一和第二部件的暴露的表面上，以及包括突起的盖，其连接到基板以覆盖第一和第二部件，使得突起延伸到空出的区域中，并且使得盖和突起的表面热连通 第一和第二组件通过TIM。

公开(公告)号：US07863070B2

公开(公告)日：2011-01-04

申请号：US12049836

申请日：2008-03-17

申请人： Evan G. Colgan ,  Bruce K. Furman ,  Christopher V. Jahnes

发明人： Evan G. Colgan ,  Bruce K. Furman ,  Christopher V. Jahnes

IPC分类号： H01L21/00

CPC分类号： B81C1/00293 ,  B81C2203/0145

摘要： Apparatus and methods are provided for enabling wafer-scale encapsulation of microelectromechanical (MEM) devices (e.g., resonators, filters) to protect the MEMs from the ambient and to provide either a controlled ambient or a reduced pressure. In particular, methods for wafer-scale encapsulation of MEM devices are provided, which enable encapsulation of MEM devices under desired ambient conditions that are not determined by the deposition conditions of a sealing process in which MEM release via holes are sealed or pinched-off, and which prevent sealing material from being inadvertently deposited on the MEM device during the sealing process.

摘要翻译： 提供了设备和方法，用于实现微机电（MEM）装置（例如，谐振器，滤波器）的晶片级封装，以保护MEM免受环境影响，并提供受控的环境或减压。 特别地，提供了用于MEM器件的晶片级封装的方法，其能够在期望的环境条件下封装MEM器件，所述环境条件不是通过其中MEM释放通孔被密封或夹断的密封工艺的沉积条件来确定的， 并且其在密封过程中防止密封材料被无意中沉积在MEM装置上。

公开(公告)号：US07665999B2

公开(公告)日：2010-02-23

申请号：US12270956

申请日：2008-11-14

申请人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

发明人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC分类号： H01R12/00

CPC分类号： H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

摘要： A module arrangement which includes a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a moldable dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

摘要翻译： 一种模块装置，其包括包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并且由可模制的介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入件的表面布置，并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US20090119916A1

公开(公告)日：2009-05-14

申请号：US12208581

申请日：2008-09-11

申请人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

发明人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC分类号： H01R43/20

CPC分类号： H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

摘要： A method of producing a module arrangement which includes a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

摘要翻译： 一种制造模块装置的方法，其包括包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US20090070999A1

公开(公告)日：2009-03-19

申请号：US12270956

申请日：2008-11-14

申请人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

发明人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC分类号： H01R43/16

CPC分类号： H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

摘要： A method of producing a module arrangement which includes a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

摘要翻译： 一种制造模块装置的方法，其包括包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US20090049688A1

公开(公告)日：2009-02-26

申请号：US12127432

申请日：2008-05-27

申请人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

发明人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC分类号： H05K3/00

CPC分类号： H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

摘要： A method of producing a land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane.

摘要翻译： 一种制造包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入件的方法。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机

公开(公告)号：US20080315403A1

公开(公告)日：2008-12-25

申请号：US12134883

申请日：2008-06-06

申请人： Paul S. Andry ,  Evan G. Colgan ,  Lawrence S. Mok ,  Chirag S. Patel ,  David E. Seeger

发明人： Paul S. Andry ,  Evan G. Colgan ,  Lawrence S. Mok ,  Chirag S. Patel ,  David E. Seeger

IPC分类号： H01L23/46

CPC分类号： H01L23/473 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/15311 ,  H01L2224/0401

摘要： Apparatus and methods are provided for integrating microchannel cooling modules within high-density electronic modules (e.g., chip packages, system-on-a-package modules, etc.,) comprising multiple high-performance IC chips. Electronic modules are designed such that high-performance (high power) IC chips are disposed in close proximity to the integrated cooling module (or cooling plate) for effective heat extraction. Moreover, electronic modules which comprise large surface area silicon carriers with multiple chips face mounted thereon are designed such that integrated silicon cooling modules are rigidly bonded to the back surfaces of such chips to increase the structural integrity of the silicon carriers.

摘要翻译： 提供了用于将微通道冷却模块集成在包括多个高性能IC芯片的高密度电子模块（例如，芯片封装，系统级封装模块等）中的装置和方法。 电子模块被设计成使得高性能（大功率）IC芯片被布置成靠近集成冷却模块（或冷却板）以有效地提取热量。 此外，包括具有多个芯片面的大表面积硅载体的电子模块被设计成使得集成的硅冷却模块刚性地结合到这种芯片的背面以增加硅载体的结构完整性。

公开(公告)号：US20080307645A1

公开(公告)日：2008-12-18

申请号：US12047603

申请日：2008-03-13

申请人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

发明人： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC分类号： H01R43/16

CPC分类号： H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

摘要： A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.