Physical quantity sensor having multiple through holes
    31.
    发明申请
    Physical quantity sensor having multiple through holes 有权
    物理量传感器具有多个通孔

    公开(公告)号:US20050229704A1

    公开(公告)日:2005-10-20

    申请号:US11095469

    申请日:2005-04-01

    IPC分类号: B81B3/00 G01C19/56 G01P15/125

    CPC分类号: G01C19/5719 G01P15/125

    摘要: A semiconductor physical quantity sensor includes: a substrate; a semiconductor layer supported on the substrate; a trench disposed in the semiconductor layer; and a movable portion disposed in the semiconductor layer and separated from the substrate by the trench. The movable portion includes a plurality of through-holes, each of which penetrates the semiconductor layer in a thickness direction. The movable portion is capable of displacing on the basis of a physical quantity applied to the movable portion so that the physical quantity is detected by a displacement of the movable portion. The movable portion has a junction disposed among the through-holes. The junction has a trifurcate shape.

    摘要翻译: 半导体物理量传感器包括:基板; 支撑在基板上的半导体层; 设置在所述半导体层中的沟槽; 以及可移动部分,其设置在所述半导体层中并且通过所述沟槽与所述衬底分离。 可动部包括在厚度方向上贯穿半导体层的多个贯通孔。 可移动部分能够基于施加到可移动部分的物理量来移位,使得通过可移动部分的位移来检测物理量。 可动部分具有设置在通孔中的接合部。 交界处有三叉形。

    Light-emitting semiconductor device using group III Nitrogen compound
having emission layer doped with donor and acceptor impurities
    34.
    发明授权
    Light-emitting semiconductor device using group III Nitrogen compound having emission layer doped with donor and acceptor impurities 失效
    使用III族氮化合物的发光半导体器件具有掺杂有供体和受主杂质的发射层

    公开(公告)号:US6005258A

    公开(公告)日:1999-12-21

    申请号:US806646

    申请日:1997-02-26

    摘要: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.x3 Ga.sub.1-x3).sub.y3 In.sub.1-y3 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N emission layer (5), and a Mg-doped (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N p-layer (6). The AlN layer (2)--is 500 .ANG. in thickness. The GaN N.sup.+ -layer (3) is about 2.0 .mu.m in thickness and has an electron concentration of about 2.times.10.sup.18 /cm.sup.3. The n.sup.+ -layer (4) is about 2.0 .mu.m in thickness and has an electron concentration of about 2.times.10.sup.18 /cn.sup.3. The emission layer (5) is about 0.5 .mu.m in thickness. The p-layer 6 is about 1.0 .mu.m in thickness and has a hole concentration of about 2.times.10.sup.17 /cm.sup.3. Nickel electrodes (7, 8) are connected to the p-layer (6) and n.sup.+ -layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8) from each other. The composition ration of Al, Ga, and In in each of the layers (4, 5, 6) is selected to meet the lattice constant of GaN in the n.sup.+ -layer (3). The LED (10) is designed to improve luminous intensity and to obtain a purer blue color.

    摘要翻译: 发光半导体器件(10)连续地包括蓝宝石衬底(1),AlN缓冲层(2),高载流子(n型)掺杂的硅(Si)掺杂的GaN n +层(3), 具有高载流子(n型)浓度的Si掺杂(Al x Ga 1-x 3)y 3 In 1-y 3 N n +层(4),锌(Zn)和Si掺杂(Alx2Ga1-x2)y2In1-y2N发射层(5) 和Mg掺杂(Al x Ga 1-x 1)y 1 In 1-y 1 N p层(6)。 AlN层(2) - 厚度为500 ANGSTROM。 GaN N +层(3)的厚度约为2.0μm,电子浓度约为2×1018 / cm3。 n +层(4)的厚度约为2.0μm,电子浓度约为2×10 18 / cn 3。 发射层(5)的厚度约为0.5μm。 p层6的厚度为约1.0μm,并且具有约2×10 17 / cm 3的空穴浓度。 镍电极(7,8)分别连接到p层(6)和n +层(4)。 沟槽(9)将电极(7,8)彼此电绝缘。 选择各层(4,5,6)中的Al,Ga和In的组成比来满足n +层(3)中的GaN的晶格常数。 LED(10)被设计成改善发光强度并获得更纯的蓝色。

    Semiconductor device
    35.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US09466711B2

    公开(公告)日:2016-10-11

    申请号:US12865330

    申请日:2009-01-28

    摘要: Between a source electrode (25) of a main device (24) and a current sensing electrode (22) of a current detection device (21), a resistor for detecting current is connected. Dielectric withstand voltage of gate insulator (36) is larger than a product of the resistor and maximal current flowing through the current detection device (21) with reverse bias. A diffusion length of a p-body region (32) of the main device (24) is shorter than that of a p-body (31) of the current detection device (21). A curvature radius at an end portion of the p-body region (32) of the main device (24) is smaller than that of the p-body (31) of the current detection device (21). As a result, at the inverse bias, electric field at the end portion of the p-body region (32) of the main device (24) becomes stronger than that of the p-body region (31) of the current detection device (21). Consequently, avalanche breakdown tends to occur earlier in the main device 24 than the current detection device (21).

    摘要翻译: 在主装置(24)的源电极(25)和电流检测装置(21)的电流检测电极(22)之间连接用于检测电流的电阻器。 栅极绝缘体(36)的介电耐受电压大于电阻器和流过电流检测装置(21)的反向偏压的最大电流的乘积。 主装置(24)的p体区域(32)的扩散长度短于电流检测装置(21)的p体(31)的扩散长度。 主装置(24)的p体区域(32)的端部的曲率半径比电流检测装置(21)的p体(31)的曲率半径小。 结果,在逆偏压下,主装置(24)的p体区域(32)的端部的电场变得比电流检测装置的p体区域(31)的电场强 21)。 因此,主装置24中的雪崩击穿比电流检测装置(21)更容易发生。

    Semiconductor device
    36.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US09099387B2

    公开(公告)日:2015-08-04

    申请号:US13171115

    申请日:2011-06-28

    摘要: A semiconductor device includes an n-conductive type semiconductor substrate having a main side and a rear side, a p-conductive type layer arranged over the main side of the substrate, a main side n-conductive type region arranged in the p-conductive type layer, a rear side n-conductive type layer arranged over the rear side of the substrate, a first trench which reaches the substrate and penetrates the main side n-conductive type region and the p-conductive type layer, a second trench which reaches an inside of the p-conductive type layer, a second electrode layer, which is embedded in the second trench and connected to the p-conductive type layer. Hereby, the semiconductor device, in which the recovery property of a diode cell can be improved without damaging the property of a MOS transistor cell or an IGBT cell and the surge withstand property does not deteriorate, can be obtained.

    摘要翻译: 半导体器件包括具有主侧和后侧的n导电型半导体衬底,布置在衬底的主侧上的p导电型层,以p导电型布置的主侧n导电型区域 层,布置在基板的后侧上的后侧n导电型层,到达基板并穿透主侧n导电型区域和p导电型层的第一沟槽,到达基板的第二沟槽 在p导电型层的内部,嵌入在第二沟槽中并连接到p导电型层的第二电极层。 因此,可以获得其中二极管电池的恢复特性可以在不损害MOS晶体管单元或IGBT单元的性能而不损坏浪涌耐受性的情况下得到的半导体器件。

    Fabrication method of semiconductor device
    37.
    发明授权
    Fabrication method of semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号:US08691635B2

    公开(公告)日:2014-04-08

    申请号:US13557674

    申请日:2012-07-25

    摘要: A semiconductor device includes a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type, disposed on a surface of the first semiconductor region, and having an impurity concentration higher than that of the first semiconductor region; a trench that penetrates the second semiconductor region to reach the first semiconductor region; a first electrode disposed inside the trench via an insulating film; a first recess portion disposed deeper than an upper end of the first electrode, in a surface layer of the second semiconductor region, so as to be in contact with the trench; and a second electrode embedded in the first recess portion.

    摘要翻译: 半导体器件包括第一导电类型的第一半导体区域; 第二导电类型的第二半导体区域,设置在第一半导体区域的表面上,杂质浓度高于第一半导体区域; 穿过第二半导体区域到达第一半导体区域的沟槽; 经由绝缘膜设置在所述沟槽内的第一电极; 在所述第二半导体区域的表面层中设置为比所述第一电极的上端深的第一凹部,以与所述沟槽接触; 以及嵌入在第一凹部中的第二电极。

    FABRICATION METHOD OF SEMICONDUCTOR DEVICE
    38.
    发明申请
    FABRICATION METHOD OF SEMICONDUCTOR DEVICE 有权
    半导体器件的制造方法

    公开(公告)号:US20120289012A1

    公开(公告)日:2012-11-15

    申请号:US13557674

    申请日:2012-07-25

    IPC分类号: H01L21/336

    摘要: A semiconductor device includes a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type, disposed on a surface of the first semiconductor region, and having an impurity concentration higher than that of the first semiconductor region; a trench that penetrates the second semiconductor region to reach the first semiconductor region; a first electrode disposed inside the trench via an insulating film; a first recess portion disposed deeper than an upper end of the first electrode, in a surface layer of the second semiconductor region, so as to be in contact with the trench; and a second electrode embedded in the first recess portion.

    摘要翻译: 半导体器件包括第一导电类型的第一半导体区域; 第二导电类型的第二半导体区域,设置在第一半导体区域的表面上,杂质浓度高于第一半导体区域; 穿过第二半导体区域到达第一半导体区域的沟槽; 经由绝缘膜设置在所述沟槽内的第一电极; 在所述第二半导体区域的表面层中设置为比所述第一电极的上端深的第一凹部,以与所述沟槽接触; 以及嵌入在第一凹部中的第二电极。

    SEMICONDUCTOR DEVICE HAVING INSULATED GATE SEMICONDUCTOR ELEMENT, AND INSULATED GATE BIPOLAR TRANSISTOR
    39.
    发明申请
    SEMICONDUCTOR DEVICE HAVING INSULATED GATE SEMICONDUCTOR ELEMENT, AND INSULATED GATE BIPOLAR TRANSISTOR 有权
    具有绝缘栅半导体元件和绝缘栅双极晶体管的半导体器件

    公开(公告)号:US20110220962A1

    公开(公告)日:2011-09-15

    申请号:US13115137

    申请日:2011-05-25

    IPC分类号: H01L29/739

    摘要: A semiconductor device having an IGBT includes: a substrate; a drift layer and a base layer on the substrate; trenches penetrating the base layer to divide the base layer into base parts; an emitter region in one base part; a gate element in the trenches; an emitter electrode; and a collector electrode. The one base part provides a channel layer, and another base part provides a float layer having no emitter region. The gate element includes a gate electrode next to the channel layer and a dummy gate electrode next to the float layer. The float layer includes a first float layer adjacent to the channel layer and a second float layer apart from the channel layer. The dummy gate electrode and the first float layer are coupled with a first float wiring on the base layer. The dummy gate electrode is isolated from the second float layer.

    摘要翻译: 具有IGBT的半导体器件包括:基板; 衬底上的漂移层和基底层; 穿过基层的沟槽将基层分成基部; 一个基部的发射极区域; 沟槽中的栅极元件; 发射极; 和集电极。 一个基座部分提供通道层,而另一个基座部件提供没有发射极区域的浮动层。 栅极元件包括靠近沟道层的栅极电极和与浮置层相邻的伪栅极电极。 浮子层包括与沟道层相邻的第一浮动层和与沟道层分开的第二浮体层。 虚拟栅电极和第一浮动层与基层上的第一浮动布线耦合。 虚拟栅电极与第二浮动层隔离。

    Semiconductor device and manufacturing method thereof
    40.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体器件及其制造方法

    公开(公告)号:US07999314B2

    公开(公告)日:2011-08-16

    申请号:US12213469

    申请日:2008-06-19

    摘要: A semiconductor device includes an n-conductive type semiconductor substrate having a main side and a rear side, a p-conductive type layer arranged over the main side of the substrate, a main side n-conductive type region arranged in the p-conductive type layer, a rear side n-conductive type layer arranged over the rear side of the substrate, a first trench which reaches the substrate and penetrates the main side n-conductive type region and the p-conductive type layer, a second trench which reaches an inside of the p-conductive type layer, a second electrode layer, which is embedded in the second trench and connected to the p-conductive type layer. Hereby, the semiconductor device, in which the recovery property of a diode cell can be improved without damaging the property of a MOS transistor cell or an IGBT cell and the surge withstand property does not deteriorate, can be obtained.

    摘要翻译: 半导体器件包括具有主侧和后侧的n导电型半导体衬底,布置在衬底的主侧上的p导电型层,以p导电型布置的主侧n导电型区域 层,布置在基板的后侧上的后侧n导电型层,到达基板并穿透主侧n导电型区域和p导电型层的第一沟槽,到达基板的第二沟槽 在p导电型层的内部,嵌入在第二沟槽中并连接到p导电型层的第二电极层。 因此,可以获得其中二极管电池的恢复特性可以在不损害MOS晶体管单元或IGBT单元的性能而不损坏浪涌耐受性的情况下得到的半导体器件。