公开(公告)号：US08692377B2

公开(公告)日：2014-04-08

申请号：US13069744

申请日：2011-03-23

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC分类号： H01L23/498

CPC分类号： H01L24/97 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49551 ,  H01L23/49582 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： An integrated circuit packaging system and method of manufacture thereof includes: an L-plated lead; a die conductively connected to the L-plated lead; and an encapsulant encapsulating the L-plated lead and the die.

摘要翻译： 集成电路封装系统及其制造方法包括：镀L引线; 导电地连接到L镀层导线的模具; 以及封装L镀层引线和芯片的密封剂。

公开(公告)号：US08592252B2

公开(公告)日：2013-11-26

申请号：US12858593

申请日：2010-08-18

申请人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

发明人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

IPC分类号： H01L21/50 ,  H01L21/78

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.

公开(公告)号：US08536690B2

公开(公告)日：2013-09-17

申请号：US12564852

申请日：2009-09-22

申请人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Guruprasad Badakere Govindaiah

发明人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Guruprasad Badakere Govindaiah

IPC分类号： H01L23/495

CPC分类号： H01L24/48 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/5286 ,  H01L24/29 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/078 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: attaching a semiconductor die to a die pad of a leadframe; forming a cap layer on top of the semiconductor die for acting as a ground plane or a power plane; and connecting the semiconductor die to the cap layer through a cap bonding wire.

摘要翻译： 一种集成电路封装系统的制造方法，包括：将半导体管芯附接到引线框架的管芯焊盘; 在所述半导体管芯的顶部上形成盖层，用作接地层或电源层; 以及通过盖接合线将半导体管芯连接到盖层。

公开(公告)号：US08278148B2

公开(公告)日：2012-10-02

申请号：US11854989

申请日：2007-09-13

申请人： Jeffrey D. Punzalan ,  Jairus Legaspi Pisigan ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho

发明人： Jeffrey D. Punzalan ,  Jairus Legaspi Pisigan ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho

IPC分类号： H01L23/495

CPC分类号： H01L23/49503 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： An integrated circuit package system is provided including forming a leadframe having a frame and a die paddle having leads thereon. The leads are held with respect to the die paddle. The leads are separated from the die paddle, and a die is attached to the die paddle. Bond wires are bonded between the leads and the die. The die and bond wires are encapsulated. The leadframe is singulated to separate the frame and the die paddle.

摘要翻译： 提供了一种集成电路封装系统，包括形成具有框架的引线框架和在其上具有引线的管芯焊盘。 导线相对于芯片被保持。 引线与管芯分离，并且管芯附接到管芯焊盘。 接合线结合在引线和芯片之间。 管芯和接合线被封装。 引导框架被单独分离框架和模具桨。

公开(公告)号：US08258614B2

公开(公告)日：2012-09-04

申请号：US11938371

申请日：2007-11-12

申请人： Zigmund Ramirez Camacho ,  Jairus Legaspi Pisigan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Jairus Legaspi Pisigan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

IPC分类号： H01L23/06

CPC分类号： H01L25/03 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package system comprising: providing a substrate having a cavity; sealing a package over the cavity of the substrate; and forming an encapsulant over the package and a portion of the substrate substantially preventing the encapsulant from forming in the cavity.

摘要翻译： 一种集成电路封装系统，包括：提供具有空腔的衬底; 将封装密封在衬底的空腔上; 以及在所述封装上形成密封剂，并且所述衬底的一部分基本上防止所述密封剂在所述空腔中形成。

公开(公告)号：US08252666B2

公开(公告)日：2012-08-28

申请号：US12858615

申请日：2010-08-18

申请人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

发明人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

IPC分类号： H01L21/30

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.

摘要翻译： 半导体晶片包含多个半导体管芯。 切割半导体晶片以分离半导体管芯。 将半导体管芯转移到载体上。 在载体上的半导体管芯的周围形成管芯延伸区域。 载体被移除。 在管芯延伸区域中的第一和第二偏移行中形成多个通孔通孔（THV）。 导电材料沉积在THV中。 第一RDL形成在半导体管芯上的接触焊盘和THV之间。 第二RDL形成在与THV电接触的半导体管芯的背面上。 形成与第二RDL电接触的凸块下金属化。 在凸块下方形成焊料凸块。 单芯片延伸区域以分离半导体管芯。

公开(公告)号：US08252634B2

公开(公告)日：2012-08-28

申请号：US12488043

申请日：2009-06-19

申请人： Zigmund Ramirez Camacho ,  Jose Alvin Caparas ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Jose Alvin Caparas ,  Lionel Chien Hui Tay

IPC分类号： H01L21/00

CPC分类号： H01L23/4951 ,  H01L23/3135 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49572 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of manufacture of an integrated circuit packaging system includes: providing inwardly converging leadfingers having continuously decreasing widths along lengths thereof to inward ends thereof; electrically connecting an integrated circuit device on the leadfingers only on portions of the continuously decreasing widths; and encapsulating the integrated circuit device and the leadfingers with an encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，其特征在于包括：沿其长度方向向其内端提供具有连续减小的宽度的向内会聚的引线管; 仅在连续减小宽度的部分上将导线器上的集成电路器件电连接; 并用封装封装集成电路器件和引线管。

公开(公告)号：US08115287B2

公开(公告)日：2012-02-14

申请号：US12635699

申请日：2009-12-10

申请人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Erwin Aguas Sangalang ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Erwin Aguas Sangalang ,  Lionel Chien Hui Tay

IPC分类号： H01L23/495

CPC分类号： H01L24/32 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/29 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: forming outer leads having outer terminal sections, the outer terminal sections having an upper terminal and a bottom terminal; forming inner leads having inner terminal sections wider than a distance between the outer terminal sections of the outer leads, and the inner terminal sections have an upper terminal and a bottom terminal; connecting an integrated circuit to the inner leads and the outer leads; and encapsulating the integrated circuit, the inner leads, and the outer leads with an encapsulation while leaving the upper terminals and the bottom terminals of the outer terminal sections and the upper terminals and bottom terminals of the inner terminal sections exposed from the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有外端子部的外引线，所述外端子部具有上端子和底端; 形成具有比所述外引线的外端子部分的间隔宽的内端子部的内引线，所述内端子部具有上端子和底端子; 将集成电路连接到内引线和外引线; 并且封装集成电路，内部引线和外部引线，同时使外部端子部分的上部端子和底部端子以及内部端子部分的上部端子和底部端子从封装露出。

公开(公告)号：US20110298113A1

公开(公告)日：2011-12-08

申请号：US13209837

申请日：2011-08-15

申请人： Frederick Rodriguez Dahilig ,  Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

发明人： Frederick Rodriguez Dahilig ,  Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC分类号： H01L21/60 ,  H01L23/495

CPC分类号： H01L23/3107 ,  H01L21/565 ,  H01L23/4951 ,  H01L23/49551 ,  H01L23/49572 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/05554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a lead frame having contact pads and connection leads; coupling a base integrated circuit to the contact pads; coupling a chip interconnect between the base integrated circuit, the connection leads, the contact pads, or a combination thereof; molding a package body on the connection leads, the base integrated circuit, and the chip interconnects, including having the contact pads exposed; and forming a bottom surface on the package body including forming the connection leads to be coplanar with the bottom surface.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有接触焊盘和连接引线的引线框架; 将基极集成电路耦合到接触焊盘; 耦合在基底集成电路，连接引线，接触焊盘或其组合之间的芯片互连; 在连接引线，基底集成电路和芯片互连件上模制封装体，包括暴露接触焊盘; 以及在所述封装主体上形成底表面，包括形成与所述底表面共面的所述连接引线。

公开(公告)号：US08072047B2

公开(公告)日：2011-12-06

申请号：US12124793

申请日：2008-05-21

申请人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Guruprasad Badakere Govindaiah

发明人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Guruprasad Badakere Govindaiah

IPC分类号： H01L23/552 ,  H01L21/56

CPC分类号： H01L23/3107 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/552 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： An integrated circuit package system includes: providing a tie bar and a lead adjacent thereto; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield connected to the tie bar; and encapsulating the integrated circuit and the shield. An integrated circuit package system also includes: forming a lead and a support structure with substantially the same material as the lead and elevated above the lead; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield on the support structure; and encapsulating the integrated circuit and the shield.

摘要翻译： 集成电路封装系统包括：提供与其相邻的连接杆和引线; 连接集成电路和引线; 将屏蔽件安装在集成电路上，屏蔽层连接到连接杆上; 并封装集成电路和屏蔽。 集成电路封装系统还包括：形成具有与引线基本上相同的材料并在引线上方升高的引线和支撑结构; 连接集成电路和引线; 将集成电路上的屏蔽件与屏蔽件安装在支撑结构上; 并封装集成电路和屏蔽。