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    Fan-out-semiconductor package module
    31.
    发明授权
    Fan-out-semiconductor package module 有权

    公开(公告)号：US10242973B2

    公开(公告)日：2019-03-26

    申请号：US15882440

    申请日：2018-01-29

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Yong Ho Baek ,  Joo Hwan Jung ,  Young Sik Hur ,  Jung Chul Gong ,  Han Kim

    IPC: H01L23/495 ,  H01L23/498 ,  H01L23/367 ,  H05K7/00 ,  H05K7/06 ,  H01L25/16 ,  H01L23/31 ,  H01L49/02 ,  H01L23/552

    Abstract: A fan-out semiconductor package module includes: a core member having a first through hole and a second through hole; a semiconductor chip disposed in the first through hole, and having an active surface and an inactive surface opposite the active surface, the active surface having a connection pad disposed thereon; at least one first passive component disposed in the second through hole; a first encapsulant encapsulating the core member encapsulating at least a portion of each of the core member and the at least one first passive component; a second encapsulant encapsulating at least a portion of the inactive surface of the semiconductor chip; and a connection member disposed on the core member, the active surface of the semiconductor chip, and the at least one first passive component, and including a redistribution layer electrically connected to the connection pad and the at least one first passive component.

    Fan-out semiconductor package
    34.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10157886B2

    公开(公告)日：2018-12-18

    申请号：US15437766

    申请日：2017-02-21

    Applicant: Samsung Electro-Mechanics, Co., Ltd.

    Inventor： Dae Hyun Park ,  Eun Jung Jo ,  Sung Won Jeong ,  Han Kim ,  Mi Ja Han

    IPC: H01L23/02 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Fan-out semiconductor package
    35.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10121769B2

    公开(公告)日：2018-11-06

    申请号：US15437766

    申请日：2017-02-21

    Applicant: Samsung Electro-Mechanics, Co., Ltd.

    Inventor： Dae Hyun Park ,  Eun Jung Jo ,  Sung Won Jeong ,  Han Kim ,  Mi Ja Han

    IPC: H01L23/02 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

    Camera module
    38.
    发明授权
    Camera module 有权

    公开(公告)号：US12063428B2

    公开(公告)日：2024-08-13

    申请号：US17989832

    申请日：2022-11-18

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Se Yeon Hwang ,  Yeo Ok Jeon ,  Seok Hwan Kim ,  Seung Jae Song ,  Han Kim

    IPC: H04N23/54 ,  H04M1/02

    CPC classification number: H04N23/54 ,  H04M1/0264 ,  H04M2250/52

    Abstract: A camera module is provided. The camera module includes a lens barrel in which at least one lens is installed; and a lens holder to which the lens barrel is fixedly installed, wherein one of the lens holder and the lens barrel is provided with a coupling protrusion, and the other thereof is provided with a coupling groove into which the coupling protrusion is inserted, the lens holder is provided with a support portion that supports one end portion of the lens barrel, wherein the one end portion of the lens barrel is disposed between the coupling protrusion and the support portion, and the support portion of the lens holder elastically supports the lens barrel in an optical axis direction.

    Semiconductor package
    40.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11417631B2

    公开(公告)日：2022-08-16

    申请号：US16522112

    申请日：2019-07-25

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Yun Tae Lee ,  Hyung Joon Kim ,  Han Kim

    IPC: H01L25/065 ,  H01L23/055 ,  H01L23/13 ,  H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L25/10 ,  H01L25/16

    Abstract: A semiconductor package includes: a first semiconductor package including: a first frame having a first through portion, a first semiconductor chip in the first through portion and having a first surface on which a first connection pad is disposed and a second surface on which a second connection pad is disposed, and a through via connected to the second connection pad, a first connection structure on the first surface and including a first redistribution layer, and a backside redistribution layer on the second surface; and a second semiconductor package on the first semiconductor package and including: a second connection structure including a second redistribution layer, a second frame on the second connection structure and having a second through portion, and a second semiconductor chip in a second through portion and having a third surface on which a third connection pad is disposed.

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