公开(公告)号：US20140203276A1

公开(公告)日：2014-07-24

申请号：US14154483

申请日：2014-01-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Hideomi SUZAWA ,  Tetsuhiro TANAKA ,  Hirokazu WATANABE

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1222 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device. The semiconductor device includes a first oxide layer over an insulating film; an oxide semiconductor layer over the first oxide layer; a gate insulating film over the oxide semiconductor layer; and a gate electrode over the gate insulating film. The first oxide layer contains indium. The oxide semiconductor layer contains indium and includes a channel formation region. The distance from the interface to the channel formation region is 20 nm or more, preferably 30 nm or more, further preferably 40 nm or more, still further preferably 60 nm or more.

Abstract translation: 提供高度可靠的半导体器件。 半导体器件包括绝缘膜上的第一氧化物层; 在所述第一氧化物层上的氧化物半导体层; 氧化物半导体层上的栅极绝缘膜; 以及栅极绝缘膜上的栅电极。 第一氧化物层含有铟。 氧化物半导体层含有铟，并且包括沟道形成区域。 从界面到沟道形成区域的距离为20nm以上，优选为30nm以上，进一步优选为40nm以上，进一步优选为60nm以上。

公开(公告)号：US20230335646A1

公开(公告)日：2023-10-19

申请号：US18211652

申请日：2023-06-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Tetsuhiro TANAKA ,  Hirokazu WATANABE ,  Yuhei SATO ,  Yasumasa YAMANE ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L29/45 ,  H01L29/66

CPC classification number: H01L29/78618 ,  H01L29/7869 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78696

Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

公开(公告)号：US20220352387A1

公开(公告)日：2022-11-03

申请号：US17861432

申请日：2022-07-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yutaka OKAZAKI ,  Akihisa SHIMOMURA ,  Naoto YAMADE ,  Tomoya TAKESHITA ,  Tetsuhiro TANAKA

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/45 ,  H01L29/49 ,  H01L27/12

Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.

公开(公告)号：US20200152671A1

公开(公告)日：2020-05-14

申请号：US16736862

申请日：2020-01-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tetsuhiro TANAKA ,  Kazuki TANEMURA ,  Daisuke MATSUBAYASHI

IPC: H01L27/12 ,  H01L23/522

Abstract: A miniaturized transistor with reduced parasitic capacitance and highly stable electrical characteristics is provided. High performance and high reliability of a semiconductor device including the transistor is achieved. A first conductor is formed over a substrate, a first insulator is formed over the first conductor, a layer that retains fixed charges is formed over the first insulator, a second insulator is formed over the layer that retains fixed charges, and a transistor is formed over the second insulator. Threshold voltage Vth is controlled by appropriate adjustment of the thicknesses of the first insulator, the second insulator, and the layer that retains fixed charges.

公开(公告)号：US20180233597A1

公开(公告)日：2018-08-16

申请号：US15946149

申请日：2018-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshitaka YAMAMOTO ,  Tetsuhiro TANAKA ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Takayuki INOUE ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/66 ,  H01L29/423 ,  H01L21/28 ,  H01L27/1156

CPC classification number: H01L29/7869 ,  H01L27/1156 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.

公开(公告)号：US20170317196A1

公开(公告)日：2017-11-02

申请号：US15605160

申请日：2017-05-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Takayuki INOUE ,  Shunpei YAMAZAKI

IPC: H01L29/66 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/4908 ,  H01L29/7869 ,  H01L29/78696

Abstract: A manufacturing method of a semiconductor device in which the threshold voltage is adjusted is provided. The semiconductor device includes a first semiconductor, an electrode electrically connected to the first semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the first semiconductor. By performing heat treatment at higher than or equal to 125 ° C. and lower than or equal to 450 ° C. and, at the same time, keeping a potential of the gate electrode higher than a potential of the electrode for 1 second or more, the threshold voltage is increased.

公开(公告)号：US20170125553A1

公开(公告)日：2017-05-04

申请号：US15350213

申请日：2016-11-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Masayuki SAKAKURA ,  Ryo TOKUMARU ,  Yasumasa YAMANE ,  Yuhei SATO

IPC: H01L29/66 ,  H01L21/465 ,  H01L21/02 ,  H01L21/441 ,  H01L29/786 ,  H01L21/477

CPC classification number: H01L29/66969 ,  H01L21/02255 ,  H01L21/02565 ,  H01L21/441 ,  H01L21/465 ,  H01L21/477 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1156 ,  H01L29/401 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a first insulating film over a first gate electrode over a substrate while heated at a temperature higher than or equal to 450° C. and lower than the strain point of the substrate, forming a first oxide semiconductor film over the first insulating film, adding oxygen to the first oxide semiconductor film and then forming a second oxide semiconductor film over the first oxide semiconductor film, and performing heat treatment so that part of oxygen contained in the first oxide semiconductor film is transferred to the second oxide semiconductor film.

公开(公告)号：US20170125405A1

公开(公告)日：2017-05-04

申请号：US15298306

申请日：2016-10-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Yutaka OKAZAKI

IPC: H01L27/07 ,  H01L29/66 ,  H01G4/008 ,  H01G4/40 ,  H05K1/18 ,  H01G4/10

CPC classification number: H01L27/0733 ,  H01G4/008 ,  H01G4/105 ,  H01G4/40 ,  H01L21/8258 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/1156 ,  H01L27/1255 ,  H01L29/66477 ,  H01L29/7869 ,  H01L29/94 ,  H05K1/18 ,  H05K2201/10015 ,  H05K2201/10083 ,  H05K2201/10166

Abstract: A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.

公开(公告)号：US20170040424A1

公开(公告)日：2017-02-09

申请号：US15220498

申请日：2016-07-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Kazuki TANEMURA ,  Daisuke MATSUBAYASHI

IPC: H01L29/40 ,  H01L49/02 ,  H01L27/06

Abstract: A miniaturized transistor with reduced parasitic capacitance and highly stable electrical characteristics is provided. High performance and high reliability of a semiconductor device including the transistor is achieved. A first conductor is formed over a substrate, a first insulator is formed over the first conductor, a layer that retains fixed charges is formed over the first insulator, a second insulator is formed over the layer that retains fixed charges, and a transistor is formed over the second insulator. Threshold voltage Vth is controlled by appropriate adjustment of the thicknesses of the first insulator, the second insulator, and the layer that retains fixed charges.

Abstract translation: 提供了具有降低的寄生电容和高度稳定的电特性的小型化晶体管。 实现了包括晶体管的半导体器件的高性能和高可靠性。 第一导体形成在衬底上，在第一导体上形成第一绝缘体，在第一绝缘体上形成保持固定电荷的层，在保持固定电荷的层上形成第二绝缘体，形成晶体管 在第二绝缘体上。 通过适当调节第一绝缘体，第二绝缘体和保持固定电荷的层的厚度来控制阈值电压Vth。

公开(公告)号：US20160372492A1

公开(公告)日：2016-12-22

申请号：US15251375

申请日：2016-08-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Yoshinori IEDA ,  Toshiyuki MIYAMOTO ,  Masafumi NOMURA ,  Takashi HAMOCHI ,  Kenichi OKAZAKI ,  Mitsuhiro ICHIJO ,  Toshiya ENDO

IPC: H01L27/12 ,  H01L27/06

CPC classification number: H01L27/1207 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1225

Abstract: A nitride insulating film which prevents diffusion of hydrogen into an oxide semiconductor film in a transistor including an oxide semiconductor is provided. Further, a semiconductor device which has favorable electrical characteristics by using a transistor including a silicon semiconductor and a transistor including an oxide semiconductor is provided. Two nitride insulating films having different functions are provided between the transistor including a silicon semiconductor and the transistor including an oxide semiconductor. Specifically, a first nitride insulating film which contains hydrogen is provided over the transistor including a silicon semiconductor, and a second nitride insulating film which has a lower hydrogen content than the first nitride insulating film and functions as a barrier film against hydrogen is provided between the first nitride insulating film and the transistor including an oxide semiconductor.

Abstract translation: 提供一种防止在包括氧化物半导体的晶体管中氢扩散到氧化物半导体膜中的氮化物绝缘膜。 此外，提供了通过使用包括硅半导体的晶体管和包括氧化物半导体的晶体管具有良好的电特性的半导体器件。 在包括硅半导体的晶体管和包括氧化物半导体的晶体管之间提供具有不同功能的两个氮化物绝缘膜。 具体地说，在包括硅半导体的晶体管上设置含有氢的第一氮化物绝缘膜，并且在第一氮化物绝缘膜之间具有比第一氮化物绝缘膜低的氢含量并用作阻止氢的阻挡膜的第二氮化物绝缘膜 第一氮化物绝缘膜和包括氧化物半导体的晶体管。