公开(公告)号：US20060144323A1

公开(公告)日：2006-07-06

申请号：US11311228

申请日：2005-12-20

申请人： Wenxu Xianyu ,  Takashi Noguchi ,  Young-soo Park ,  Hans Cho ,  Huaxiang Yin

发明人： Wenxu Xianyu ,  Takashi Noguchi ,  Young-soo Park ,  Hans Cho ,  Huaxiang Yin

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： H01L21/26506 ,  H01L21/268 ,  H01L21/32134 ,  H01L21/76254 ,  H01L21/76256 ,  H01L27/1214 ,  H01L27/1266 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/66772

摘要： A method of fabricating a large substrate with a locally integrated single crystalline silicon layer is provided. The method includes: forming a buffer layer on a support plate; separately fabricating a single crystalline silicon layer; attaching the single crystalline silicon layer having a predetermined thickness, which is separately fabricated, to a predetermined portion in the support plate; forming a non-single crystalline silicon layer having a predetermined thickness to cover the single crystalline silicon layer and the buffer layer; and processing the non-single crystalline silicon layer to expose a surface of the non-single crystalline silicon layer and to level the surface of the non-single crystalline silicon layer with a surface of the amorphous silicon layer.

公开(公告)号：US20060134894A1

公开(公告)日：2006-06-22

申请号：US11283874

申请日：2005-11-22

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Kyung-bae Park

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Kyung-bae Park

IPC分类号： H01L21/84 ,  H01L21/20

CPC分类号： H01L21/02675 ,  H01L21/2026 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/12 ,  H01L27/1281

摘要： A method of manufacturing a polycrystalline Si film and a method of manufacturing a stacked transistor are provided. The method of manufacturing the polycrystalline Si film includes preparing an insulating substrate on which is formed a transistor that includes a poly-Si active layer, a gate insulating layer, and a gate, sequentially formed, forming an interconnection metal line separated from the gate, forming an insulating layer that covers the transistor and the interconnection metal line, forming an amorphous silicon layer on the insulating layer; and annealing the amorphous silicon layer.

摘要翻译： 提供一种制造多晶Si膜的方法和制造堆叠晶体管的方法。 制造多晶Si膜的方法包括制备绝缘基板，其上形成有依次形成的多晶硅，具有多晶硅有源层，栅极绝缘层和栅极，形成与栅极分离的互连金属线， 形成覆盖晶体管和互连金属线的绝缘层，在绝缘层上形成非晶硅层; 并退火非晶硅层。

公开(公告)号：US20060068507A1

公开(公告)日：2006-03-30

申请号：US11233363

申请日：2005-09-23

申请人： Wenxu Xianyu ,  Takashi Noguchi ,  Hans Cho ,  Jang-Yeon Kwon ,  Huaxiang Yin

发明人： Wenxu Xianyu ,  Takashi Noguchi ,  Hans Cho ,  Jang-Yeon Kwon ,  Huaxiang Yin

IPC分类号： H01L21/00 ,  H01L21/8242

CPC分类号： H01L21/02356 ,  H01L21/02197 ,  H01L21/31691 ,  H01L21/84 ,  H01L27/11502 ,  H01L27/12

摘要： A method of forming a material (e.g., ferroelectric) film, a method of manufacturing a capacitor, and a method of forming a semiconductor memory device using the method of forming the (e.g., ferroelectric) film are provided. Pursuant to an example embodiment of the present invention, a method of forming a ferroelectric film includes preparing a substrate, depositing an amorphous ferroelectric film on the substrate, and crystallizing the amorphous ferroelectric film by irradiating it with a laser beam. According to still another example embodiment of the present invention, a method of forming a ferroelectric film may reduce the thermal damage to other elements because the ferroelectric film may be formed at a temperature lower than about 500° C. to about 550°C.

摘要翻译： 提供了形成材料（例如铁电体）膜的方法，制造电容器的方法，以及使用形成（例如铁电体）膜的方法形成半导体存储器件的方法。 根据本发明的示例性实施例，形成铁电体膜的方法包括制备基板，在基板上沉积非晶铁电体膜，并通过用激光束照射非晶强电介质膜使其结晶。 根据本发明的另一示例性实施例，形成铁电体膜的方法可以减少对其它元件的热损伤，因为铁电体膜可以在低于约500℃至约550℃的温度下形成。

公开(公告)号：US20050145843A1

公开(公告)日：2005-07-07

申请号：US11013398

申请日：2004-12-17

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

IPC分类号： H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/786 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L29/785 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/7855

摘要： A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a substrate; a buffer layer formed on the substrate; a source and a drain spaced apart from each other on the buffer layer; a channel layer formed on the buffer layer to connect the source and the drain with each other; and a gate formed on the buffer layer to be spaced apart from the source, the drain and the channel layer.

摘要翻译： 提供薄膜晶体管及其制造方法。 薄膜晶体管包括基板; 形成在所述基板上的缓冲层; 在缓冲层上彼此间隔开的源极和漏极; 形成在所述缓冲层上的沟道层，以将所述源极和所述漏极彼此连接; 以及形成在缓冲层上以与源极，漏极和沟道层间隔开的栅极。

公开(公告)号：US08309404B2

公开(公告)日：2012-11-13

申请号：US13173128

申请日：2011-06-30

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Hyuk Lim ,  Wenxu Xianyu ,  Hans S. Cho

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Hyuk Lim ,  Wenxu Xianyu ,  Hans S. Cho

IPC分类号： H01L21/84

CPC分类号： H01L27/12 ,  H01L29/78609 ,  H01L29/78696

摘要： A thin film transistor comprises an Si-based channel having a nonlinear electron-moving path, a source and a drain disposed at both sides of the channel, a gate disposed above the channel, an insulator interposed between the channel and the gate, and a substrate supporting the channel and the source and the drain disposed at either side of the channel respectively.

摘要翻译： 薄膜晶体管包括具有非线性电子移动路径的Si基通道，设置在沟道两侧的源极和漏极，设置在沟道上方的栅极，介于通道和栅极之间的绝缘体，以及 支撑通道的基板，分别设置在通道的两侧的源极和漏极。

公开(公告)号：US08012819B2

公开(公告)日：2011-09-06

申请号：US12654866

申请日：2010-01-07

申请人： Xiaoxin Zhang ,  Wenxu Xianyu ,  Takashi Noguchi ,  Hans S. Cho ,  Huaxiang Yin

发明人： Xiaoxin Zhang ,  Wenxu Xianyu ,  Takashi Noguchi ,  Hans S. Cho ,  Huaxiang Yin

IPC分类号： H01L29/78

CPC分类号： H01L21/823412 ,  H01L21/823456 ,  H01L21/823807 ,  H01L21/82385

摘要： A semiconductor device includes a transistor. The transistor includes a substrate having an inclined surface, a first upper surface extending from a lower portion of the inclined surface, and a second upper surface extending from an upper end of the inclined surface. A gate stack structure is formed on the inclined surface and includes a gate electrode. A first impurity region formed on one of the first and second upper surfaces contacts the gate stack structure. A second impurity region formed on the second upper surface contacts the gate stack structure. A channel between the first and second impurity regions is formed along the inclined surface in a crystalline direction.

摘要翻译： 半导体器件包括晶体管。 晶体管包括具有倾斜表面的基板，从倾斜表面的下部延伸的第一上表面和从倾斜表面的上端延伸的第二上表面。 栅极堆叠结构形成在倾斜表面上并且包括栅电极。 形成在第一和第二上表面中的一个上的第一杂质区域接触栅极堆叠结构。 形成在第二上表面上的第二杂质区域接触栅堆叠结构。 第一和第二杂质区之间的通道在结晶方向上沿着倾斜表面形成。

公开(公告)号：US07999322B2

公开(公告)日：2011-08-16

申请号：US12947002

申请日：2010-11-16

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Hyuk Lim ,  Wenxu Xianyu ,  Hans S. Cho

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Hyuk Lim ,  Wenxu Xianyu ,  Hans S. Cho

IPC分类号： H01L27/12

CPC分类号： H01L27/12 ,  H01L29/78609 ,  H01L29/78696

摘要： A thin film transistor comprises an Si-based channel having a nonlinear electron-moving path, a source and a drain disposed at both sides of the channel, a gate disposed above the channel, an insulator interposed between the channel and the gate, and a substrate supporting the channel and the source and the drain disposed at either side of the channel respectively.

摘要翻译： 薄膜晶体管包括具有非线性电子移动路径的Si基通道，设置在沟道两侧的源极和漏极，设置在沟道上方的栅极，介于通道和栅极之间的绝缘体，以及 支撑通道的基板，分别设置在通道的两侧的源极和漏极。

公开(公告)号：US07667300B2

公开(公告)日：2010-02-23

申请号：US11600741

申请日：2006-11-17

申请人： Xiaoxin Zhang ,  Wenxu Xianyu ,  Takashi Noguchi ,  Hans S. Cho ,  Huaxiang Yin

发明人： Xiaoxin Zhang ,  Wenxu Xianyu ,  Takashi Noguchi ,  Hans S. Cho ,  Huaxiang Yin

IPC分类号： H01L29/04

CPC分类号： H01L21/823412 ,  H01L21/823456 ,  H01L21/823807 ,  H01L21/82385

摘要： A semiconductor device includes a transistor. The transistor includes a substrate having an inclined surface, a first upper surface extending from a lower portion of the inclined surface, and a second upper surface extending from an upper end of the inclined surface. A gate stack structure is formed on the inclined surface and includes a gate electrode. A first impurity region formed on one of the first and second upper surfaces contacts the gate stack structure. A second impurity region formed on the second upper surface contacts the gate stack structure. A channel between the first and second impurity regions is formed along the inclined surface in a crystalline direction.

公开(公告)号：US07662678B2

公开(公告)日：2010-02-16

申请号：US11473067

申请日：2006-06-23

申请人： Wenxu Xianyu ,  Hans S. Cho ,  Takashi Noguchi ,  Young-Soo Park ,  Xiaoxin Zhang ,  Huaxiang Yin ,  Hyuck Lim ,  Kyung-Bae Park ,  Suk-Pil Kim

发明人： Wenxu Xianyu ,  Hans S. Cho ,  Takashi Noguchi ,  Young-Soo Park ,  Xiaoxin Zhang ,  Huaxiang Yin ,  Hyuck Lim ,  Kyung-Bae Park ,  Suk-Pil Kim

IPC分类号： H01L21/00 ,  H01L29/76

CPC分类号： C30B29/06 ,  Y10T428/10

摘要： Provided are methods of forming a more highly-oriented silicon thin layer having a larger grain size, and a substrate having the same. The methods may include forming an aluminum (Al) layer on a base substrate, forming a more highly-oriented Al layer by recrystallizing the Al layer under vacuum, forming a more highly-oriented γ-Al2O3 layer on the more highly-oriented Al layer and/or epitaxially growing a silicon layer on the more highly-oriented γ-Al2O3 layer. The method may be used to manufacture a semiconductor device having higher carrier mobility.

摘要翻译： 提供了形成具有较大晶粒尺寸的更高取向硅薄层的方法以及具有其的基板。 所述方法可以包括在基底上形成铝（Al）层，通过在真空下重结晶Al层形成更高取向的Al层，在更高取向的Al层上形成更高取向的γ-Al 2 O 3层 和/或在更高取向的γ-Al 2 O 3层上外延生长硅层。 该方法可用于制造具有较高载流子迁移率的半导体器件。

公开(公告)号：US07611932B2

公开(公告)日：2009-11-03

申请号：US11199272

申请日：2005-08-09

申请人： Huaxiang Yin ,  Wenxu Xianyu ,  Takashi Noguchi ,  Hans S. Cho ,  Ji-sim Jung

发明人： Huaxiang Yin ,  Wenxu Xianyu ,  Takashi Noguchi ,  Hans S. Cho ,  Ji-sim Jung

IPC分类号： H01L21/84

CPC分类号： H01L21/02675 ,  H01L21/2026 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66795 ,  H01L29/785

摘要： A method of manufacturing a thin film transistor is provided. The method includes forming an amorphous silicon layer on a substrate, forming a source region, a drain region, and a region of a plurality of channels electrically interposed between the source region and the drain region by patterning the amorphous silicon layer, annealing a region of the channels, sequentially forming a gate oxide film and a gate electrode on a channel surface, and doping the source region and the drain region.

摘要翻译： 提供一种制造薄膜晶体管的方法。 该方法包括：在衬底上形成非晶硅层，通过图案化非晶硅层，形成源极区，漏极区和电介入源区和漏区之间的多个通道的区域，退火区域 通道，在通道表面上依次形成栅极氧化膜和栅电极，并掺杂源极区和漏极区。