公开(公告)号：US07812894B2

公开(公告)日：2010-10-12

申请号：US12498520

申请日：2009-07-07

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura

IPC分类号： G02F1/1368 ,  G02F1/1345 ,  H01L27/12

CPC分类号： H01L29/4908 ,  H01L27/1255 ,  H01L29/42384 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2224/73204 ,  H01L2924/00014

摘要： Using thin film transistors (TFTs), an active matrix circuit, a driver circuit for driving the active matrix circuit or the like are formed on one substrate. Circuits such as a central processing unit (CPU) and a memory, necessary to drive an electric device, are formed using single crystalline semiconductor integrated circuit chips. After the semiconductor integrated circuit chips are adhered to the substrate, the chips are connected with wirings formed on the substrate by a chip on glass (COG) method, a wire bonding method or the like, to manufacture the electric device having a liquid crystal display (LCD) on one substrate.

摘要翻译： 使用薄膜晶体管（TFT），有源矩阵电路，用于驱动有源矩阵电路的驱动电路等形成在一个基板上。 使用单晶半导体集成电路芯片形成驱动电气设备所必需的诸如中央处理单元（CPU）和存储器的电路。 在将半导体集成电路芯片粘附到基板之后，芯片通过玻璃（COG）法，引线接合方法等与形成在基板上的布线连接，以制造具有液晶显示器的电气设备 （LCD）在一个基板上。

公开(公告)号：US07585715B2

公开(公告)日：2009-09-08

申请号：US12068466

申请日：2008-02-07

申请人： Yasuhiko Takemura ,  Hiroki Adachi

发明人： Yasuhiko Takemura ,  Hiroki Adachi

IPC分类号： H01L21/336 ,  H01L21/84

CPC分类号： H01L29/78618 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/1277 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78609

摘要： A semiconductor device comprising at least two thin film transistors on a substrate having an insulating surface thereon, provided that the thin film transistors are isolated by oxidizing the outer periphery of the active layer of each of the thin film transistors to the bottom to provide an oxide insulating film.

摘要翻译： 一种半导体器件，包括在其上具有绝缘表面的衬底上的至少两个薄膜晶体管，条件是薄膜晶体管通过将每个薄膜晶体管的有源层的外周氧化为底部而分离，以提供氧化物 绝缘膜。

公开(公告)号：US07542103B2

公开(公告)日：2009-06-02

申请号：US11735656

申请日：2007-04-16

申请人： Hongyong Zhang ,  Naoaki Yamaguchi ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Naoaki Yamaguchi ,  Yasuhiko Takemura

IPC分类号： G02F1/136

CPC分类号： G02F1/136286 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2201/121 ,  G02F2201/40

摘要： An auxiliary capacitor for a pixel of an active matrix type liquid crystal display is provided without decreasing the aperture ratio. A transparent conductive film for a common electrode is formed under a pixel electrode constituted by a transparent conductive film with an insulation film provided therebetween. Further, the transparent conductive film for the common electrode is maintained at fixed potential, formed so as to cover a gate bus line and a source bus line, and configured such that signals on each bus line are not applied to the pixel electrode. The pixel electrode is disposed so that all edges thereof overlap the gate bus line and source bus line. As a result, each of the bus lines serves as a black matrix. Further, the pixel electrode overlaps the transparent conductive film for the common electrode to form a storage capacitor.

公开(公告)号：US07528406B2

公开(公告)日：2009-05-05

申请号：US11526794

申请日：2006-09-26

申请人： Hideomi Suzawa ,  Yasuhiko Takemura

发明人： Hideomi Suzawa ,  Yasuhiko Takemura

IPC分类号： H01L21/00

CPC分类号： H01L29/78636 ,  H01L27/12 ,  H01L27/1244 ,  H01L27/1248 ,  Y10S257/90

摘要： A semiconductor integrated circuit comprising thin-film transistors in each of which the second wiring is prevented from breaking at steps. A silicon nitride film is formed on gate electrodes and on gate wiring extending from the gate electrodes. Substantially triangular regions are formed out of an insulator over side surfaces of the gate electrodes and of the gate wiring. The presence of these substantially triangular side walls make milder the steps at which the second wiring goes over the gate wiring. This suppresses breakage of the second wiring.

摘要翻译： 一种半导体集成电路，包括薄膜晶体管，其中每个薄膜晶体管中的第二布线都被防止在台阶上断开。 在栅电极和从栅电极延伸的栅极布线上形成氮化硅膜。 在栅极电极和栅极布线的侧表面上形成由绝缘体构成的基本上三角形的区域。 这些基本上三角形的侧壁的存在使得第二布线越过栅极布线的步骤变得更加温和。 这抑制了第二布线的破损。

公开(公告)号：US07525158B2

公开(公告)日：2009-04-28

申请号：US10893889

申请日：2004-07-20

申请人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

发明人： Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara ,  Hongyong Zhang ,  Atsunori Suzuki ,  Hideto Ohnuma ,  Naoaki Yamaguchi ,  Hideomi Suzawa ,  Hideki Uochi ,  Yasuhiko Takemura

IPC分类号： H01L29/786

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US07446843B2

公开(公告)日：2008-11-04

申请号：US11776683

申请日：2007-07-12

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Setsuo Nakajima ,  Yasuyuki Arai

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Setsuo Nakajima ,  Yasuyuki Arai

IPC分类号： G02F1/1345

CPC分类号： G02F1/13452 ,  G02F1/1303 ,  G02F1/133305 ,  G02F1/1345 ,  G02F1/13454 ,  H01L21/67132 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01079

摘要： A method of fabricating a driver circuit for use with a passive matrix or active matrix electrooptical display device such as a liquid crystal display. The driver circuit occupies less space than heretofore. A circuit (stick crystal) having a length substantially equal to the length of one side of the matrix of the display device is used as the driver circuit. The circuit is bonded to one substrate of the display device, and then the terminals of the circuit are connected with the terminals of the display device. Subsequently, the substrate of the driver circuit is removed. This makes the configuration of the circuit much simpler than the configuration of the circuit heretofore required by the TAB method or COG method, because conducting lines are not laid in a complex manner. The driver circuit can be formed on a large-area substrate such as a glass substrate. The display device can be formed on a lightweight material having a high shock resistance such as a plastic substrate. Hence, a display device having excellent portability can be obtained.

摘要翻译： 一种制造用于无源矩阵或有源矩阵电光显示装置如液晶显示器的驱动电路的方法。 驱动电路占用的空间比以前少。 使用具有与显示装置的矩阵的一侧的长度大致相等的长度的电路（棒状晶体）作为驱动电路。 电路接合到显示装置的一个基板，然后电路的端子与显示装置的端子连接。 随后，驱动电路的基板被去除。 这使得电路的配置比TAB方法或COG方法所要求的电路的配置简单得多，因为导线不是以复杂的方式铺设。 驱动电路可以形成在诸如玻璃基板的大面积基板上。 显示装置可以形成在具有高抗冲击性的轻质材料上，例如塑料基板。 因此，可以获得具有优异便携性的显示装置。

公开(公告)号：US07391051B2

公开(公告)日：2008-06-24

申请号：US11321640

申请日：2005-12-30

申请人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

发明人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

IPC分类号： H01L31/00

CPC分类号： H01L29/045 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757

摘要： In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.

摘要翻译： 在具有适于批量生产的结晶硅有源层的薄膜晶体管（TFT）中，通过离子注入或其它方式将催化元素引入到非晶硅膜的掺杂区域中。 该膜在低于玻璃基板的应变点的温度下结晶。 此外，形成栅极绝缘膜和栅电极。 杂质通过自对准过程引入。 然后，层压体在基板的应变点以下退火以活化掺杂剂杂质。 另一方面，Neckel或其它元素也用作促进非晶硅膜结晶的催化元素。 首先，将该催化元件与非晶硅膜的表面接触。 将膜在450至650℃加热以产生晶核。 将膜进一步在较高温度下加热以生长晶粒。 以这种方式，形成具有改善的结晶度的晶体硅膜。

公开(公告)号：US20080061299A1

公开(公告)日：2008-03-13

申请号：US11979127

申请日：2007-10-31

申请人： Yasuhiko Takemura ,  Satoshi Teramoto

发明人： Yasuhiko Takemura ,  Satoshi Teramoto

IPC分类号： H01L29/04

CPC分类号： H01L27/1248 ,  H01L27/1255 ,  H01L29/66757 ,  H01L29/78621 ,  H01L2029/7863

摘要： A thin film transistor of the present invention has an active layer including at least source, drain and channel regions formed on an insulating surface. A high resistivity region is formed between the channel region and each of the source and drain regions. A film capable of trapping positive charges therein is provided on at least the high resistivity region so that N-type conductivity is induced in the high resistivity region. Accordingly, the reliability of N-channel type TFT against hot electrons can be improved.

摘要翻译： 本发明的薄膜晶体管具有至少包括形成在绝缘表面上的源极，漏极和沟道区的有源层。 在沟道区域和源极和漏极区域中的每一个之间形成高电阻率区域。 至少在高电阻率区域上设置能够俘获正电荷的膜，使得在高电阻率区域中产生N型导电性。 因此，可以提高N沟道型TFT对热电子的可靠性。

公开(公告)号：US07253440B1

公开(公告)日：2007-08-07

申请号：US09342235

申请日：1999-06-29

申请人： Yasuhiko Takemura

发明人： Yasuhiko Takemura

IPC分类号： H01L29/76

CPC分类号： H01L27/124 ,  G02F1/13624 ,  G02F2001/13606 ,  G02F2203/30 ,  G09G3/2011 ,  G09G3/3648 ,  G09G2300/043 ,  G09G2300/0465 ,  G09G2300/08 ,  G09G2310/0262 ,  G09G2320/0233 ,  H01L27/1251

摘要： A semiconductor device having a substrate having an insulating surface; at least first and second semiconductor islands formed over the substrate where each of the semiconductor islands has a channel region and a pair of impurity regions; an insulating film formed over the substrate, the insulating film including at least first and second gate insulating films formed over the first and second semiconductor islands, respectively; at least first and second gate electrodes formed over the first and second semiconductor islands with the first and second gate insulating films interposed therebetween; a wiring formed on the insulating film for electrically connecting one of the impurity regions of the first semiconductor island with the second gate electrode where said wiring is connected to the one of the impurity regions through a hold opened in the insulating film; an interlayer insulating film formed over the first and second semiconductor islands, the first and second gate electrodes and the wiring; and a pixel electrode formed over the interlayer insulating film electrically connected to one of the pair of the impurity regions of the second semiconductor island.

摘要翻译： 一种具有绝缘表面的衬底的半导体器件; 形成在衬底上的至少第一和第二半导体岛，其中每个半导体岛具有沟道区和一对杂质区; 形成在所述基板上的绝缘膜，所述绝缘膜分别至少包括形成在所述第一和第二半导体岛上的第一和第二栅极绝缘膜; 至少第一和第二栅电极，形成在第一和第二半导体岛上，第一和第二栅极绝缘膜介于它们之间; 在所述绝缘膜上形成的布线，用于将所述第一半导体岛的所述杂质区与所述第二栅极电连接，所述布线通过在所述绝缘膜中开放的保持连接到所述杂质区之一; 形成在第一和第二半导体岛上的层间绝缘膜，第一和第二栅电极和布线; 以及形成在与第二半导体岛的一对杂质区中的一个电连接的层间绝缘膜上的像素电极。

公开(公告)号：US07253437B2

公开(公告)日：2007-08-07

申请号：US11017869

申请日：2004-12-22

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78609 ,  H01L21/26506 ,  H01L21/823814 ,  H01L27/1214 ,  H01L29/0847 ,  H01L29/167 ,  H01L29/6659 ,  H01L29/66757 ,  H01L29/7833 ,  H01L29/78618 ,  H01L29/78621 ,  H01L29/78675 ,  H01L29/78684 ,  H01L29/78696

摘要： A semiconductor device and a method for forming the same are disclosed. The semiconductor device comprising an insulated gate field effect transistor provided with a region having added thereto an element at least one selected from the group consisting of carbon, nitrogen, and oxygen, said region having established at either or both of the vicinity of the boundary between the drain and the semiconductor layer under the gate electrode and the vicinity of the boundary between the source and the semiconductor layer under the gate electrode for example by ion implantation using a mask. It is free from the problems of reverse leakage between the source and the drain, and of throw leakage which occurs even at a voltage below the threshold ascribed to the low voltage resistance between the source and the drain.

摘要翻译： 公开了半导体器件及其形成方法。 该半导体器件包括绝缘栅场效应晶体管，该晶体管具有向其中添加了选自碳，氮和氧的组中的至少一种的元素的区域，所述区域建立在碳，氮和氧之间的边界附近的一个或两个附近 漏极和半导体层以及栅电极下的源极和半导体层之间的边界附近，例如通过使用掩模的离子注入。 在源极和漏极之间的低电压电阻下，即使在低于阈值的电压下也可以产生漏极和漏极之间的泄漏问题。