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    Semiconductor structure
    35.
    发明授权
    Semiconductor structure 有权
    半导体结构

    公开(公告)号：US09461147B2

    公开(公告)日：2016-10-04

    申请号：US14562782

    申请日：2014-12-08

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Jhen-Cyuan Li ,  Shui-Yen Lu ,  Yen-Liang Wu

    IPC: H01L29/66 ,  H01L29/78

    CPC classification number: H01L29/66795 ,  H01L21/31116 ,  H01L29/6656 ,  H01L29/7848 ,  H01L29/785

    Abstract: The present invention provides a semiconductor structure, including a substrate, having a fin structure disposed thereon, a gate structure, crossing over parts of the fin structure. The top surface of the fin structure which is covered by the gate structure is defined as a first top surface, and the top surface of the fin structure which is not covered by the gate structure is defined as a second top surface. The first top surface is higher than the second top surface, and a spacer covers the sidewalls of the gate structure. The spacer includes an inner spacer and an outer spacer, and the outer pacer further contacts the second top surface of the fin structure directly.

    Abstract translation: 本发明提供一种半导体结构，其包括具有设置在其上的翅片结构的基板，栅极结构，跨越鳍片结构的一部分。 由栅极结构覆盖的翅片结构的上表面被定义为第一顶表面，并且未被栅极结构覆盖的翅片结构的顶表面被定义为第二顶表面。 第一顶表面高于第二顶表面，间隔件覆盖栅结构的侧壁。 间隔件包括内隔离件和外间隔件，并且外起重器还直接接触翅片结构的第二顶表面。

    METHOD OF FORMING SEMICONDUCTOR DEVICE
    36.
    发明申请
    METHOD OF FORMING SEMICONDUCTOR DEVICE 有权
    形成半导体器件的方法

    公开(公告)号：US20160099179A1

    公开(公告)日：2016-04-07

    申请号：US14506009

    申请日：2014-10-03

    Applicant: United Microelectronics Corp.

    Inventor： Chun-Tsen Lu ,  Chih-Jung Su ,  Jian-Wei Chen ,  Shui-Yen Lu ,  Yi-Wen Chen ,  Po-Cheng Huang ,  Chen-Ming Huang ,  Shih-Fang Tzou

    IPC: H01L21/8234 ,  H01L29/66 ,  H01L21/311 ,  H01L21/02 ,  H01L29/06 ,  H01L21/3105

    CPC classification number: H01L29/66545 ,  H01L21/0206 ,  H01L21/02065 ,  H01L21/02271 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/311 ,  H01L21/31144 ,  H01L21/823431 ,  H01L21/823821 ,  H01L29/4966 ,  H01L29/517

    Abstract: A method of forming a semiconductor device is disclosed. A substrate having multiple fins is provided. An insulating layer fills a lower portion of a gap between two adjacent fins. At least one first stacked structure is formed on one fin and at least one second stacked structure is formed on one insulation layer. A first dielectric layer is formed to cover the first and second stacked structures. A portion of the first dielectric layer and portions of the first and second stacked structures are removed. Another portion of the first dielectric layer is removed until a top of the remaining first dielectric layer is lower than tops of the first and second stacked structures. A second dielectric layer is formed to cover the first and second stacked structures. A portion of the second dielectric layer is removed until the tops of the first and second stacked structures are exposed.

    Abstract translation: 公开了一种形成半导体器件的方法。 提供具有多个翅片的基板。 绝缘层填充两个相邻翅片之间的间隙的下部。 在一个翅片上形成至少一个第一堆叠结构，并且在一个绝缘层上形成至少一个第二堆叠结构。 形成第一电介质层以覆盖第一和第二堆叠结构。 去除第一电介质层的一部分和第一和第二堆叠结构的部分。 去除第一电介质层的另一部分，直到剩余的第一电介质层的顶部低于第一和第二堆叠结构的顶部。 形成第二电介质层以覆盖第一和第二堆叠结构。 去除第二电介质层的一部分直到第一和第二堆叠结构的顶部露出。

    Semiconductor process
    37.
    发明授权
    Semiconductor process 有权
    半导体工艺

    公开(公告)号：US09165997B2

    公开(公告)日：2015-10-20

    申请号：US14583122

    申请日：2014-12-25

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chieh-Te Chen ,  Yi-Po Lin ,  Jiunn-Hsiung Liao ,  Shui-Yen Lu ,  Li-Chiang Chen

    IPC: H01L21/20 ,  H01L21/332 ,  H01L49/02 ,  H01L27/06 ,  H01L21/768 ,  H01L29/66

    CPC classification number: H01L28/20 ,  H01L21/76897 ,  H01L27/0629 ,  H01L28/24 ,  H01L29/66545

    Abstract: A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided.

    Abstract translation: 半导体结构包括基板，抗蚀剂层，电介质材料，两个U形金属层和两种金属。 衬底具有隔离结构。 抗蚀剂层位于隔离结构上。 介电材料位于抗蚀剂层上。 两个U形金属层位于电介质材料的两侧和抗蚀剂层上。 两个金属分别位于两个U形金属层上。 以这种方式提供了用于形成所述半导体结构的半导体工艺。

    Method of forming semiconductor device
    38.
    发明授权
    Method of forming semiconductor device 有权
    半导体器件形成方法

    公开(公告)号：US08980701B1

    公开(公告)日：2015-03-17

    申请号：US14071672

    申请日：2013-11-05

    Applicant: United Microelectronics Corp.

    Inventor： Shui-Yen Lu ,  Chih-Ho Wang ,  Jhen-Cyuan Li

    IPC: H01L21/00 ,  H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  H01L21/84

    CPC classification number: H01L29/66795 ,  H01L21/0212 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/845

    Abstract: A method of forming a semiconductor device includes the following steps. At least a fin structure is provided on a substrate and a gate structure partially overlapping the fin structure is formed. Then, a dielectric layer is formed on the substrate. Subsequently, a first etching process is performed to remove apart of the dielectric layer to form a first spacer surrounding the gate structure and a second spacer surrounding a sidewall of the fin structure, and a protective layer is formed in-situ to cover the gate structure and the first spacer. Finally, a second etching process is performed to remove a part of the protective layer and totally remove the second spacer.

    Abstract translation: 形成半导体器件的方法包括以下步骤。 至少在基板上设置翅片结构，并且形成部分地与翅片结构重叠的栅极结构。 然后，在基板上形成电介质层。 随后，执行第一蚀刻工艺以除去电介质层的间隔，以形成围绕栅极结构的第一间隔件和围绕鳍结构的侧壁的第二间隔件，并且保护层原位形成以覆盖栅极结构 和第一间隔物。 最后，执行第二蚀刻工艺以去除保护层的一部分并完全去除第二间隔物。

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