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    Stiffener assembly for use with testing devices
    31.
    发明授权
    Stiffener assembly for use with testing devices 有权
    用于测试装置的加强装置

    公开(公告)号：US07956635B2

    公开(公告)日：2011-06-07

    申请号：US12345740

    申请日：2008-12-30

    Applicant: Eric D. Hobbs ,  Andrew W. McFarland

    Inventor： Eric D. Hobbs ,  Andrew W. McFarland

    IPC: G01R31/20 ,  G01R31/02

    CPC classification number: G01R1/07378

    Abstract: A stiffener assembly for use with testing devices is provided herein. In some embodiments, a stiffener for use with testing devices includes an inner member; an outer member disposed in a predominantly spaced apart relation to the inner member; and a plurality of alignment mechanisms for orienting the inner and outer members with respect to each other, wherein the alignment mechanisms transfer forces applied to a lower surface of the inner member to the outer member and provide the predominant conductive heat transfer passageway between the inner and outer members.

    Abstract translation: 本文提供了一种与测试装置一起使用的加强装置。 在一些实施例中，用于与测试装置一起使用的加强件包括内部构件; 与所述内部构件以主要间隔开的关系设置的外部构件; 以及用于使内部和外部构件相对于彼此定向的多个对准机构，其中对准机构将施加到内部构件的下表面的力传递到外部构件，并且在内部构件和内部构件之间提供主要的导电传热通道 外部成员。

    Stacked guard structures
    32.
    发明授权
    Stacked guard structures 有权
    堆叠的防护结构

    公开(公告)号：US07956633B2

    公开(公告)日：2011-06-07

    申请号：US11308094

    申请日：2006-03-06

    Applicant: Benjamin N. Eldridge

    Inventor： Benjamin N. Eldridge

    IPC: G01R31/00

    CPC classification number: G01R1/07378 ,  G01R31/2889 ,  H05K1/0216 ,  H05K1/0298 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09672

    Abstract: Systems and methods for providing a stack with a guard plane embedded in the stack are disclosed. An electrical apparatus can be made by forming a stack comprising an electrically conductive signal structure, an electrical guard structure, and an electrically insulating structure disposed between the signal structure and the guard structure. The signal structure, insulating structure, and guard structure can be aligned one with another in the stack.

    Abstract translation: 公开了一种用于提供具有嵌入堆叠中的保护平面的堆叠的系统和方法。 可以通过形成包括导电信号结构，电保护结构和布置在信号结构和保护结构之间的电绝缘结构的堆叠来制造电气设备。 信号结构，绝缘结构和防护结构可以在堆叠中彼此对准。

    Method and system for designing a probe card
    34.
    发明授权
    Method and system for designing a probe card 有权
    探针卡设计方法及系统

    公开(公告)号：US07930219B2

    公开(公告)日：2011-04-19

    申请号：US12564799

    申请日：2009-09-22

    Applicant: Benjamin N. Eldridge ,  Mark W. Brandemuehl ,  Stefan Graef ,  Yves Parent

    Inventor： Benjamin N. Eldridge ,  Mark W. Brandemuehl ,  Stefan Graef ,  Yves Parent

    IPC: G06Q30/00

    CPC classification number: G01R3/00 ,  G01R1/073 ,  G01R1/07342 ,  G06Q30/0609 ,  G06Q30/0621 ,  G06Q30/0633 ,  G06Q50/188

    Abstract: A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to their respective design specifications. These verification packages further consist of drawing files visually describing the final design and verification files confirming wafer bonding pad data. Verification packages are reviewed and forwarded to an applications engineer after customer approval. An interactive simulation of probe card performance is also provided. Data on probe card performance is incorporated into an overall modeling exercise, which includes not only the probe card, but data on the device(s) under test and wafer, as well as data on automated test equipment.

    Abstract translation: 提供了一种通过互联网从潜在客户提供的数据设计探针卡的方法和系统。 设计规范由潜在客户输入系统并编译成数据库。 每套设计规范的集体可行性由自动化计算机系统确定，并传达给潜在客户。 如果可行，附加软件可使潜在客户根据各自的设计规范创建验证包。 这些验证包还包括可视化地描述确认晶圆键合焊盘数据的最终设计和验证文件的绘图文件。 在客户批准后，验证包将被审核并转发给应用工程师。 还提供了探针卡性能的交互式仿真。 探针卡性能数据被纳入整体建模练习中，其中不仅包括探针卡，还包括被测设备和晶片上的数据，以及自动测试设备的数据。

    Probe card cooling assembly with direct cooling of active electronic components
    35.
    发明授权
    Probe card cooling assembly with direct cooling of active electronic components 失效
    探针卡冷却组件，直接冷却有源电子部件

    公开(公告)号：US07863915B2

    公开(公告)日：2011-01-04

    申请号：US12547260

    申请日：2009-08-25

    Applicant: Charles A. Miller

    Inventor： Charles A. Miller

    IPC: G01R31/02

    CPC classification number: G01R31/2875 ,  G01R1/06727 ,  G01R1/07385 ,  G01R31/2886 ,  G01R31/2891

    Abstract: A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.

    Abstract translation: 用于测试系统的探针卡冷却组件包括具有通过直接冷却冷却的一个或多个模具的封装。 冷却的包装包括具有有源电子部件的一个或多个模具和允许冷却剂进入高密度封装并且在测试操作期间直接冷却模具的有效电子部件的至少一个冷却剂端口。

    Rotating contact element and methods of fabrication
    36.
    发明授权
    Rotating contact element and methods of fabrication 失效
    旋转接触元件和制造方法

    公开(公告)号：US07851794B2

    公开(公告)日：2010-12-14

    申请号：US11617394

    申请日：2006-12-28

    Applicant: Eric D. Hobbs

    Inventor： Eric D. Hobbs

    IPC: H01L21/00

    CPC classification number: G01R1/06716 ,  G01R1/06733 ,  Y10T29/49128

    Abstract: Rotating contact elements and methods of fabrication are provided herein. In one embodiment, a rotating contact element includes a tip having a first side configured to contact a device to be tested and an opposing second side; and a plurality of deformed members extending from the second side of the tip and arranged about a central axis thereof, wherein the tip rotates substantially about the central axis upon compression of the plurality of deformed members.

    Abstract translation: 本文提供旋转接触元件和制造方法。 在一个实施例中，旋转接触元件包括尖端，其具有被配置为接触待测试装置和相对的第二侧的第一侧; 以及多个变形构件，其从所述尖端的第二侧延伸并围绕其中心轴线布置，其中当所述多个变形构件压缩时，所述尖端基本上围绕所述中心轴线旋转。

    Probe card configuration for low mechanical flexural strength electrical routing substrates
    37.
    发明授权
    Probe card configuration for low mechanical flexural strength electrical routing substrates 失效
    用于低机械抗弯强度电路基板的探针卡配置

    公开(公告)号：US07825674B2

    公开(公告)日：2010-11-02

    申请号：US11479068

    申请日：2006-06-30

    Applicant: Makarand S. Shinde ,  Richard A. Larder ,  Timothy E. Cooper ,  Ravindra V. Shenoy ,  Benjamin N. Eldridge

    Inventor： Makarand S. Shinde ,  Richard A. Larder ,  Timothy E. Cooper ,  Ravindra V. Shenoy ,  Benjamin N. Eldridge

    IPC: G01R31/02 ,  H01R11/18

    CPC classification number: G01R31/2889 ,  G01R1/07378

    Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

    Abstract translation: 提供了用于晶片测试系统的探针卡的机械支撑结构，以增加对支撑弹簧探针的极低弯曲强度基底的支撑。 通过以下方式提供增加的机械支撑：（1）围绕基板的周边的框架，在基板的表面上具有增大尺寸的水平延伸; （2）具有弯曲的板簧，使得板簧能够垂直延伸并使内框架接近弹簧探针; （3）绝缘柔性膜或加工到内框架中的负载支撑构件，使低弯曲强度基板与其边缘更远地接合; （4）加载支撑结构，例如支撑销，以提供支撑以抵消在空间变压器基板的中心附近的探头负载; 和/或（5）设置在所述探针与下弯曲强度空间变换器基板之间的高刚性界面砖。

    Method and apparatus for remotely buffering test channels
    38.
    发明授权
    Method and apparatus for remotely buffering test channels 失效
    用于远程缓存测试通道的方法和设备

    公开(公告)号：US07825652B2

    公开(公告)日：2010-11-02

    申请号：US12273408

    申请日：2008-11-18

    Applicant: Charles A. Miller

    Inventor： Charles A. Miller

    IPC: G01R31/28

    CPC classification number: G01R31/3008

    Abstract: A system is provided to enable leakage current measurement or parametric tests to be performed with an isolation buffer provided in a channel line. Multiple such isolation buffers are used to connect a single signal channel to multiple lines. Leakage current measurement is provided by providing a buffer bypass element, such as a resistor or transmission gate, between the input and output of each buffer. The buffer bypass element can be used to calibrate buffer delay out of the test system by using TDR measurements to determine the buffer delay based on reflected pulses through the buffer bypass element. Buffer delay can likewise be calibrated out by comparing measurements of a buffered and non-buffered channel line, or by measuring a device having a known delay.

    Abstract translation: 提供了一种系统，用于使泄漏电流测量或参数测试能够与通道线中提供的隔离缓冲器一起进行。 多个这样的隔离缓冲器用于将单个信号通道连接到多条线路。 泄漏电流测量通过在每个缓冲器的输入和输出之间提供缓冲旁路元件（例如电阻器或传输门）来提供。 缓冲旁路元件可用于通过使用TDR测量来确定缓冲器延迟，以通过缓冲旁路元件反射的脉冲来校准测试系统中的缓冲延迟。 同样可以通过比较缓冲和非缓冲通道线的测量值，或通过测量具有已知延迟的器件来校准缓冲器延迟。

    Method and apparatus for Terminating A Test Signal Applied To Multiple Semiconductor Loads Under Test
    40.
    发明申请
    Method and apparatus for Terminating A Test Signal Applied To Multiple Semiconductor Loads Under Test 有权
    用于终止被测试的多个半导体负载的测试信号的方法和装置

    公开(公告)号：US20100253374A1

    公开(公告)日：2010-10-07

    申请号：US12416375

    申请日：2009-04-01

    Applicant: Guang Chen ,  Charles Miller ,  David Pritzkau

    Inventor： Guang Chen ,  Charles Miller ,  David Pritzkau

    IPC: G01R31/02 ,  G01R31/26

    CPC classification number: G01R31/31905

    Abstract: Apparatus for terminating a test signal applied to multiple semiconductor loads under test is described—for example apparatus for interfacing a test signal between a tester and a semiconductor device under test (DUT). In some examples, a probe card assembly may include at least one probe substrate each having test probes configured to contact test features of a DUT; a wiring substrate, coupled to the at least one probe substrate, having a connector configured for coupling with a source termination of a tester; a signal path formed on and/or in the wiring substrate and the at least one probe substrate, the signal path having a trace and trace stubs fanning out from the trace, an input of the trace being coupled to the connector and outputs of the trace stubs being coupled to the test probes; and a resistive termination coupled between the trace and at least one potential.

    Abstract translation: 描述了用于终止施加到被测试的多个半导体负载的测试信号的装置，例如用于在测试器和待测半导体器件（DUT）之间接合测试信号的装置。 在一些示例中，探针卡组件可以包括至少一个探针基板，每个探针基板具有被配置为接触DUT的测试特征的测试探针; 耦合到所述至少一个探针衬底的布线衬底，具有被配置为与测试器的源端接耦合的连接器; 形成在布线基板和至少一个探针基板上和/或布线基板和至少一个探针基板上的信号路径，该信号路径具有从迹线扇出的迹线和迹线短线，迹线的输入耦合到连接器和迹线的输出 桩被耦合到测试探针; 以及耦合在迹线和至少一个电位之间的电阻终端。

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