公开(公告)号：US20160104729A1

公开(公告)日：2016-04-14

申请号：US14840680

申请日：2015-08-31

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Laurent Favennec ,  Didier Dutartre ,  Francois Roy

IPC: H01L27/146

CPC classification number: H01L27/1462 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14685 ,  H01L27/14689 ,  H01L31/11 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.

Abstract translation: 一种制造钉扎光电二极管的方法，包括：在第二导电类型的衬底上形成光子转换到第一导电类型的电荷的区域; 用第二导电类型的重掺杂绝缘体层涂覆所述区域; 和退火以确保掺杂剂从重掺杂绝缘体层扩散。

公开(公告)号：US09303630B2

公开(公告)日：2016-04-05

申请号：US13874163

申请日：2013-04-30

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Thomas Skotnicki ,  Onoriu Puscasu ,  Stéphane Monfray

IPC: H02N10/00 ,  H01H9/28 ,  F03G7/06 ,  H02N1/08

CPC classification number: F03G7/06 ,  H02N1/08

Abstract: A device for converting thermal energy into electric energy intended to be used in combination with a hot source including: a capacitor of variable capacitance, including two electrodes separated by an electrically-insulating material, one of these electrodes being deformable and being associated with an element forming a bimetallic strip, said bimetallic strip including at least two layers of materials having different thermal expansion coefficients, said bimetallic strip being free to deform when it is submitted to the heat of said hot source; a second capacitor having a first electrode connected to a first electrode of said capacitor of variable capacitance; a harvesting circuit electrically connected between the second electrode of the capacitor of variable capacitance and the second electrode of the second capacitor, said harvesting circuit being capable of conducting the current flowing between said second electrodes.

Abstract translation: 一种用于将热能转换成与热源组合使用的电能的装置，包括：可变电容的电容器，包括由电绝缘材料隔开的两个电极，这些电极中的一个可变形并与元件相关联 形成双金属条，所述双金属条包括具有不同热膨胀系数的至少两层材料，当所述双金属条被送到所述热源的热时，所述双金属条可自由变形; 第二电容器，其具有连接到所述可变电容器的电容器的第一电极的第一电极; 电连接在可变电容器的电容器的第二电极和第二电容器的第二电极之间的收集电路，所述收获电路能够传导在所述第二电极之间流动的电流。

公开(公告)号：US09299865B2

公开(公告)日：2016-03-29

申请号：US14464898

申请日：2014-08-21

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Michel Marty ,  Laurent Frey ,  Sebastien Jouan ,  Salim Boutami

IPC: H01L29/06 ,  H01L31/062 ,  H01L27/14 ,  H01L31/107 ,  H01L31/0352 ,  G01T1/24 ,  H01L31/0232 ,  H01L27/146

CPC classification number: H01L31/035236 ,  G01T1/248 ,  H01L27/14625 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/02327 ,  H01L31/107

Abstract: A SPAD-type photodiode has a semiconductor substrate with a light-receiving surface. A lattice formed of interlaced strips made of a first material covers the light receiving surface. The lattice includes lattice openings with lateral walls covered by a spacer made of a second material. Then first and second materials have different optical indices, and further each optical index is less than or equal to the substrate optical index. A pitch of the lattice is of the order of a magnitude of an operating wavelength of the photodiode. The first and second materials are transparent at that operating wavelength. The lattice is made of a conductive material electrically coupled to an electrical connection node (for example, a bias voltage node).

Abstract translation: SPAD型光电二极管具有具有受光面的半导体基板。 由第一材料制成的交错条形成的格子覆盖光接收表面。 格子包括具有被由第二材料制成的间隔物覆盖的侧壁的格子开口。 然后第一和第二材料具有不同的光学指数，并且每个光学指数还小于或等于基底光学指数。 晶格的间距是光电二极管的工作波长大小的数量级。 第一和第二材料在该工作波长下是透明的。 晶格由电耦合到电连接节点（例如，偏压节点）的导电材料制成。

公开(公告)号：US20160056192A1

公开(公告)日：2016-02-25

申请号：US14929077

申请日：2015-10-30

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Jean-Robert MANOUVRIER ,  Pascal FONTENEAU ,  Xavier MONTAGNER

IPC: H01L27/146

CPC classification number: H01L27/14614 ,  H01L27/14607 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/14689 ,  H01L29/4236

Abstract: The present disclosure relates to a photodiode comprising: a P-conductivity type substrate region, an electric charge collecting region for collecting electric charges appearing when a rear face of the substrate region receives light, the collecting region comprising an N-conductivity type region formed deep in the substrate region, an N-conductivity type read region formed in the substrate region, and an isolated transfer gate, formed in the substrate region in a deep isolating trench extending opposite a lateral face of the N-conductivity type region, next to the read region, and arranged for receiving a gate voltage to transfer electric charges stored in the collecting region toward the read region.

公开(公告)号：US20160047986A1

公开(公告)日：2016-02-18

申请号：US14804629

申请日：2015-07-21

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Alain CHANTRE ,  Sébastien CREMER

IPC: G02B6/136 ,  H01S5/026 ,  G02B6/42 ,  G02B6/12 ,  G02B6/132 ,  H01S5/343 ,  H01S5/02

CPC classification number: G02B6/136 ,  G02B6/12004 ,  G02B6/132 ,  G02B6/4257 ,  G02B2006/121 ,  G02B2006/12121 ,  H01S5/0085 ,  H01S5/021 ,  H01S5/02248 ,  H01S5/026 ,  H01S5/343

Abstract: A method of manufacturing an integrated circuit including photonic components on a silicon layer and a laser made of a III-V group material includes providing the silicon layer positioned on a first insulating layer that is positioned on a support. First trenches are etched through the silicon layer and stop on the first insulating layer, and the first trenches are covered with a silicon nitride layer. Second trenches are etched through a portion of the silicon layer, and the first and second trenches are filled with silicon oxide, which are planarized. The method further includes removing the support and the first insulating layer, and bonding a wafer including a III-V group heterostructure on the rear surface of the silicon layer.

Abstract translation: 制造包括硅层上的光子分量和由III-V族材料制成的激光的集成电路的方法包括提供位于位于支撑体上的第一绝缘层上的硅层。 第一沟槽被蚀刻穿过硅层并在第一绝缘层上停止，并且第一沟槽被氮化硅层覆盖。 第二沟槽被蚀刻通过硅层的一部分，并且第一和第二沟槽用平坦化的氧化硅填充。 该方法还包括去除支撑体和第一绝缘层，以及在硅层的后表面上接合包括III-V族异质结构的晶片。

公开(公告)号：US09234859B2

公开(公告)日：2016-01-12

申请号：US14226554

申请日：2014-03-26

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS

Inventor： Michele Vaiana ,  Daniele Casella ,  Giuseppe Bruno ,  Rosario Cariola ,  Benoit Gautheron

IPC: H01L29/02 ,  G01N27/12 ,  G01N27/22 ,  H01L49/02

CPC classification number: G01N27/225 ,  H01L28/40

Abstract: An integrated capacitive-type humidity sensor formed in a semiconductor chip integrating a sensing capacitor and a reference capacitor. Each of the sensing and reference capacitors have at least a first electrode and at least a second electrode, the first and second electrodes of each of the sensing and reference capacitors being arranged at distance and mutually insulated. A hygroscopic layer extends on the sensing and reference capacitors and a conductive shielding region extends on the reference capacitor but not on the sensing capacitor.

Abstract translation: 集成电容型湿度传感器，形成在集成感测电容器和参考电容器的半导体芯片中。 感测和参考电容器中的每一个具有至少第一电极和至少第二电极，每个感测和参考电容器的第一和第二电极被布置成距离并相互绝缘。 吸湿层在感测和参考电容器上延伸，导电屏蔽区域在参考电容器上延伸，但不在感测电容器上。

公开(公告)号：US09224775B2

公开(公告)日：2015-12-29

申请号：US14446804

申请日：2014-07-30

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Jean-Pierre Carrere ,  Patrick Gros D'Aillon ,  Stephane Allegret-Maret ,  Jean-Pierre Oddou

IPC: H01L27/14 ,  H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/1462 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/14685

Abstract: An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.

Abstract translation: 集成电路包括由支撑至少一个像素的衬底形成的背面照明图像传感器，位于衬底前侧之上的互连部分和位于衬底背面上方的抗反射层。 抗反射层可以由氮化硅层形成。 附加层位于抗反射层上方。 附加层由非晶氮化硅或氢化非晶氮化硅之一形成，其中每立方厘米的硅原子数与每立方厘米的氮原子数之比大于0.7。

公开(公告)号：US09219095B2

公开(公告)日：2015-12-22

申请号：US14489698

申请日：2014-09-18

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Michel Marty ,  Sebastien Jouan ,  Laurent Frey

IPC: H01L27/146 ,  H01L29/49 ,  H01L31/107

CPC classification number: H01L27/14645 ,  H01L27/14614 ,  H01L27/14621 ,  H01L27/14636 ,  H01L27/14649 ,  H01L27/14685 ,  H01L27/14689 ,  H01L29/4916 ,  H01L31/107

Abstract: An integrated circuit includes a substrate and an interconnect part above the substrate, and further includes a photosensitive region in the substrate. A filter is provided aligned with the photosensitive region. The filter is formed by at least one layer of filter material. In one implementation for front side illumination, the layer of filter material is positioned above the photosensitive region between the interconnect part and the substrate. In another implementation for back side illumination, the layer of filter material is positioned below the photosensitive region opposite the interconnect part. The layer of filter material is configured such that a product of the thickness of the layer of filter material and the imaginary part of the refractive index of the layer of filter material is above 1 nm.

Abstract translation: 集成电路包括衬底和衬底上方的互连部分，并且还包括衬底中的感光区域。 提供与感光区域对准的过滤器。 过滤器由至少一层过滤材料形成。 在用于前侧照明的一个实施例中，过滤材料层位于互连部分和基板之间的感光区域上方。 在背面照明的另一实施方案中，过滤材料层位于与互连部分相对的光敏区域的下方。 过滤材料层被配置为使得过滤材料层的厚度和过滤材料层的折射率的虚部的乘积高于1nm。

公开(公告)号：US09184295B2

公开(公告)日：2015-11-10

申请号：US14077724

申请日：2013-11-12

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Stéphane Monfray ,  Thomas Skotnicki

IPC: H01L29/786

CPC classification number: H01L29/786 ,  H01L29/78648

Abstract: A method for manufacturing a suspended membrane in a single-crystal semiconductor substrate, including the steps of: forming in the substrate an insulating ring delimiting an active area, removing material from the active area, successively forming in the active area a first and a second layers, the second layer being a single-crystal semiconductor layer, etching a portion of the internal periphery of said ring down to a depth greater than the thickness of the second layer, removing the first layer so that the second layer formed a suspended membrane anchored in the insulating ring.

Abstract translation: 一种用于制造单晶半导体衬底中的悬浮膜的方法，包括以下步骤：在衬底中形成限定有源区的绝缘环，从有源区去除材料，在有源区中依次形成第一和第二 层，所述第二层是单晶半导体层，将所述环的内周的一部分蚀刻到大于所述第二层的厚度的深度，去除所述第一层，使得所述第二层形成悬浮膜 在绝缘环中。

公开(公告)号：US09171973B2

公开(公告)日：2015-10-27

申请号：US14559006

申请日：2014-12-03

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA ,  Commissariat a l'Energie Atomique et aux Energies Alternatives

Inventor： Romain Girard Desprolet ,  Sandrine Lhostis ,  Salim Boutami ,  Michel Marty

IPC: H01L31/0232 ,  H01L31/0216 ,  G02B5/20 ,  H01L27/146

CPC classification number: H01L31/02162 ,  G02B5/203 ,  H01L27/14621 ,  H01L27/14629 ,  H01L27/1463 ,  H01L27/14685 ,  H01L27/14687 ,  H01L31/02165 ,  H01L31/02327

Abstract: An integrated imaging device supports front face illumination with one or more photosensitive regions formed in a substrate. A lower dielectric region is provided over the substrate, the lower dielectric region having an upper face. A metal optical filter having a metal pattern is provided on the upper face (or extending into the lower dielectric region from the upper face). An upper dielectric region is provided on top of the lower dielectric region and metal optical filter. The lower dielectric region is at least part of a pre-metal dielectric layer, and the upper dielectric region is at least part of a metallization layer.

Abstract translation: 集成成像装置支持在基板中形成的一个或多个感光区域的前面照明。 下部电介质区域设置在衬底上，下部电介质区域具有上表面。 具有金属图案的金属滤光器设置在上表面（或从上表面延伸到下介电区域中）。 在下部电介质区域和金属光学滤波器的顶部设置有上部电介质区域。 下电介质区域是预金属介电层的至少一部分，并且上电介质区域是金属化层的至少一部分。