公开(公告)号：US20060138674A1

公开(公告)日：2006-06-29

申请号：US11362419

申请日：2006-02-23

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83385 ,  H01L2224/92224 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

摘要： A thermally enhanced semiconductor package and a fabrication method thereof are provided. A plurality of conductive bumps are formed on bond pads on an active surface of a chip. A heat sink is attached to an inactive surface of the chip and has a surface area larger than that of the chip. An encapsulation body encapsulates the heat sink, chip and conductive bumps, while exposing a bottom or surfaces, not for attaching the chip, of the heat sink and ends of the conductive bumps outside. A plurality of conductive traces are formed on the encapsulation body and electrically connected to the ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with a plurality of openings for exposing predetermined portions of the conductive traces. A solder ball is implanted on each exposed portion of the conductive traces.

摘要翻译： 提供一种热增强型半导体封装及其制造方法。 在芯片的有源表面上的接合焊盘上形成多个导电凸块。 散热器附着在芯片的非活性表面上，其表面积大于芯片的表面积。 封装体封装散热器，芯片和导电凸块，同时暴露散热片的底部或表面，而不是将散热片和导电凸块的端部外露。 多个导电迹线形成在封装主体上并电连接到导电凸块的端部。 焊接掩模层施加在导电迹线上并形成有多个用于暴露导电迹线的预定部分的开口。 在导电迹线的每个暴露部分上注入焊球。

公开(公告)号：US20060117858A1

公开(公告)日：2006-06-08

申请号：US11172798

申请日：2005-07-05

申请人： Chien-Ping Huang

发明人： Chien-Ping Huang

IPC分类号： G01L15/00

CPC分类号： G01F1/36 ,  G01F1/46 ,  G01P5/14

摘要： A method for measuring average velocity pressure of a stack comprises the following steps. First, a total pressure measuring device is provided. The total pressure measuring device then measures the total pressure at a first location in the stack. Next, physical parameters comprising a distance between the first location and an outlet of the stack, a diameter and shape thereof are obtained. A formula of a static pressure and the average velocity pressure between the outlet and the first location is obtained by comparing the physical parameters to known fluid mechanics data. Finally, the average velocity pressure is obtained from the formula and the total pressure.

摘要翻译： 一种用于测量堆叠的平均速度压力的方法包括以下步骤。 首先，提供总压力测量装置。 总压力测量装置然后测量堆叠中的第一位置处的总压力。 接下来，获得包括堆叠的第一位置和出口之间的距离的物理参数，其直径和形状。 通过将物理参数与已知流体力学数据进行比较，获得静压力和出口与第一位置之间的平均速度压力公式。 最后，从公式和总压力获得平均速度压力。

公开(公告)号：US20060081978A1

公开(公告)日：2006-04-20

申请号：US11161882

申请日：2005-08-19

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34

CPC分类号： H01L23/3675 ,  H01L21/4871 ,  H01L21/50 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3677 ,  H01L23/4334 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92147 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.

摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 具有第一表面，相对的第二表面和中空结构的散热器，散热器的第二表面安装在芯片上，其中芯片的尺寸大于中空结构，使得芯片部分地暴露于 中空结构; 在散热器和芯片载体之间形成的用于封装芯片的密封剂，其中散热器的第一表面和侧面从密封剂暴露以散发从芯片产生的热量; 以及设置在芯片载体上的多个导电元件，用于将芯片电连接到外部设备。 本发明还提供一种制造散热封装结构的方法。

公开(公告)号：US20050184404A1

公开(公告)日：2005-08-25

申请号：US10835343

申请日：2004-04-28

申请人： Chih-Ming Huang ,  Cheng-Hsu Hsiao ,  Chien-Ping Huang

发明人： Chih-Ming Huang ,  Cheng-Hsu Hsiao ,  Chien-Ping Huang

IPC分类号： H01L21/48 ,  H01L23/04 ,  H01L23/28 ,  H01L31/0203

CPC分类号： H01L27/14683 ,  H01L23/04 ,  H01L24/97 ,  H01L27/14618 ,  H01L31/0203 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

摘要： A photosensitive semiconductor package with a support member and its fabrication method are provided. The support member having a receiving space is placed on an upper surface of a substrate. An encapsulation body is formed on the substrate and bonded with an outer wall of the support member. At least one chip is mounted on a predetermined area of the substrate exposed via the receiving space, and is electrically connected to the substrate. A light-permeable lid is attached to the support member and the encapsulation body to seal the receiving space. A plurality of solder balls or contact lands are formed on a lower surface of the substrate. By provision of the support member, there is no need to use an insert mold, such that the substrate would not be damaged by the insert mold, and bond fingers on the substrate would not be contaminated by the insert mold.

摘要翻译： 提供具有支撑构件的光敏半导体封装及其制造方法。 具有接收空间的支撑构件被放置在基板的上表面上。 封装体形成在基板上并与支撑构件的外壁结合。 至少一个芯片安装在经由接收空间暴露的衬底的预定区域上，并且电连接到衬底。 透光盖附接到支撑构件和封装体以密封接收空间。 在基板的下表面上形成多个焊球或接触焊盘。 通过设置支撑构件，不需要使用插入模具，使得基板不会被插入模具损坏，并且基板上的键合指不会被插入模具污染。

公开(公告)号：US20050170561A1

公开(公告)日：2005-08-04

申请号：US10844877

申请日：2004-05-12

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/055 ,  H01L23/10 ,  H01L31/0203

CPC分类号： H01L23/055 ,  H01L21/50 ,  H01L23/10 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/05599 ,  H01L2924/00

摘要： A fabrication method of a semiconductor package with a photosensitive chip is provided. A substrate having a core is prepared. An interposer is mounted on the substrate, with a peripheral portion of the substrate exposed from the interposer. A molding process is performed and the substrate is clamped between an upper mold and a lower mold, with the interposer received in an upwardly-recessed cavity of the upper mold. A molding compound is injected into the upwardly-recessed cavity to form a dam on the peripheral portion of the substrate. Then the upper and lower molds and the interposer are removed from the substrate to expose area covered by the interposer on the substrate. At least one photosensitive chip is mounted on the exposed area of the substrate. A lid seals the dam such that the chip is received in a space defined by the substrate, the dam and the lid.

摘要翻译： 提供了具有感光芯片的半导体封装的制造方法。 制备具有芯的衬底。 插入器安装在衬底上，衬底的周边部分从插入件露出。 进行成型工艺，并且将基板夹在上模具和下模具之间，其中插入件容纳在上模具的向上凹入的空腔中。 将模塑料注入到上凹腔中以在基材的周边部分上形成坝。 然后将上模和下模和插入件从基板上移除以露出基板上由插入件覆盖的区域。 至少一个感光芯片安装在基板的暴露区域上。 盖子密封大坝，使得芯片被容纳在由基板，坝和盖子限定的空间中。

公开(公告)号：US06891273B2

公开(公告)日：2005-05-10

申请号：US10404173

申请日：2003-04-01

申请人： Han-Ping Pu ,  Chien Ping Huang

发明人： Han-Ping Pu ,  Chien Ping Huang

IPC分类号： H01L21/60 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/16 ,  H01L2224/24011 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171

摘要： A semiconductor package and a fabrication method thereof are provided in which a chip is mounted on a substrate, and a dielectric layer is applied over the substrate and chip, with bond fingers formed on the substrate and electric contacts formed on the chip being exposed outside. A metal layer is formed over the dielectric layer and the exposed bond fingers and electric contacts, and patterned to form a plurality of conductive traces that electrically connect the electric contacts of the chip to the bond fingers of the substrate. The conductive traces replace conventional wire bonding technology and thus eliminate the occurrence of wire sweep or short circuits in fabrication processes. Therefore, a low profile chip with a reduced pitch between adjacent electric contacts can be used without being limited to feasibility of the wire bonding technology.

摘要翻译： 提供了一种半导体封装及其制造方法，其中芯片安装在基板上，并且电介质层被施加在基板和芯片上，具有形成在基板上的结合指状物，并且形成在芯片上的电触点暴露在外部。 在电介质层和暴露的结合指状物和电触点之上形成金属层，并且被图案化以形成将芯片的电触头电连接到衬底的结合指的多个导电迹线。 导电迹线取代了传统的引线键合技术，从而消除了制造工艺中线扫或短路的发生。 因此，可以使用在相邻的电触点之间具有减小的间距的低轮廓芯片，而不限于引线接合技术的可行性。

公开(公告)号：US06870274B2

公开(公告)日：2005-03-22

申请号：US10618011

申请日：2003-07-11

申请人： Chien-Ping Huang

发明人： Chien-Ping Huang

IPC分类号： H01L21/56 ,  H01L21/82 ,  H01L23/13 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495 ,  H01L23/498 ,  H01L23/52 ,  H01L27/10 ,  H01L29/40 ,  H01L29/739 ,  H01L31/0203

CPC分类号： H01L23/13 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/49 ,  H01L31/0203 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2924/15311 ,  H04N5/2257 ,  H01L2924/00014 ,  H01L2924/00

摘要： A flash-preventing window ball grid array semiconductor package, a method for fabricating the same, and a chip carrier used in the semiconductor package are provided. The chip carrier has a through hole and has a surface formed with a plurality of wire-bonding portions, ball-bonding portions and intended-exposing regions. A chip is mounted over the through hole and electrically connected to the wire-bonding portions by a plurality of bonding wires penetrating through the through hole. An encapsulation body encapsulates the chip and bonding wires. The intended-exposing regions serve as a narrow runner which is filled with an encapsulating material forming the encapsulation body, making the encapsulating material not flash over the ball-bonding portions. This allows a plurality of solder balls to be well bonded to the ball-bonding portions, thereby assuring the quality of electrical connection and the surface planarity of the semiconductor package.

摘要翻译： 提供防闪光窗球栅阵列半导体封装，其制造方法以及半导体封装中使用的芯片载体。 芯片载体具有通孔，并且具有形成有多个引线接合部分，滚珠接合部分和预期曝光区域的表面。 芯片安装在通孔上方，并通过贯穿通孔的多根接合线电连接到引线接合部分。 封装体封装芯片和接合线。 预期曝光区域用作填充有形成封装体的封装材料的窄流道，使得封装材料不会在滚珠焊接部分上闪烁。 这允许多个焊球与滚珠焊接部分良好地结合，从而确保电连接的质量和半导体封装的表面平面度。

公开(公告)号：US20050036291A1

公开(公告)日：2005-02-17

申请号：US10759863

申请日：2004-01-16

申请人： Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

发明人： Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L23/055 ,  H01L23/10 ,  H01L23/367 ,  H01L23/467 ,  H01L25/065 ,  H05K7/20

CPC分类号： H01L23/467 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/055 ,  H01L23/10 ,  H01L23/3672 ,  H01L23/3675 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor package with a heat dissipating structure includes a substrate, a chip and a heat dissipating structure. The chip is mounted on and electrically connected to the substrate. The heat dissipating structure includes a first heat sink having at least one positioning portion, and at least one second heat sink having at least one second positioning portion and at least one hollow portion. The second heat sink is mounted on the substrate, and the first positioning portion of the first heat sink is attached to the second positioning portion of the second heat sink, allowing the chip to be accommodated in a space defined by the first heat sink, the hollow portion of the second heat sink and the substrate. This semiconductor package has good heat dissipating efficiency and is cost-effective to fabricate.

摘要翻译： 具有散热结构的半导体封装包括基板，芯片和散热结构。 芯片安装在基板上并电连接到基板。 散热结构包括具有至少一个定位部分的第一散热器和具有至少一个第二定位部分和至少一个中空部分的至少一个第二散热器。 第二散热器安装在基板上，并且第一散热器的第一定位部分附接到第二散热器的第二定位部分，允许芯片容纳在由第一散热器限定的空间中， 第二散热器的中空部分和基板。 该半导体封装具有良好的散热效率，并且制造成本低。

公开(公告)号：US20050035444A1

公开(公告)日：2005-02-17

申请号：US10696198

申请日：2003-10-28

申请人： Chien-Ping Huang

发明人： Chien-Ping Huang

IPC分类号： H01L23/367 ,  H01L23/10

CPC分类号： H01L23/367 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/00

摘要： A multi-chip package device with heat sink and a fabrication method thereof are proposed. At least one first chip and at least one semiconductor package are mounted on and electrically connected to a chip carrier. Then, a heat sink is mounted via an adhesion layer to the first chip and the semiconductor package. In addition, at least one hollow part extending through the heat sink is formed in an area of the heat sink free of contact from the first chip and the semiconductor package, in order to release thermal stresses produced from the heat sink. Thereby, the package device can be prevented from being damaged during the reliability test process, and a product yield is thereby promoted.

摘要翻译： 提出了具有散热器的多芯片封装器件及其制造方法。 至少一个第一芯片和至少一个半导体封装安装在芯片载体上并电连接至芯片载体。 然后，通过粘合层将散热器安装到第一芯片和半导体封装。 此外，延伸穿过散热器的至少一个中空部分形成在散热器的与第一芯片和半导体封装件没有接触的区域中，以便释放从散热器产生的热应力。 由此，可以防止在可靠性试验过程中包装装置受损，从而促进产品收率。

公开(公告)号：US06856015B1

公开(公告)日：2005-02-15

申请号：US10719726

申请日：2003-11-21

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Shih-Kuang Chiu

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Shih-Kuang Chiu

IPC分类号： H01L21/48 ,  H01L23/367 ,  H01L23/12

CPC分类号： H01L23/367 ,  H01L21/4882 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/72 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/16315 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A semiconductor package includes a substrate having a top surface and a bottom surface; at least one chip mounted on the top surface of the substrate and electrically connected to the substrate; a heat sink attached to the top surface of the substrate by an adhesive material applied therebetween; and a plurality of solder balls implanted on the bottom surface of the substrate. The heat sink has a flat portion and a support portion connected to the flat portion. The support portion has at least one recess portion facing toward the top surface of the substrate and at least one burr formed on an interior surface of the recess portion such that the adhesive material can fill the recess portion and submerge the burr to provide an anchoring effect to firmly secure the heat sink in position on the substrate.

摘要翻译： 半导体封装包括具有顶表面和底表面的衬底; 至少一个芯片安装在所述基板的顶表面上并电连接到所述基板; 通过施加在其之间的粘合剂材料附接到基板的顶表面的散热器; 以及注入到所述基板的底面上的多个焊球。 散热器具有平坦部分和连接到平坦部分的支撑部分。 所述支撑部分具有至少一个面向所述基板的顶表面的凹部和至少一个形成在所述凹部的内表面上的毛刺，使得所述粘合剂材料可以填充所述凹陷部分并浸没所述毛刺以提供锚固效果 以将散热器牢固地固定在基板上的适当位置。