公开(公告)号：US20080079128A1

公开(公告)日：2008-04-03

申请号：US11855951

申请日：2007-09-14

Applicant: Hyo-Jae BANG ,  Seong-Chan HAN ,  Hun HAN ,  Dong-Chun LEE

Inventor： Hyo-Jae BANG ,  Seong-Chan HAN ,  Hun HAN ,  Dong-Chun LEE

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L23/49582 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A lead frame type stack package in which a lead of the package is well connected to a semiconductor module, and a method of fabricating the same are provided. A lead of an upper package and a lead of a lower package are connected using laser soldering. Since leads of the upper and lower packages are connected by solder balls without the use of a soldering pot, loss of a plating layer of the lead due to solder dipping is prevented and the leads are well connected without soldering defects when connecting the lead of the lower package to a connection pad of a semiconductor module substrate.

Abstract translation: 一种引线框架型堆叠封装，其中封装的引线与半导体模块良好连接，并提供其制造方法。 使用激光焊接连接上封装的引线和下封装的引线。 由于上，下封装的引线通过焊锡球连接而不使用焊锡锅，因此防止了由焊料浸渍引起的引线的镀层损失，并且当连接引线 下封装到半导体模块基板的连接焊盘。

公开(公告)号：US07338568B2

公开(公告)日：2008-03-04

申请号：US10882336

申请日：2004-07-02

Applicant: Young-Soo Lee ,  Myung-Jong Eom ,  Byung-Man Kim ,  Dong-Chun Lee

Inventor： Young-Soo Lee ,  Myung-Jong Eom ,  Byung-Man Kim ,  Dong-Chun Lee

IPC: B32B41/00

CPC classification number: B65C1/02 ,  B65C1/047 ,  Y10T156/1702 ,  Y10T156/1744 ,  Y10T156/1751 ,  Y10T156/1768

Abstract: A method and arrangement for attaching labels to a plurality of semiconductor modules arranged on a double-sided substrate is described which may shorten a process stream in an effort to reduce equipment costs. An exemplary arrangement may include at least one label attaching unit configured to attach labels to a plurality of semiconductor modules mounted on one of a first surface and a second surface of the double-sided substrate, and may include at least one turner configured to turn over the double-sided substrate to expose one of the first surface and second surface to the label attaching unit.

Abstract translation: 描述了将标签附接到布置在双面基板上的多个半导体模块的方法和装置，其可以缩短工艺流以努力降低设备成本。 示例性布置可以包括至少一个标签附接单元，其被配置为将标签附接到安装在双面基板的第一表面和第二表面中的一个上的多个半导体模块，并且可以包括至少一个转盘，其被配置为翻转 所述双面基板将所述第一表面和所述第二表面中的一个暴露于所述标签附接单元。

公开(公告)号：US20070172690A1

公开(公告)日：2007-07-26

申请号：US11399499

申请日：2006-04-07

Applicant: Si-suk Kim ,  Kwang-su Yu ,  Dong-chun Lee ,  Jae-hoon Choi

Inventor： Si-suk Kim ,  Kwang-su Yu ,  Dong-chun Lee ,  Jae-hoon Choi

IPC: B32B15/01

CPC classification number: H05K3/3436 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/262 ,  B23K2101/40 ,  B32B15/01 ,  B32B15/018 ,  C22C13/00 ,  C22C13/02 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16225 ,  H05K3/3463 ,  H05K3/3473 ,  H05K3/3484 ,  H05K2201/10992 ,  Y02P70/613 ,  Y10T428/12708 ,  H01L2924/00014

Abstract: A joining method, a method of mounting a semiconductor package (PKG) using the same, and a substrate-joining structure prepared thereby are provided. The joining method may comprise placing a first junction composition including tin and silver, and a second junction composition, including tin and bismuth to contact each other and forming a junction by performing a thermal treatment on the junction compositions at a temperature of at least 170° C. or higher.

Abstract translation: 提供了一种接合方法，一种安装使用其的半导体封装（PKG）的方法以及由此制备的基片接合结构。 接合方法可以包括将包含锡和银的第一接合组合物和包含锡和铋的第二接合组合物彼此接触并通过在接合组合物上在至少170°的温度下进行热处理形成接合部 C.或更高。

公开(公告)号：US07215026B2

公开(公告)日：2007-05-08

申请号：US11246303

申请日：2005-10-11

Applicant: Chang-Yong Park ,  Byung-Man Kim ,  Dong-Chun Lee ,  Yong-Hyun Kim ,  Kwang-Seop Kim ,  Dong-Woo Shin ,  Kwang-Ho Chun

Inventor： Chang-Yong Park ,  Byung-Man Kim ,  Dong-Chun Lee ,  Yong-Hyun Kim ,  Kwang-Seop Kim ,  Dong-Woo Shin ,  Kwang-Ho Chun

IPC: H01L23/12

CPC classification number: H01L23/49811 ,  H01L23/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/01079 ,  H05K3/303 ,  H05K3/3457 ,  H05K2201/09781 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.

Abstract translation: 在一个实施例中，半导体模块包括至少一个半导体芯片封装，具有功能焊盘和虚拟焊盘的板，以及将半导体芯片封装和板的功能焊盘之一电连接的至少一个焊点。 此外，在一个虚拟焊盘上形成至少一个支撑焊料凸块并且设置在半导体芯片封装的一部分之下。 例如，支撑焊料凸块可以设置在半导体芯片封装的外围区域的下方。

公开(公告)号：US06800863B2

公开(公告)日：2004-10-05

申请号：US10634756

申请日：2003-08-06

Applicant: Chung-Sam Jun ,  Sun-Yong Choi ,  Dong-Chun Lee ,  Tae-kyoung Kim ,  Doo-Guen Song ,  Seung-Won Chae

Inventor： Chung-Sam Jun ,  Sun-Yong Choi ,  Dong-Chun Lee ,  Tae-kyoung Kim ,  Doo-Guen Song ,  Seung-Won Chae

IPC: H01J37317

CPC classification number: H01J37/3045 ,  H01J37/3171

Abstract: A method for monitoring an ion implanter includes positioning a substrate behind an interceptor for intercepting a portion of an ion beam to be irradiated toward the substrate, irradiating a first ion beam toward the substrate to form a first shadow on the substrate, rotating the substrate about a central axis of the substrate, irradiating a second ion beam toward the substrate to form a second shadow on the substrate, and measuring a dosage of ions implanted into the substrate to monitor whether the rotation of the substrate has been normally performed. Preferably, a dosage of ions implanted into the substrate is calculated from a thermal wave value of the substrate and whether the rotation of the substrate has been normally performed is monitored by comparing the thermal wave value corresponding to the first shadow with a reference thermal wave value.

Abstract translation: 一种用于监测离子注入机的方法包括将基片定位在拦截器后面，用于截取要朝向基板照射的离子束的一部分，向基板照射第一离子束，以在基板上形成第一阴影， 基板的中心轴，向基板照射第二离子束，在基板上形成第二阴影，并测量注入到基板中的离子的剂量，以监测基板的旋转是否正常进行。 优选地，通过将​​对应于第一阴影的热波值与参考热波值进行比较来监测从衬底的热波值和衬底的旋转是否正常地进行的植入衬底中的离子的剂量 。

公开(公告)号：US6062799A

公开(公告)日：2000-05-16

申请号：US103518

申请日：1998-06-23

Applicant: Seong Chan Han ,  Dong Chun Lee ,  Kwang Su Yu ,  O Kyung Kwon

Inventor： Seong Chan Han ,  Dong Chun Lee ,  Kwang Su Yu ,  O Kyung Kwon

IPC: H05K7/14 ,  B65G49/05

CPC classification number: H05K7/1415

Abstract: An apparatus for automatic loading or unloading printed circuit boards (PCBs) for semiconductor modules is disclosed. The apparatus employs an elastic jig carrier into which the PCBs are loaded. The jig carrier includes movable clamps for fixing the PCBs by elastic force. A jig opener of the apparatus applies opening force, in the reverse direction of the elastic force, to the movable clamps so that the PCBs can be loaded into or unloaded from the jig carrier by a picker. The jig carrier is transferred along a conveyor belt, while the PCBs are supplied from a PCB stage such as a tray to the jig carrier. The apparatus may further comprise a gripper and a rotator. The gripper grips the upright PCBs and the rotator rotates them to be horizontal, so that the picker can pick up the horizontal PCBs. The apparatus may also comprise an aligner for exact alignment of the PCBs in the jig carrier. A method for loading or unloading the PCBs into or from the jig carrier is also disclosed in connection with the apparatus.

Abstract translation: 公开了用于半导体模块的用于自动装载或卸载印刷电路板（PCB）的装置。 该装置采用弹性夹具载体，PCB被加载到其中。 夹具载体包括用于通过弹性力固定PCB的可移动夹具。 该装置的夹具开启装置将弹性力的相反方向的打开力施加到可移动夹具上，使得PCB可以通过拾取器装载到夹具或卸载。 夹具托架沿传送带传送，而PCB从PCB台（如托盘）供应到夹具托架。 该装置还可以包括夹持器和旋转器。 夹具夹住直立PCB，旋转器将它们旋转成水平，以便拾取器可以拾取水平PCB。 该装置还可以包括用于准确对准夹具载体中的PCB的对准器。 结合该装置还公开了将PCB加载到夹具载体或从夹具载体卸载的方法。

公开(公告)号：US20130040740A1

公开(公告)日：2013-02-14

申请号：US13546981

申请日：2012-07-11

Applicant: Dong Chun Lee ,  Hang Kee Kim ,  Chang Joon Park

Inventor： Dong Chun Lee ,  Hang Kee Kim ,  Chang Joon Park

IPC: A63F9/24

CPC classification number: A63F13/358 ,  A63F2300/534

Abstract: Disclosed is a method for testing stability of a game server. The method for testing stability of a game server according to an exemplary embodiment of the present invention includes: executing, by at least one virtual user, actions or scenarios that are a list of actions; generating at least one game packets required to execute the executed actions or the actions included in the executed scenarios according to game protocols of specific game contents; and transmitting the generated game packets to a game server.

Abstract translation: 公开了一种用于测试游戏服务器的稳定性的方法。 根据本发明的示例性实施例的用于测试游戏服务器的稳定性的方法包括：由至少一个虚拟用户执行作为动作列表的动作或场景; 根据特定的游戏内容的游戏协议生成执行所执行的动作所需的至少一个游戏包或包含在所执行场景中的动作; 并将所生成的游戏分组发送到游戏服务器。

公开(公告)号：US20120244726A1

公开(公告)日：2012-09-27

申请号：US13424858

申请日：2012-03-20

Applicant: Young-Hoon Kim ,  Dong-Chun Lee ,  Jae-Hoon Choi ,  Hyung-Mo Hwang

Inventor： Young-Hoon Kim ,  Dong-Chun Lee ,  Jae-Hoon Choi ,  Hyung-Mo Hwang

IPC: H01R12/00

CPC classification number: H01R12/7005 ,  H01R12/718

Abstract: A data storage device includes a printed circuit board (PCB), a connection tab, a dummy tab and a guiding member. A memory chip is mounted on the PCB. The connection tab is formed on a first surface of the PCB to electrically connect the PCB with a first cable. The dummy tab is formed on the first surface of the PCB. The guiding member is formed on the dummy tab to guide an insertion direction of the first cable. Thus, the data storage device without a separate connector may be manufactured by a relatively simple process at a lower cost.

Abstract translation: 数据存储装置包括印刷电路板（PCB），连接片，虚拟片和引导件。 存储芯片安装在PCB上。 连接片形成在PCB的第一表面上，以将PCB与第一电缆电连接。 虚设凸片形成在PCB的第一表面上。 引导构件形成在虚拟翼片上以引导第一缆线的插入方向。 因此，没有单独的连接器的数据存储装置可以通过相对简单的过程以较低的成本制造。

公开(公告)号：US20110216516A1

公开(公告)日：2011-09-08

申请号：US13006692

申请日：2011-01-14

Applicant: Jung-hoon Kim ,  Seong-chan Han ,  Dong-chun Lee ,  Jae-hoon Choi ,  Sun-kyu Hwang

Inventor： Jung-hoon Kim ,  Seong-chan Han ,  Dong-chun Lee ,  Jae-hoon Choi ,  Sun-kyu Hwang

IPC: H05K7/00

CPC classification number: H05K7/00

Abstract: A semiconductor module, a socket for the same, and a semiconductor module/socket assembly are disclosed. The semiconductor module includes a printed circuit board including a plurality of semiconductor devices, a plurality of insulating layers and a plurality of metal layers, the plurality of insulating layers and the plurality of metal layers are alternately stacked. Exposed portions of the metal layers are exposed to the outside of the semiconductor module at a first and a second ends of the printed circuit board. The first end and the second end are at opposite ends of the printed circuit board.

Abstract translation: 公开了半导体模块，用于其的插座和半导体模块/插座组件。 半导体模块包括具有多个半导体器件，多个绝缘层和多个金属层的印刷电路板，多个绝缘层和多个金属层交替堆叠。 金属层的露出部分在印刷电路板的第一和第二端处暴露于半导体模块的外部。 第一端和第二端位于印刷电路板的相对端。

公开(公告)号：US07960655B2

公开(公告)日：2011-06-14

申请号：US12231196

申请日：2008-08-29

Applicant: Seong-Chan Han ,  Dong-Chun Lee ,  Young-Soo Lee

Inventor： Seong-Chan Han ,  Dong-Chun Lee ,  Young-Soo Lee

IPC: H05K1/00

CPC classification number: H05K1/0272 ,  H05K1/0203 ,  H05K2201/064 ,  Y10T29/49124

Abstract: A PCB can include an insulating member, a cooling member, and a circuit pattern. The cooling member can be built into the insulating member. The cooling member can have a cooling passageway through which a cooling fluid can flow. The circuit pattern can be formed on the insulating member. Thus, high heat in the circuit pattern can be rapidly dissipated by the cooling fluid flowing through the cooling passageway.

Abstract translation: PCB可以包括绝缘构件，冷却构件和电路图案。 冷却构件可以内置在绝缘构件中。 冷却部件可以具有冷却流体可以流过的冷却通道。 电路图案可以形成在绝缘构件上。 因此，流经冷却通道的冷却流体可快速消散电路图形中的高热。