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    Data storage device
    1.
    发明授权
    Data storage device 有权
    数据存储设备

    公开(公告)号：US08902596B2

    公开(公告)日：2014-12-02

    申请号：US13424858

    申请日：2012-03-20

    Applicant: Young-Hoon Kim ,  Dong-Chun Lee ,  Jae-Hoon Choi ,  Hyung-Mo Hwang

    Inventor： Young-Hoon Kim ,  Dong-Chun Lee ,  Jae-Hoon Choi ,  Hyung-Mo Hwang

    IPC: H05K1/14 ,  H01R12/70 ,  H01R12/71

    CPC classification number: H01R12/7005 ,  H01R12/718

    Abstract: A data storage device includes a printed circuit board (PCB), a connection tab, a dummy tab and a guiding member. A memory chip is mounted on the PCB. The connection tab is formed on a first surface of the PCB to electrically connect the PCB with a first cable. The dummy tab is formed on the first surface of the PCB. The guiding member is formed on the dummy tab to guide an insertion direction of the first cable. Thus, the data storage device without a separate connector may be manufactured by a relatively simple process at a lower cost.

    Abstract translation: 数据存储装置包括印刷电路板（PCB），连接片，虚拟片和引导件。 存储芯片安装在PCB上。 连接片形成在PCB的第一表面上，以将PCB与第一电缆电连接。 虚设凸片形成在PCB的第一表面上。 引导构件形成在虚拟翼片上以引导第一缆线的插入方向。 因此，没有单独的连接器的数据存储装置可以通过相对简单的过程以较低的成本制造。

    SCENARIO-BASED LOAD TESTING APPARATUS AND METHOD
    2.
    发明申请
    SCENARIO-BASED LOAD TESTING APPARATUS AND METHOD 有权
    基于场景的负载测试装置和方法

    公开(公告)号：US20120142424A1

    公开(公告)日：2012-06-07

    申请号：US13242711

    申请日：2011-09-23

    Applicant: Chang-Sik CHO ,  Dong-Chun Lee ,  Su-Young Bae ,  Hang-Kee Kim ,  Kang-Min Sohn ,  Chang-Joon Park

    Inventor： Chang-Sik CHO ,  Dong-Chun Lee ,  Su-Young Bae ,  Hang-Kee Kim ,  Kang-Min Sohn ,  Chang-Joon Park

    IPC: A63F9/24

    CPC classification number: A63F13/358 ,  A63F2300/534 ,  A63F2300/535

    Abstract: Disclosed herein is a scenario-based load testing apparatus and method. The scenario-based load testing apparatus includes a packet analysis unit, a scenario creation unit, and a load generation unit. The packet analysis unit creates a virtual map and game grammar by capturing and analyzing packets sent between a server and a client. The scenario creation unit creates a scenario of a virtual user on the virtual map. The load generation unit generates a load by creating packet data corresponding to the virtual user in compliance with the game grammar and the scenario.

    Abstract translation: 这里公开了基于情景的负载测试装置和方法。 基于情况的负载测试装置包括分组分析单元，场景创建单元和负载生成单元。 分组分析单元通过捕获和分析在服务器和客户端之间发送的分组来创建虚拟映射和游戏语法。 场景创建单元在虚拟地图上创建虚拟用户的场景。 负载生成单元通过根据游戏语法和场景创建与虚拟用户对应的分组数据来生成负载。

    Semiconductor device and method of manufacturing the same
    4.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US07906423B2

    公开(公告)日：2011-03-15

    申请号：US12650093

    申请日：2009-12-30

    Applicant: Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

    Inventor： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

    IPC: H01L21/44

    CPC classification number: H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

    Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

    Abstract translation: 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

    Semiconductor package and module printed circuit board for mounting the same
    5.
    发明授权
    Semiconductor package and module printed circuit board for mounting the same 有权
    半导体封装和模块印刷电路板用于安装

    公开(公告)号：US07675176B2

    公开(公告)日：2010-03-09

    申请号：US11968035

    申请日：2007-12-31

    Applicant: Chang-Yong Park ,  Kwang-Ho Chun ,  Dong-Chun Lee ,  Yong-Hyun Kim

    Inventor： Chang-Yong Park ,  Kwang-Ho Chun ,  Dong-Chun Lee ,  Yong-Hyun Kim

    IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC classification number: H05K1/111 ,  H01L2924/0002 ,  H05K3/3452 ,  H05K2201/0367 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09845 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

    Abstract: Provided are a semiconductor package and a module printed circuit board (PCB) for mounting the same. Each of the semiconductor package and the module PCB includes a substrate, a first-type pad structure disposed in a first region of the substrate, and a second-type pad structure disposed in a second region of the package substrate. The first-type pad includes a first conductive pad disposed on the package substrate and a first insulating layer coated on the package substrate. The first insulating layer has a first opening by which a portion of a sidewall of the first conductive pad is exposed, and partially covers the first conductive pad. The second-type pad includes a second insulating layer coated on the package substrate to have a second opening and a second conductive pad disposed on the package substrate in the second opening to have an exposed sidewall. In this structure, the semiconductor package and the module PCB can have an excellent resistance to physical and thermal stresses to enhance structural reliability.

    Abstract translation: 提供了用于安装它的半导体封装和模块印刷电路板（PCB）。 半导体封装和模块PCB中的每一个包括衬底，设置在衬底的第一区域中的第一类型衬垫结构以及设置在封装衬底的第二区域中的第二类型衬垫结构。 第一型焊盘包括设置在封装衬底上的第一导电焊盘和涂覆在封装衬底上的第一绝缘层。 第一绝缘层具有第一开口，通过该第一开口，第一导电焊盘的侧壁的一部分被暴露，并且部分覆盖第一导电焊盘。 第二类型衬垫包括涂覆在封装衬底上以具有第二开口的第二绝缘层和设置在第二开口中的封装衬底上的具有暴露侧壁的第二导电焊盘。 在这种结构中，半导体封装和模块PCB可以具有优异的耐物理和热应力，以增强结构可靠性。

    Heat spreader, semiconductor package module and memory module having the heat spreader
    6.
    发明授权
    Heat spreader, semiconductor package module and memory module having the heat spreader 有权
    散热器，半导体封装模块和具有散热器的存储模块

    公开(公告)号：US07518873B2

    公开(公告)日：2009-04-14

    申请号：US11481179

    申请日：2006-07-06

    Applicant: Chang-Yong Park ,  Hyun-Jong Oh ,  Yong-Hyun Kim ,  Dong-Woo Shin ,  Kyung-Du Kim ,  Dong-Chun Lee ,  Kwang-Ho Chun

    Inventor： Chang-Yong Park ,  Hyun-Jong Oh ,  Yong-Hyun Kim ,  Dong-Woo Shin ,  Kyung-Du Kim ,  Dong-Chun Lee ,  Kwang-Ho Chun

    IPC: H05K7/20 ,  H01L23/34 ,  F28F7/00

    CPC classification number: H01L23/4093 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A heat spreader includes a heat sinking plate and a pressure clip. The heat sinking plate radiates the heat away from a heat source. The pressure clip fixes the heat sinking plate to the heat source. The pressure clip includes a spine (pressing part), one or more ribs and hook parts. The spine is arranged on the heat sinking plate. The one or more ribs extend from the spine and contact the heat source. The hook parts extend from the spine and are supported by the heat source. The pressure clip further includes mounting parts that couple the spine to the hook parts. A bending space is formed between the spine and the heat sinking plate. The heat spreader may be attached to a printed circuit board (PCB) with, e.g., a one-touch method, so that assembling processes of the memory module may be automated.

    Abstract translation: 散热器包括散热板和压力夹。 散热板将热量从热源辐射出来。 压力夹将散热板固定在热源上。 压力夹包括一个脊柱（按压部分），一个或多个肋和钩部件。 脊柱布置在散热板上。 一个或多个肋从脊部延伸并接触热源。 钩部分从脊柱延伸并由热源支撑。 压力夹还包括将脊柱连接到钩部件的安装部件。 在脊柱和散热板之间形成弯曲空间。 散热器可以用例如一触式方式附接到印刷电路板（PCB），使得存储器模块的组装过程可以自动化。

    Method and apparatus for inspecting an edge exposure area of a wafer
    8.
    发明授权
    Method and apparatus for inspecting an edge exposure area of a wafer 失效
    用于检查晶片的边缘曝光区域的方法和装置

    公开(公告)号：US07280233B2

    公开(公告)日：2007-10-09

    申请号：US10787765

    申请日：2004-02-27

    Applicant: Koung-Su Shin ,  Sun-Yong Choi ,  Chung-Sam Jun ,  Dong-Chun Lee ,  Kwang-Jun Yoon

    Inventor： Koung-Su Shin ,  Sun-Yong Choi ,  Chung-Sam Jun ,  Dong-Chun Lee ,  Kwang-Jun Yoon

    IPC: G01B11/02 ,  G01B11/14 ,  G01B11/28 ,  G01N21/00

    CPC classification number: G01N21/9503 ,  G01N21/9501 ,  G01N21/9505

    Abstract: For an automatic defect inspection of an edge exposure area of a wafer, an optical unit supplies a light beam onto the edge portion of a wafer and a detection unit detects light reflected from the edge portion. The detection unit converts the detected light into an electrical signal to transmit the electrical signal to a processing unit. The processing unit analyzes the electrical signal to measure the reflectivity of the edge portion, compares the measured reflectivity with a reference reflectivity, and calculates the width of the edge exposure area. The processing unit compares the calculated width with a reference width to detect any defect in the edge exposure area.

    Abstract translation: 为了对晶片的边缘曝光区域进行自动缺陷检查，光学单元将光束提供到晶片的边缘部分，并且检测单元检测从边缘部分反射的光。 检测单元将检测到的光转换为电信号，以将电信号传送到处理单元。 处理单元分析电信号以测量边缘部分的反射率，将测量的反射率与参考反射率进行比较，并计算边缘曝光区域的宽度。 处理单元将计算的宽度与参考宽度进行比较，以检测边缘曝光区域中的任何缺陷。

    Printed circuit board of semiconductor package and method for mounting semiconductor package using the same
    9.
    发明申请
    Printed circuit board of semiconductor package and method for mounting semiconductor package using the same 失效
    半导体封装的印刷电路板和使用其的半导体封装的安装方法

    公开(公告)号：US20070109758A1

    公开(公告)日：2007-05-17

    申请号：US11598755

    申请日：2006-11-14

    Applicant: Seong-Chan Han ,  Dong-Chun Lee ,  Kwang-Su Yu ,  Dong-Woo Shin ,  Hyo-Jae Bang ,  Hyun-Seok Choi ,  Si-Suk Kim

    Inventor： Seong-Chan Han ,  Dong-Chun Lee ,  Kwang-Su Yu ,  Dong-Woo Shin ,  Hyo-Jae Bang ,  Hyun-Seok Choi ,  Si-Suk Kim

    IPC: H05K7/00

    CPC classification number: H05K3/3421 ,  H05K3/243 ,  H05K3/282 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10689 ,  H05K2203/046 ,  Y02P70/613

    Abstract: Example embodiments may be directed to a printed circuit board having an insulating substrate, pads disposed on the surface of the insulating substrate, a solder resist, and a solder moving portion. Leads of a semiconductor package may be mounted on the insulating substrate. The pads to which the leads of the semiconductor package are connected may be disposed on the surface of the insulating substrate. The solder resist layer may cover the insulating substrate, but may also contain openings exposing at least a portion of the pads to which the leads of the semiconductor package are connected. During the process by which each semiconductor lead is connected to a pad, the solder moving portion on the pad may allow an adhesion solder coating each of the leads of the semiconductor package to move towards a shoulder portion of the semiconductor package leads.

    Abstract translation: 示例性实施例可以涉及具有绝缘基板，设置在绝缘基板的表面上的焊盘，阻焊剂和焊料移动部分的印刷电路板。 半导体封装的引线可以安装在绝缘基板上。 连接半导体封装的引线的焊盘可以设置在绝缘基板的表面上。 阻焊层可以覆盖绝缘基板，但也可以包含露出半导体封装的引线连接到的焊盘的至少一部分的开口。 在每个半导体引线连接到焊盘的过程中，焊盘上的焊料移动部分可以允许将半导体封装的每个引线的每个引线的焊锡涂层移动到半导体封装引线的肩部。

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