公开(公告)号：US08391057B2

公开(公告)日：2013-03-05

申请号：US12533581

申请日：2009-07-31

Applicant: Min-Sang Kim ,  Ji-Myoung Lee ,  Hyun-Jun Bae ,  Dong-Won Kim ,  Jun Seo ,  Yong-Hyun Kwon ,  Weon-Wi Jang ,  Keun-Hwi Cho

Inventor： Min-Sang Kim ,  Ji-Myoung Lee ,  Hyun-Jun Bae ,  Dong-Won Kim ,  Jun Seo ,  Yong-Hyun Kwon ,  Weon-Wi Jang ,  Keun-Hwi Cho

IPC: G11C11/50 ,  H01L27/108

CPC classification number: H01L27/101 ,  H01L27/108 ,  H01L27/10882 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/10897 ,  H01L28/40 ,  H01L29/685

Abstract: A memory device includes a memory cell that includes a storage node, a first electrode, and a second electrode, the storage node stores an electrical charge, and the first electrode moves to connect to the storage node when the second electrode is energized.

Abstract translation: 存储器件包括存储单元，其包括存储节点，第一电极和第二电极，所述存储节点存储电荷，并且当所述第二电极通电时，所述第一电极移动以连接到所述存储节点。

公开(公告)号：US20080146002A1

公开(公告)日：2008-06-19

申请号：US12000496

申请日：2007-12-13

Applicant: Eun-young Kang ,  Jun Seo ,  Jae-seung Hwang ,  Sung-il Cho ,  Yong-hyun Kwon

Inventor： Eun-young Kang ,  Jun Seo ,  Jae-seung Hwang ,  Sung-il Cho ,  Yong-hyun Kwon

IPC: H01L21/76

CPC classification number: H01L21/823456 ,  H01L21/823481 ,  H01L27/105 ,  H01L27/1052

Abstract: A method of manufacturing a semiconductor device having buried gates may include forming a stacked structure of sequentially stacked first mask patterns and second mask patterns with equal widths to expose active regions and isolation regions of a semiconductor substrate. After forming reduced first mask patterns by decreasing the width only of the first mask patterns, trenches may be formed in the active regions and the isolation regions by etching the exposed portions of the semiconductor substrate using the second mask patterns as an etch mask. Then, gate insulating films may be formed on inner walls of the trenches in the active regions, and a conductive material may be buried into the trenches in the active regions and the isolation regions to form gates.

Abstract translation: 制造具有掩埋栅极的半导体器件的方法可以包括形成具有相等宽度的顺序层叠的第一掩模图案和第二掩模图案的叠层结构，以暴露半导体衬底的有源区和隔离区。 在通过仅减小第一掩模图案的宽度来形成减小的第一掩模图案之后，可以通过使用第二掩模图案作为蚀刻掩模蚀刻半导体衬底的暴露部分来在有源区域和隔离区域中形成沟槽。 然后，栅极绝缘膜可以形成在有源区域中的沟槽的内壁上，并且导电材料可以被埋入有源区域和隔离区域中的沟槽中，以形成栅极。

公开(公告)号：US20070169638A1

公开(公告)日：2007-07-26

申请号：US11723357

申请日：2007-03-19

Applicant: Jae-ryong Park ,  Yong-hyun Kwon ,  Chul Kim ,  Tae-uk Lee ,  Han-jun Sung ,  Jang-woo Lee ,  Dong-bin Lim

Inventor： Jae-ryong Park ,  Yong-hyun Kwon ,  Chul Kim ,  Tae-uk Lee ,  Han-jun Sung ,  Jang-woo Lee ,  Dong-bin Lim

IPC: A21B7/00

CPC classification number: A21B7/005

Abstract: A bread maker to perform a bread making process including a main body forming an oven compartment; upper and lower kneading drums spaced apart from each other inside the oven compartment, each kneading drum having a holding part holding opposite ends of a mixing bag filled with dough; a drum driving part rotating the kneading drums in clockwise and counterclockwise directions to knead the dough contained in the mixing bag; an auxiliary power supply to supply power when power supply of a primary power supply is cut off; a rotation sensing part sensing rotation position of the kneading drums; and a controller which receives power from the auxiliary power supply, measures a time interval from interruption to resumption of the power supply, determines whether the measured time exceeds a predetermined limit of power-interruption time, and ends the bread making process when the measured time exceeds the predetermined limit of power-interruption time. Thus, when power supply is resumed after the power-interruption time excessively passes, the bread making process is ended, and the mixing bag is easily removed.

Abstract translation: 面包机，进行面包制作，包括形成烘箱的主体; 上部和下部捏合桶在烘箱隔室内彼此间隔开，每个捏合桶具有保持部分，该保持部分保持充满面团的混合袋的相对端; 滚筒驱动部分，使捏捏滚筒沿顺时针和逆时针方向旋转，以捏合混合袋中所含的面团; 辅助电源在主电源的电源被切断时供电; 感测旋转位置的旋转感测部; 以及从辅助电源接收电力的控制器，测量从中断到恢复供电的时间间隔，确定测量时间是否超过预定的电源中断时间限制，并且当测量时间 超过电源中断时间的预定限制。 因此，在电力中断时间过剩后恢复供电的情况下，面包制作处理结束，容易除去混合袋。

公开(公告)号：US07246553B2

公开(公告)日：2007-07-24

申请号：US10804052

申请日：2004-03-19

Applicant: Jae-ryong Park ,  Yong-hyun Kwon ,  Chul Kim ,  Tae-uk Lee ,  Han-jun Sung ,  Jang-woo Lee ,  Dong-bin Lim

Inventor： Jae-ryong Park ,  Yong-hyun Kwon ,  Chul Kim ,  Tae-uk Lee ,  Han-jun Sung ,  Jang-woo Lee ,  Dong-bin Lim

IPC: A21B1/00 ,  A23L1/00

CPC classification number: A21B7/005 ,  F24C15/023

Abstract: A bread maker includes a frame, a bracket combined to a side part of the frame and formed with a combining hole, a door provided in front of the frame, and a door hinge combined to the door and formed with a combining projection rotatably combined to the combining hole of the bracket to allow the door to rotatably open and close. Accordingly, the bread maker has a simplified and a secure a door combination structure, thereby enhancing assembly efficiency and decreasing production cost. Further, the bread maker includes a bracket covered with a side cover when the door is open, thereby simplifying and improving the exterior appearance of the bread maker.

Abstract translation: 面包机包括框架，与框架的侧部结合并形成有组合孔的框架，设置在框架前方的门和组合在门上的门铰链，其形成有可旋转地组合到 支架的组合孔允许门旋转地打开和关闭。 因此，面包机具有简化和安全的门组合结构，从而提高组装效率并降低生产成本。 此外，当门打开时，面包机包括用侧盖覆盖的托架，从而简化并改善了面包机的外观。

公开(公告)号：US07227105B2

公开(公告)日：2007-06-05

申请号：US11189794

申请日：2005-07-27

Applicant: Seong-deog Jang ,  Han-seong Kang ,  Yong-hyun Kwon ,  Chul Kim ,  Han-jun Sung ,  Dae-sung Han ,  Tae-euk Lee

Inventor： Seong-deog Jang ,  Han-seong Kang ,  Yong-hyun Kwon ,  Chul Kim ,  Han-jun Sung ,  Dae-sung Han ,  Tae-euk Lee

IPC: H05B3/68

CPC classification number: A47J37/0709 ,  A47J37/0676

Abstract: A cooking apparatus which prevents a top casing thereof from being heated by heat transmitted from an electric heater. The cooking apparatus having a grill part to cook food thereon, and a electric heater to cook the food, includes a grill housing having a main casing including an opening part coupled with the grill part, providing the electric heater thereon, and a top casing coupled with an upper side circumferential area of the main casing with the center to the opening part, and the top casing including a plurality of top casing units separately provided.

Abstract translation: 一种烹饪设备，其防止顶部壳体被来自电加热器的热量加热。 具有烹饪食物的格栅部分的烹饪设备和用于烹饪食物的电加热器包括格栅壳体，其具有主壳体，该主壳体包括与格栅部分连接的开口部分，在其上提供电加热器，以及顶部壳体， 其中主壳体的上侧周向区域与中心到开口部分，并且顶部壳体包括分开设置的多个顶部壳体单元。

公开(公告)号：US20060151471A1

公开(公告)日：2006-07-13

申请号：US11298832

申请日：2005-12-12

Applicant: Seong-deog Jang ,  Han-seong Kang ,  Yong-hyun Kwon ,  Chul Kim ,  Han-Jun Sung ,  Dae-sung Han ,  Tae-uk Lee

Inventor： Seong-deog Jang ,  Han-seong Kang ,  Yong-hyun Kwon ,  Chul Kim ,  Han-Jun Sung ,  Dae-sung Han ,  Tae-uk Lee

IPC: H05B3/68

CPC classification number: A47J37/0709 ,  A47J37/067 ,  A47J37/0754

Abstract: A cooking apparatus having a cooking apparatus having a grill part to cook food thereon, and an electric heater provided in a lower side of the grill part. The cooking apparatus includes a grill reflecting member provided in a lower side of the electric heater to reflect heat generated from the electric heater to the grill part, and a cooling fan disposed at a lower side of the grill reflecting member to ventilate an outside air to the grill reflecting member. Thus, the present invention provides a cooking apparatus enhancing a cooling efficiency of a grill housing and a grill reflecting member.

Abstract translation: 一种具有烹饪装置的烹调设备，具有烹饪食物的格栅部分，以及设置在格栅部分的下侧的电加热器。 烹调器包括设置在电加热器的下侧的格栅反射部件，用于将从电加热器产生的热量反射到格栅部分;以及冷却风扇，其布置在格栅反射部件的下侧，以使外部空气通风 烤架反射构件。 因此，本发明提供了一种提高格栅外壳和格栅反射构件的冷却效率的烹饪装置。

公开(公告)号：US06935224B2

公开(公告)日：2005-08-30

申请号：US10382651

申请日：2003-03-07

Applicant: Jang-woo Lee ,  Yong-hyun Kwon ,  Dong-bin Lim

Inventor： Jang-woo Lee ,  Yong-hyun Kwon ,  Dong-bin Lim

IPC: A21C13/00 ,  A21B1/00 ,  A21B7/00 ,  A47J37/00 ,  A47J43/04 ,  A47J43/08

CPC classification number: A21B7/005

Abstract: A bread maker including a main body divided into an oven compartment and an electric component compartment; a pair of parallel kneading drums spaced apart from each other inside the oven compartment, each kneading drum having a holding part holding opposite ends of a mixing bag containing ingredients for bread, and reversing rotary direction periodically; a drum driving part in the electric component compartment rotating the kneading drums in clockwise and counterclockwise directions; a kneading drum control part allowing a user to control rotation of the kneading drums as desired; and a controller controlling the drum driving part to rotate the kneading drums according to user control of the kneading drum control part.

Abstract translation: 一种面包机，包括分为烤箱隔间和电气部件隔间的主体; 一对平行的捏合桶，其在烘箱室内彼此间隔开，每个搅拌滚筒具有保持部分，该保持部分保持包含面包成分的混合袋的相对端，并周期性地反转旋转方向; 电动部件室中的鼓驱动部分沿顺时针和逆时针方向旋转捏合鼓; 捏捏滚筒控制部件，允许使用者根据需要控制捏合滚筒的旋转; 以及控制所述滚筒驱动部分的控制器，以根据所述捏合滚筒控制部件的用户控制来旋转所述捏合滚筒。

公开(公告)号：US10224339B2

公开(公告)日：2019-03-05

申请号：US15822586

申请日：2017-11-27

Applicant: Gang Zhang ,  Hyuk Kim ,  Yong-Hyun Kwon ,  Sangwuk Park

Inventor： Gang Zhang ,  Hyuk Kim ,  Yong-Hyun Kwon ,  Sangwuk Park

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L27/092 ,  H01L23/522 ,  H01L27/11575 ,  H01L27/12 ,  H01L27/1157 ,  H01L27/118

Abstract: Provided is a semiconductor memory device. The semiconductor memory device includes a peripheral circuit gate pattern on a first substrate, an impurity region in the first substrate and spaced apart from the peripheral circuit gate pattern, a cell array structure on the peripheral circuit gate pattern, a second substrate between the peripheral circuit gate pattern and the cell array structure, and a via that is in contact with the impurity region and disposed between the first substrate and the second substrate. The via electrically connects the first and second substrates to each other.

公开(公告)号：US20180033639A1

公开(公告)日：2018-02-01

申请号：US15444597

申请日：2017-02-28

Applicant: Seung Jae JUNG ,  Sang Joon YOON ,  Yong Hyun KWON ,  Dae Hyun JANG ,  Ha Na KIM

Inventor： Seung Jae JUNG ,  Sang Joon YOON ,  Yong Hyun KWON ,  Dae Hyun JANG ,  Ha Na KIM

IPC: H01L21/311 ,  H01L21/308 ,  H01L21/3065 ,  H01L27/115 ,  H01L29/10

CPC classification number: H01L21/31144 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/3083 ,  H01L21/31116 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/1037

Abstract: A method of manufacturing a semiconductor device includes alternately stacking mold insulating layers and sacrificial layers on a substrate; forming channel holes penetrating through the mold insulating layers and the sacrificial layers and allowing recessed regions to be formed in the substrate; cleaning a surface of the recessed regions in such a manner that processes of forming a first protective layer in an upper region of the channel holes and performing an anisotropic dry etching process on the recessed regions in a lower portion of the channel holes are alternately repeated one or more times, in-situ; and forming epitaxial layers on the recessed regions of the substrate.

公开(公告)号：US20130095654A1

公开(公告)日：2013-04-18

申请号：US13600025

申请日：2012-08-30

Applicant: Yong-Hyun KWON ,  Dae-Hyun JANG ,  Seong-Soo LEE ,  Kyoung-Sub SHIN

Inventor： Yong-Hyun KWON ,  Dae-Hyun JANG ,  Seong-Soo LEE ,  Kyoung-Sub SHIN

IPC: H01L21/768

CPC classification number: H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582

Abstract: According to example embodiments of inventive concepts, a method includes forming cell patterns and insulating interlayers between the cell patterns on the substrate. An upper insulating interlayer including initial and preliminary contact holes is formed on an uppermost cell pattern. A first reflection limiting layer pattern and a first photoresist layer pattern are formed for exposing a first preliminary contact hole while covering inlet portion of the initial and preliminary contact holes. A first etching process is performed on layers under the first preliminary contact hole to expose the cell pattern at a lower position than a bottom of the first preliminary contact hole. A partial removing process of sidewall portions of the first reflection limiting layer pattern and the first photoresist layer pattern and an etching process on exposed layers through bottom portions of the preliminary contact holes are repeated for forming contact holes having different depths.

Abstract translation: 根据本发明构思的示例性实施例，一种方法包括在基板上的单元图案之间形成单元图案和绝缘夹层。 在最上面的单元图案上形成包括初始接触孔和预接触孔的上绝缘层。 形成第一反射限制层图案和第一光致抗蚀剂层图案，用于暴露第一初步接触孔，同时覆盖初始和初步接触孔的入口部分。 在第一初步接触孔下方的层上进行第一蚀刻处理，以在比第一预接触孔的底部低的位置处露出电池图案。 重复第一反射限制层图案和第一光致抗蚀剂层图案的侧壁部分的部分去除处理以及通过预接触孔的底部的暴露层上的蚀刻工艺，以形成具有不同深度的接触孔。