公开(公告)号：US6136163A

公开(公告)日：2000-10-24

申请号：US263126

申请日：1999-03-05

Applicant: Robin Cheung ,  Ashok Sinha ,  Avi Tepman ,  Dan Carl

Inventor： Robin Cheung ,  Ashok Sinha ,  Avi Tepman ,  Dan Carl

IPC: B65G49/07 ,  C25D7/12 ,  H01L21/00 ,  H01L21/02 ,  H01L21/288 ,  C25D17/00 ,  C25B9/00 ,  C25B15/00

CPC classification number: H01L21/6723 ,  C25D17/001 ,  H01L21/67098

Abstract: The present invention generally provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs rules and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, a rapid thermal anneal chamber disposed adjacent the loading station, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. One aspect of the invention provides a post electrochemical deposition treatment, such as a rapid thermal anneal treatment, for enhancing deposition results. Preferably, the electro-chemical deposition system includes a system controller adapted to control the electro-chemical deposition process and the components of the electro-chemical deposition system, including the rapid thermal anneal chamber disposed adjacent the loading station.

Abstract translation: 本发明通常提供一种电化学沉积系统，其被设计成具有可扩展以适应未来设计规则和间隙填充要求的柔性结构，并提供令人满意的吞吐量以满足其它处理系统的需求。 电化学沉积系统通常包括具有主机晶片传送机器人的主机，与主机连接设置的加载站，与加载站相邻设置的快速热退火室，与主机连接设置的一个或多个处理单元， 以及流体连接到所述一个或多个电处理单元的电解质供应。 本发明的一个方面提供了用于增强沉积结果的后电化学沉积处理，例如快速热退火处理。 优选地，电化学沉积系统包括适于控制电化学沉积过程和电化学沉积系统的部件的系统控制器，包括邻近加载站设置的快速热退火室。

公开(公告)号：US5837618A

公开(公告)日：1998-11-17

申请号：US906772

申请日：1997-08-06

Applicant: Steven Avanzino ,  Darrell Erb ,  Robin Cheung

Inventor： Steven Avanzino ,  Darrell Erb ,  Robin Cheung

IPC: H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/56

CPC classification number: H01L21/02164 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/31612 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002

Abstract: A method of forming low dielectric insulation between those pairs of conductive lines, of a level of interconnection for integrated circuits, having a gap of about 0.5 microns or less by depositing a nonconformal source with a poor step function for the insulating material, such as silane (SiH.sub.4) as the silicon (Si) source for silicon dioxide (SiO.sub.2), so as to create, in the gap, a large void whose dielectric constant is slightly greater than 1. After the formation of the void in the 0.5 microns or less gaps, the deposition of the nonconformal source material is stopped and a flowable insulating material, such as spin on glass, is coated on nonconformal insulating material to fill the remaining gaps. After etching the surfaces of the nonconformal and flowable insulating materials, another insulating layer is deposited and planarized to the desired overall thickness of the insulation. Alternatively, a thin conformal insulating layer is first deposited as a liner on the conductive lines. The resulting structure of the interconnection level comprises a layer of insulation between and on the conductive lines with the dielectric constant of the insulation between the pairs of conductive lines with gap of 0.5 or less being, in combination with the void, at least about 3 or lower, and substantially all of the remaining gaps are filled with the flowable insulating material and are void free with a composite dielectric constant of greater than about 3.5.

Abstract translation: 在这些导电线对之间形成低介电绝缘的方法，该集成电路的互连级别具有约0.5微米或更小的间隙，通过沉积绝缘材料的差的步进功能的非共形源，例如硅烷 （SiH4）作为二氧化硅（SiO 2）的硅（Si）源，以在间隙中产生介电常数略大于1的大空隙。在0.5微米或更小的空隙形成之后 间隙，停止非共形源材料的沉积，并且将可流动的绝缘材料（例如玻璃上的旋涂）涂覆在非共形绝缘材料上以填充剩余的间隙。 在蚀刻非共形和可流动的绝缘材料的表面之后，另外的绝缘层被沉积并平坦化到所需绝缘体的总厚度。 或者，首先在导电线上沉积薄的共形绝缘层作为衬垫。 所形成的互连级别的结构包括在导电线之间和之间的导电层之间的绝缘层，其中间隔为0.5或更小的导电线对之间的绝缘体的介电常数与空隙结合为至少约3或 较低且基本上所有剩余的间隙都填充有可流动绝缘材料，并且无复合介电常数大于约3.5。

公开(公告)号：US20120315503A1

公开(公告)日：2012-12-13

申请号：US13587774

申请日：2012-08-16

Applicant: Robin Cheung ,  Wen Zhong Kong

Inventor： Robin Cheung ,  Wen Zhong Kong

IPC: B05D1/18 ,  B01J23/42 ,  B05D1/02 ,  B32B15/01

CPC classification number: C23C18/54 ,  B32B15/018 ,  Y10T428/12875

Abstract: A platinum plating solution for immersion plating a continuous film of platinum on a metal structure. The immersion platinum plating solution is free of a reducing agent. The plating process does not require electricity (e.g., electrical current) and does not require electrodes (e.g., anode and/or cathode). The solution includes a platinum source and a complexing agent including Oxalic Acid. The solution enables immersion plating of platinum onto a metal surface, a metal substrate, or a structure of which at least a portion is a metal. The resulting platinum plating comprises a continuous thin film layer of platinum having a thickness not exceeding 300 Å. The solution can be used for plating articles including but not limited to jewelry, medical devices, electronic structures, microelectronics structures, MEMS structures, nano-sized or smaller structures, structures used for chemical and/or catalytic reactions (e.g., catalytic converters), and irregularly shaped metal surfaces.

Abstract translation: 一种用于在金属结构上浸镀铂金的铂电镀溶液。 浸渍铂电镀溶液不含还原剂。 电镀工艺不需要电（例如电流），并且不需要电极（例如阳极和/或阴极）。 该溶液包括铂源和包括草酸的络合剂。 该解决方案能够将铂浸入金属表面，金属基材或其至少一部分是金属的结构。 所得的铂镀层包括厚度不超过300埃的连续的铂薄膜层。 该溶液可用于包括但不限于珠宝，医疗装置，电子结构，微电子结构，MEMS结构，纳米尺寸或更小结构，用于化学和/或催化反应的结构（例如，催化转化器））的电镀制品， 和不规则形状的金属表面。

公开(公告)号：US20110229734A1

公开(公告)日：2011-09-22

申请号：US12661678

申请日：2010-03-22

Applicant: Robin Cheung ,  Wen Zhong Kong

Inventor： Robin Cheung ,  Wen Zhong Kong

IPC: B32B15/01 ,  B05D1/18 ,  C23C18/42

CPC classification number: C23C18/54 ,  B32B15/018 ,  Y10T428/12875

Abstract: A platinum plating solution for immersion plating a continuous film of platinum on a metal structure. The immersion platinum plating solution is free of a reducing agent. The plating process does not require electricity (e.g., electrical current) and does not require electrodes (e.g., anode and/or cathode). The solution includes a platinum source and a complexing agent including Oxalic Acid. The solution enables immersion plating of platinum onto a metal surface, a metal substrate, or a structure of which at least a portion is a metal. The resulting platinum plating comprises a continuous thin film layer of platinum having a thickness not exceeding 300 Å. The solution can be used for plating articles including but not limited to jewelry, medical devices, electronic structures, microelectronics structures, MEMS structures, nano-sized or smaller structures, structures used for chemical and/or catalytic reactions (e.g., catalytic converters), and irregularly shaped metal surfaces.

Abstract translation: 一种用于在金属结构上浸镀铂金的铂电镀溶液。 浸渍铂电镀溶液不含还原剂。 电镀工艺不需要电（例如电流），并且不需要电极（例如阳极和/或阴极）。 该溶液包括铂源和包括草酸的络合剂。 该解决方案能够将铂浸入金属表面，金属基材或其至少一部分是金属的结构。 所得的铂镀层包括厚度不超过300埃的连续的铂薄膜层。 该溶液可用于包括但不限于珠宝，医疗装置，电子结构，微电子结构，MEMS结构，纳米尺寸或更小结构，用于化学和/或催化反应的结构（例如，催化转化器））的电镀制品， 和不规则形状的金属表面。

公开(公告)号：US06842659B2

公开(公告)日：2005-01-11

申请号：US09939073

申请日：2001-08-24

Applicant: Suketu Parikh ,  Robin Cheung

Inventor： Suketu Parikh ,  Robin Cheung

IPC: G05B19/418 ,  H01L21/66 ,  G06F19/00

CPC classification number: H01L22/20 ,  G05B19/4187 ,  G05B19/41875 ,  G05B2219/32179 ,  G05B2219/32182 ,  G05B2219/45031 ,  Y02P90/14 ,  Y02P90/205 ,  Y02P90/22

Abstract: A method and apparatus for performing intra-tool monitoring and control within a multi-step processing system. The method monitors the processing of a workpiece as the workpiece is processed by independently operating processing tools and produces control parameters for the various independently operating processing tools to optimize the processing of the workpiece. More specifically, the apparatus provides a metrology station located between each of a plurality of semiconductor wafer processing tools such that measurements can be made on wafers as they are passed from one tool to another providing intra tool monitoring. The data collected by the metrology station is coupled to a metrology data analyzer, which determines whether any of the plurality of wafer processing tools should be adjusted to improve the processing of the overall wafer. As such, the output of the metrology data analyzer provides control parameters to process controllers connected controllers connected to each of the tools within the semiconductor wafer processing system. Consequently, the operation of the metrology stations and the metrology data analyzer provides both feed forward and feed back data to control the tools based upon certain information that is gathered within the metrology station.

Abstract translation: 一种用于在多步骤处理系统内执行工具内监控和控制的方法和装置。 该方法通过独立操作处理工具处理工件来监视工件的处理，并为各种独立操作的加工工具生成控制参数，以优化工件的加工。 更具体地，该设备提供位于多个半导体晶片处理工具中的每一个之间的计量站，使得当它们从一个工具传递到另一个工具提供内部工具监视时，可以对晶片进行测量。 由计量站收集的数据耦合到度量数据分析器，该测量数据分析器确定是否应该调整多个晶片处理工具中的任何一个以改善整个晶片的处理。 因此，测量数据分析仪的输出提供控制参数以处理连接到半导体晶片处理系统内的每个工具的控制器连接的控制器。 因此，计量站和度量数据分析仪的操作提供前馈和反馈数据，以基于在计量站内收集的某些信息来控制工具。

公开(公告)号：US06818066B2

公开(公告)日：2004-11-16

申请号：US09850841

申请日：2001-05-07

Applicant: Robin Cheung

Inventor： Robin Cheung

IPC: C23C880

CPC classification number: H01L21/76849 ,  H01L21/288 ,  Y10S134/902

Abstract: A system and method for treating a substrate by integrating the annealing of a metal-containing layer on a substrate as part of a chemical mechanical polishing process. In one embodiment, a system for treating a substrate generally includes an annealing station incorporated into a chemical mechanical polishing processing system that includes a deposition station utilized to form a metal-containing layer on the substrate.

Abstract translation: 作为化学机械抛光工艺的一部分，通过将基板上的含金属层的退火结合在一起来处理基板的系统和方法。 在一个实施例中，用于处理衬底的系统通常包括结合到化学机械抛光处理系统中的退火站，其包括用于在衬底上形成含金属层的沉积站。

公开(公告)号：US06477787B2

公开(公告)日：2002-11-12

申请号：US10073762

申请日：2002-02-11

Applicant: Ratson Morad ,  Ho Seon Shin ,  Robin Cheung ,  Igor Kogan

Inventor： Ratson Morad ,  Ho Seon Shin ,  Robin Cheung ,  Igor Kogan

IPC: F26B700

CPC classification number: H01L21/67109 ,  H01L21/67115 ,  H01L21/67748

Abstract: A method and apparatus for heating and cooling a substrate are provided. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.

公开(公告)号：US06400030B1

公开(公告)日：2002-06-04

申请号：US09583817

申请日：2000-05-30

Applicant: Fei Wang ,  Robin Cheung ,  Mark S. Chang ,  Richard J. Huang ,  Angela T. Hui

Inventor： Fei Wang ,  Robin Cheung ,  Mark S. Chang ,  Richard J. Huang ,  Angela T. Hui

IPC: H01L2348

CPC classification number: H01L21/76897 ,  H01L21/76802

Abstract: An integrated circuit having semiconductor devices is connected by a first conductive channel damascened into a first oxide layer above the devices. A stop nitride layer, a via oxide layer, a via nitride layer, and a via resist are sequentially deposited on the first channel and the first oxide layer. The via resist is photolithographically developed with rectangular cross-section vias greater than the width of the channels and the via nitride layer is etched to the rectangular cross-section. A second channel oxide layer and a second channel resist are sequentially deposited on the via nitride layer and the exposed via oxide layer. The second channel resist is photolithographically developed with the second channels and an anisotropic oxide etch etches the second channels and rectangular box vias down to the stop nitride layer. The stop nitride layer is nitride etched in the rectangular via configuration and conductive material is damascened into the second channels and the via to be chemical-mechanical polished to form the interconnections between two levels of channels.

Abstract translation: 具有半导体器件的集成电路通过镶嵌在器件上方的第一氧化物层中的第一导电沟道连接。 在第一沟道和第一氧化物层上顺序地沉积有终止氮化物层，通孔氧化物层，通路氮化物层和通路保护层。 通孔抗蚀剂被光刻显影，具有大于通道宽度的矩形横截面通孔，并且通孔氮化物层被蚀刻到矩形横截面。 第二沟道氧化物层和第二沟道抗蚀剂依次沉积在通孔氮化物层和暴露的通孔氧化物层上。 第二通道抗蚀剂用第二通道光刻显影，并且各向异性氧化物蚀刻将第二通道和矩形盒通孔蚀刻到固定氮化物层。 阻挡氮化物层以矩形通孔结构进行氮化蚀刻，并且导电材料被镶嵌到第二通道中，并且通孔被化学机械抛光以形成两个通道级之间的互连。

公开(公告)号：US06357143B2

公开(公告)日：2002-03-19

申请号：US09909915

申请日：2001-07-20

Applicant: Ratson Morad ,  Ho Seon Shin ,  Robin Cheung ,  Igor Kogan

Inventor： Ratson Morad ,  Ho Seon Shin ,  Robin Cheung ,  Igor Kogan

IPC: F26B700

CPC classification number: H01L21/67109 ,  H01L21/67115 ,  H01L21/67748

Abstract: A method and apparatus for heating and cooling a substrate. A chamber is provided that comprises a heating mechanism adapted to heat a substrate positioned proximate the heating mechanism, a cooling mechanism spaced from the heating mechanism and adapted to cool a substrate positioned proximate the cooling mechanism, and a transfer mechanism adapted to transfer a substrate between the position proximate the heating mechanism and the position proximate the cooling mechanism.

Abstract translation: 一种用于加热和冷却基底的方法和装置。 提供了一种室，其包括适于加热位于加热机构附近的基板的加热机构，与加热机构间隔开并适于冷却位于冷却机构附近的基板的冷却机构，以及适于将基板 靠近加热机构的位置和靠近冷却机构的位置。

公开(公告)号：US06245670B1

公开(公告)日：2001-06-12

申请号：US09253480

申请日：1999-02-19

Applicant: Robin Cheung ,  Sergey Lopatin

Inventor： Robin Cheung ,  Sergey Lopatin

IPC: H01L214763

CPC classification number: H01L21/76873 ,  H01L21/76843 ,  H01L21/76877

Abstract: A method for effectively filling a dual damascene opening having a via hole and a trench that are contiguous openings uses a two step deposition process. The method includes a step of filling the via hole by electroless deposition of a first conductive material into the via hole. A second conductive material is at a bottom wall of the via hole, and the second conductive material at the bottom wall of the via hole acts as an autocatalytic surface during the electroless deposition of the first conductive material within the via hole. The method also includes the step of depositing a seed layer of a third conductive material to cover walls of the trench and includes the step of filling the trench by electroplating deposition of the third conductive material from the seed layer into the trench. The present invention may be used to particular advantage for small geometry integrated circuits when the conductive material filling the via hole and the trench is copper. By first filling the via hole using electroless deposition, void formation and poor via contact is prevented. In addition, the more widely available and easily manufacturable electroplating deposition process is still used for filling the trench.

Abstract translation: 一种用于有效地填充具有通孔和作为连续开口的沟槽的双镶嵌开口的方法使用两步沉积工艺。 该方法包括通过将第一导电材料无电沉积到通孔中来填充通孔的步骤。 第二导电材料位于通孔的底壁处，并且在第一导电材料在通孔内的无电沉积期间，通孔的底壁处的第二导电材料用作自催化表面。 该方法还包括沉积第三导电材料的种子层以覆盖沟槽的壁的步骤，并且包括通过电镀将第三导电材料从晶种层沉积到沟槽中来填充沟槽的步骤。 当填充通孔和沟槽的导电材料是铜时，本发明可以用于小几何形状集成电路的特别有利。 通过首先使用无电沉积填充通孔，防止空隙形成和差的通孔接触。 此外，仍然使用更广泛可用且容易制造的电镀沉积工艺来填充沟槽。