公开(公告)号：US07217646B2

公开(公告)日：2007-05-15

申请号：US11153510

申请日：2005-06-15

申请人： Harry Hedler ,  Thorsten Meyer

发明人： Harry Hedler ,  Thorsten Meyer

IPC分类号： H01L21/44

CPC分类号： H01L24/29 ,  H01L23/3157 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/13021 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/73203 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83194 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Method for connecting an integrated circuit to a substrate and corresponding circuit arrangementThe present invention provides a method for connecting an integrated circuit (C1), in particular a chip or a wafer or a hybrid, to a substrate (C2), which has the following steps: provision of a first electrical contact structure (KF1, BP, LB; KF1, BP′) on a first main area (HF1) of the integrated circuit (C1); provision of a corresponding second electrical contact structure (KF2) on a second main area (HF2) of the substrate (C2); at least one of the contact structures, the first electrical contact structure (KF1, BP, LB; KF1, BP′) or the second electrical contact structure (KF2), being elastic; placement of the first electrical contact structure (KF1, BP, LB; KF1, BP′) onto the corresponding second electrical contact structure (KF2), so that both are in electrical contact and under mechanical compression pressure (P); and connection of a region of the main area (HF1) surrounding the first electrical contact structure (KF1, BP, LB; KF1, BP′) to a corresponding region surrounding the second electrical contact structure (KF2) of the second main area (HF2) by an adhesive layer (KS), so that the first electrical contact structure (KF1, BP, LB; KF1, BP′) and/or the second electrical contact structure (KF2) are compressed in the connected state. The invention likewise provides a corresponding circuit arrangement.

摘要翻译： 用于将集成电路连接到基板的方法和相应的电路装置本发明提供了一种用于将集成电路（C 1），特别是芯片或晶片或混合物连接到基板（C 2）的方法，该基板具有 以下步骤：在集成电路（C1）的第一主区域（HF 1）上提供第一电接触结构（KF 1，BP，LB; KF 1，BP'）; 在基板（C 2）的第二主区域（HF 2）上设置相应的第二电接触结构（KF 2）; 接触结构，第一电接触结构（KF 1，BP，LB; KF 1，BP'）或第二电接触结构（KF 2）中的至少一个是弹性的; 将第一电接触结构（KF 1，BP，LB; KF 1，BP'）放置在相应的第二电接触结构（KF 2）上，使得两者都处于电接触和机械压缩压力（P）下; 以及围绕第一电接触结构（KF 1，BP，LB; KF 1，BP'）的主区域（HF 1）的区域与围绕第二电接触结构（KF 1，BP'）的第二电接触结构（KF 2） 主要区域（HF 2），使得第一电接触结构（KF 1，BP，LB; KF 1，BP'）和/或第二电接触结构（KF 2）被压缩在 连接状态。 本发明同样提供了相应的电路装置。

公开(公告)号：US20050285152A1

公开(公告)日：2005-12-29

申请号：US11153510

申请日：2005-06-15

申请人： Harry Hedler ,  Thorsten Meyer

发明人： Harry Hedler ,  Thorsten Meyer

IPC分类号： H01L21/60 ,  H01L21/98 ,  H01L23/31 ,  H01L23/485 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16 ,  H01L27/148

CPC分类号： H01L24/29 ,  H01L23/3157 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/13021 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/73203 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83194 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Method for connecting an integrated circuit to a substrate and corresponding circuit arrangement The present invention provides a method for connecting an integrated circuit (C1), in particular a chip or a wafer or a hybrid, to a substrate (C2), which has the following steps: provision of a first electrical contact structure (KF1, BP, LB; KF1, BP′) on a first main area (HF1) of the integrated circuit (C1); provision of a corresponding second electrical contact structure (KF2) on a second main area (HF2) of the substrate (C2); at least one of the contact structures, the first electrical contact structure (KF1, BP, LB; KF1, BP′) or the second electrical contact structure (KF2), being elastic; placement of the first electrical contact structure (KF1, BP, LB; KF1, BP′) onto the corresponding second electrical contact structure (KF2) , so that both are in electrical contact and under mechanical compression pressure (P); and connection of a region of the main area (HF1) surrounding the first electrical contact structure (KF1, BP, LB; KF1, BP′) to a corresponding region surrounding the second electrical contact structure (KF2) of the second main area (HF2) by an adhesive layer (KS), so that the first electrical contact structure (KF1, BP, LB; KF1, BP′) and/or the second electrical contact structure (KF2) are compressed in the connected state. The invention likewise provides a corresponding circuit arrangement.

摘要翻译： 用于将集成电路连接到基板的方法和相应的电路装置本发明提供了一种用于将集成电路（C 1），特别是芯片或晶片或混合物连接到基板（C 2）的方法，该基板具有 以下步骤：在集成电路（C1）的第一主区域（HF 1）上提供第一电接触结构（KF 1，BP，LB; KF 1，BP'）; 在基板（C 2）的第二主区域（HF 2）上设置相应的第二电接触结构（KF 2）; 接触结构，第一电接触结构（KF 1，BP，LB; KF 1，BP'）或第二电接触结构（KF 2）中的至少一个是弹性的; 将第一电接触结构（KF 1，BP，LB; KF 1，BP'）放置在相应的第二电接触结构（KF 2）上，使得两者都处于电接触和机械压缩压力（P）下; 以及围绕第一电接触结构（KF 1，BP，LB; KF 1，BP'）的主区域（HF 1）的区域与围绕第二电接触结构（KF 1，BP'）的第二电接触结构（KF 2） 主要区域（HF 2），使得第一电接触结构（KF 1，BP，LB; KF 1，BP'）和/或第二电接触结构（KF 2）被压缩在 连接状态。 本发明同样提供了相应的电路装置。

公开(公告)号：US20050014394A1

公开(公告)日：2005-01-20

申请号：US10855891

申请日：2004-05-28

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Peter Weitz

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer ,  Peter Weitz

IPC分类号： G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R31/28 ,  H01R29/00

CPC分类号： G01R1/0416 ,  G01R1/06711 ,  G01R1/07314 ,  G01R1/0735 ,  G01R31/2863

摘要： A contact-connection device for electronic circuit units includes an adapter board, at least one elastic element arranged on the adapter board, conductor tracks arranged on the at least one elastic element and the adapter board, conductor track connecting elements deposited on the adapter board and electrically connected to the conductor tracks, and contact-connection elements deposited on the at least one elastic element and electrically connected to the conductor tracks, the contact-connection elements contact-connecting circuit unit connecting elements of the circuit units in an elastically pressing-on fashion.

摘要翻译： 用于电子电路单元的接触连接装置包括适配器板，布置在适配器板上的至少一个弹性元件，布置在至少一个弹性元件和适配器板上的导体轨道，沉积在适配器板上的导体轨道连接元件和 电连接到导体轨道，以及沉积在至少一个弹性元件上并电连接到导体轨道的接触连接元件，接触连接元件接触连接电路单元以弹性压紧方式连接电路单元的元件 时尚。

公开(公告)号：US20050014309A1

公开(公告)日：2005-01-20

申请号：US10721745

申请日：2003-11-26

申请人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

发明人： Harry Hedler ,  Roland Irsigler ,  Thorsten Meyer

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/19 ,  H01L23/3114 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19043 ,  H01L2224/82

摘要： The present invention provides a method for producing an integrated circuit with a rewiring device. In the method, there is provision of a carrier device with defined cutouts, application of at least one integrated circuit upside down to the carrier device such that the defined cutouts of the carrier device are located above at least one connection device of the integrated circuit application of an insulation device to that side of the carrier device which is not covered by the integrated circuit, omitting the at least one connection device in the cutout); application of the patterned rewiring device to the insulation device; application of a patterned solder resist device to the patterned rewiring device; and patterned application of solder balls on sections of the rewiring device which are not covered by the patterned solder resist device. The present invention likewise provides such an apparatus.

摘要翻译： 本发明提供一种利用重新布线装置制造集成电路的方法。 在该方法中，提供具有限定切口的载体装置，将至少一个集成电路应用到载体装置上，使得载体装置的限定切口位于集成电路应用的至少一个连接装置上方 绝缘装置到所述载体装置的所述未被所述集成电路覆盖的一侧，省略所述切口中的所述至少一个连接装置）; 将图案化重新布线装置应用于绝缘装置; 将图案化阻焊装置应用于图案化的重新布线装置; 以及在未被图案化阻焊装置覆盖的重新布线装置的部分上的焊球的图案化应用。 本发明同样提供了这种装置。

公开(公告)号：US06807064B2

公开(公告)日：2004-10-19

申请号：US10236895

申请日：2002-09-06

申请人： Harry Hedler ,  Thorsten Meyer

发明人： Harry Hedler ,  Thorsten Meyer

IPC分类号： H05K710

CPC分类号： H01L24/81 ,  H01L23/3114 ,  H01L24/10 ,  H01L24/13 ,  H01L24/72 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/10165 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/8014 ,  H01L2224/81136 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/19043 ,  H01L2924/00

摘要： An electronic component having at least one semiconductor chip, a rewiring layer connected to the semiconductor chip, and a printed circuit board associated with the rewiring layer. The rewiring layer is provided with flexible contacts that correspond with contact faces of the printed circuit board, and the rewiring layer is solidly connected to the printed circuit board via a flat intermediate layer. A method for producing the electronic component is described.

摘要翻译： 具有至少一个半导体芯片的电子部件，连接到该半导体芯片的重新布线层以及与重新布线层相关联的印刷电路板。 再布线层设置有与印刷电路板的接触面对应的柔性触点，并且重新布线层经由平坦的中间层牢固地连接到印刷电路板。 对电子部件的制造方法进行说明。

公开(公告)号：US08012807B2

公开(公告)日：2011-09-06

申请号：US11776976

申请日：2007-07-12

申请人： Thorsten Meyer ,  Harry Hedler ,  Markus Brunnbauer

发明人： Thorsten Meyer ,  Harry Hedler ,  Markus Brunnbauer

IPC分类号： H01L21/56 ,  H01L23/48

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/056 ,  H01L2224/12105 ,  H01L2224/13099 ,  H01L2224/92 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2224/96 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.

摘要翻译： 公开了一种生产芯片封装的方法。 在一个实施例中，提供多个芯片。 每个芯片都有第一个焊盘。 第二连接焊盘被施加在晶片上，其中每个第二焊盘电连接到第一焊盘。

公开(公告)号：US20110068485A1

公开(公告)日：2011-03-24

申请号：US12955484

申请日：2010-11-29

申请人： Thorsten Meyer ,  Harry Hedler ,  Markus Brunnbauer

发明人： Thorsten Meyer ,  Harry Hedler ,  Markus Brunnbauer

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L21/568 ,  H01L21/68 ,  H01L21/6835 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/82001 ,  H01L2224/92 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3511 ,  H01L2224/96 ,  H01L2224/82 ,  H01L2924/00

摘要： A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.

摘要翻译： 公开了一种组件的制造方法。 该组件包括集成电路，壳体，与集成电路重叠的布线装置和壳体，以及与布线装置连通的一个或多个外部接触装置。

公开(公告)号：US07911068B2

公开(公告)日：2011-03-22

申请号：US11486443

申请日：2006-07-13

申请人： Thorsten Meyer ,  Harry Hedler ,  Markus Brunnbauer

发明人： Thorsten Meyer ,  Harry Hedler ,  Markus Brunnbauer

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L21/568 ,  H01L21/68 ,  H01L21/6835 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/82001 ,  H01L2224/92 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3511 ,  H01L2224/96 ,  H01L2224/82 ,  H01L2924/00

摘要： A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.

摘要翻译： 公开了一种组件的制造方法。 该组件包括集成电路，壳体，与集成电路重叠的布线装置和壳体，以及与布线装置连通的一个或多个外部接触装置。

公开(公告)号：US07663248B2

公开(公告)日：2010-02-16

申请号：US11251602

申请日：2005-10-14

申请人： Harry Hedler ,  Thorsten Meyer

发明人： Harry Hedler ,  Thorsten Meyer

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/19 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A flip-chip component includes a chip with pads located on the chip and a chip frame, wherein the chip frame is arranged around the chip and is attached to the chip so that the active surface of the chip is substantially planar with a surface of the chip frame. A redistribution layer is attached to the chip and chip frame, and interconnections mechanically connect the redistribution layer and a board. Aspects of the invention improve the reliability of the flip-chip package by reducing shear stresses in the interconnections between the package and a board during changing temperatures. This is achieved by carefully selecting the material of the chip frame and designing the placement of the interconnections so that thermal expansion of the package matches that of the board during changing temperatures.

摘要翻译： 倒装芯片部件包括具有位于芯片上的焊盘的芯片和芯片框架，其中芯片框架布置在芯片周围并且附接到芯片，使得芯片的有效表面基本上是平面的， 芯片框架。 再分配层连接到芯片和芯片框架，并且互连机械地连接再分配层和板。 本发明的各方面通过在改变温度期间减小封装和板之间的互连中的剪切应力来提高倒装芯片封装的可靠性。 这通过仔细选择芯片框架的材料并设计互连的布局来实现，使得封装的热膨胀在变化的温度期间与板的热膨胀匹配。

公开(公告)号：US20090045512A1

公开(公告)日：2009-02-19

申请号：US11839440

申请日：2007-08-15

申请人： Harry Hedler ,  Thorsten Meyer

发明人： Harry Hedler ,  Thorsten Meyer

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/17 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： A carrier substrate comprising a through contact connecting a first contact field on a top face of the carrier substrate to a second contact field on a bottom face of the carrier substrate and a substrate material being provided around the through contact.

摘要翻译： 一种载体衬底，包括将载体衬底的顶面上的第一接触场与载体衬底的底面上的第二接触场连接的穿通接头，以及围绕穿通接触点设置的衬底材料。