Processes for forming backplanes for electro-optic displays
    41.
    发明授权
    Processes for forming backplanes for electro-optic displays 有权
    用于形成电光显示器背板的工艺

    公开(公告)号:US07785988B2

    公开(公告)日:2010-08-31

    申请号:US12243411

    申请日:2008-10-01

    IPC分类号: H01L21/30

    摘要: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译: 通过将基板固定到刚性载体上,形成非线性元件,然后将柔性基板与载体分离,在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中,通过形成栅电极,沉积介电层,半导体层和导电层,在绝缘基板上形成晶体管,图案化导电层以形成源极,漏极和像素电极,覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻,蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺,并且使用 第二导电层和介电层作为蚀刻掩模。 最后,本发明提供一种驱动脉冲敏感电光显示器的方法。

    PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS
    43.
    发明申请
    PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS 有权
    用于形成电光显示器的背板的方法

    公开(公告)号:US20090029527A1

    公开(公告)日:2009-01-29

    申请号:US12243411

    申请日:2008-10-01

    IPC分类号: H01L21/64

    摘要: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

    摘要翻译: 通过将基板固定到刚性载体上,形成非线性元件,然后将柔性基板与载体分离,在柔性基板上形成非线性元件。 该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。 在第二种方法中,通过形成栅电极,沉积介电层,半导体层和导电层,在绝缘基板上形成晶体管,图案化导电层以形成源极,漏极和像素电极,覆盖该沟道区 具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻,蚀刻基本上延伸通过相邻晶体管之间的半导体层。 本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺,并且使用 第二导电层和介电层作为蚀刻掩模。 最后,本发明提供一种驱动脉冲敏感电光显示器的方法。

    LASER TRANSFER ARTICLES AND METHOD OF MAKING
    44.
    发明申请
    LASER TRANSFER ARTICLES AND METHOD OF MAKING 审中-公开
    激光转印制品及其制备方法

    公开(公告)号:US20080318030A1

    公开(公告)日:2008-12-25

    申请号:US12205267

    申请日:2008-09-05

    IPC分类号: B32B7/12

    摘要: The present invention is directed to methods for transferring pre-formed electronic devices, such as transistors, resistors, capacitors, diodes, semiconductors, inductors, conductors, and dielectrics, and segments of materials, such as magnetic materials and crystalline materials onto a variety of receiving substrates using energetic beam transfer methods. Also provided is a consumable intermediate comprising a transfer substrate and a transfer material coated thereon, wherein the transfer material may be comprised of pre-formed electronic devices or magnetic materials and crystalline materials that may be transferred to a variety of receiving substrates. Aspects of the present invention may also be used to form multi-device electronic components such as sensor devices, electro-optical devices, communications devices, transmit-receive modules, and phased arrays using the consumable intermediates and transfer methods described herein.

    摘要翻译: 本发明涉及用于将诸如晶体管,电阻器,电容器,二极管,半导体,电感器,导体和电介质的预成型电子器件和诸如磁性材料和结晶材料的材料段转移到各种 使用能量束传递方法接收衬底。 还提供了包括转印基材和涂覆在其上的转印材料的消耗性中间体,其中转印材料可以由预先形成的电子器件或磁性材料以及可以转移到各种接收基底的结晶材料构成。 本发明的各方面也可用于使用本文描述的可消耗的中间体和转移方法来形成诸如传感器装置,电光装置,通信装置,发射 - 接收模块和相控阵列的多装置电子部件。

    Process for fabricating thin film transistors
    45.
    发明授权
    Process for fabricating thin film transistors 有权
    制造薄膜晶体管的工艺

    公开(公告)号:US06825068B2

    公开(公告)日:2004-11-30

    申请号:US09836884

    申请日:2001-04-17

    IPC分类号: H01L2100

    CPC分类号: H01L29/66765 H01L29/78603

    摘要: Transistors are formed by depositing at least one layer of semiconductor material on a substrate comprising a polyphenylene polyimide. The substrate permits the use of processing temperatures in excess of 300° C. during the processes used to form the transistors, thus allowing the formation of high quality silicon semiconductor layers. The substrate also has a low coefficient of thermal expansion, which closely matches that of silicon, thus reducing any tendency for a silicon layer to crack or delaminate.

    摘要翻译: 晶体管通过在包含聚亚苯基聚酰亚胺的衬底上沉积至少一层半导体材料形成。 在用于形成晶体管的工艺期间,衬底允许使用超过300℃的处理温度,从而允许形成高质量的硅半导体层。 该基板也具有低的热膨胀系数,其与硅的热膨胀系数非常接近,从而减少硅层破裂或分层的任何趋势。

    Addressing methods for displays having zero time-average field
    46.
    发明授权
    Addressing methods for displays having zero time-average field 有权
    具有零时间平均场的显示器的寻址方法

    公开(公告)号:US06504524B1

    公开(公告)日:2003-01-07

    申请号:US09520743

    申请日:2000-03-08

    IPC分类号: G09G334

    摘要: Novel addressing schemes for controlling electronically addressable displays include the use of addressing signals with additional signals having opposite polarity and equal integrated signal strength and addressing schemes that minimize the number of state changes that a display element undergoes. In one embodiment, pre-pulses are employed to apply a pre-stress to an display element that is equal and opposite to the electrical stress applied in addressing the element. In another embodiment, the addressing signal is followed by a post-stressing pulse. Methods for minimizing the number of display elements that must change state to change the image displayed include the determination of a set of elements that must be deactivated and a set of elements that must be activated to change the image depicted by a display.

    摘要翻译: 用于控制电子可寻址显示器的新型寻址方案包括使用具有相反极性和相等的集成信号强度的附加信号的寻址信号以及使显示元件经历的状态变化的数量最小化的寻址方案。 在一个实施例中,采用预脉冲来对显示元件施加预应力,所述显示元件与在寻址元件时施加的电应力相等和相反。 在另一个实施例中,寻址信号之后是后应力脉冲。 用于最小化必须改变状态以改变显示的图像的显示元素的数量的方法包括必须被去激活的一组元素的确定以及必须被激活以改变由显示器描绘的图像的一组元素。

    Device including quantum dots and method for making same
    49.
    发明授权
    Device including quantum dots and method for making same 有权
    包括量子点的装置及其制造方法

    公开(公告)号:US09520573B2

    公开(公告)日:2016-12-13

    申请号:US13422683

    申请日:2012-03-16

    摘要: A device comprises an anode; a cathode; a layer therebetween comprising quantum dots; and a first layer comprising a material capable of transporting and injecting electrons in, or forming, contact with the cathode, the material comprising nanoparticles of an inorganic semiconductor material. In one embodiment of the device, quantum dots comprise a core comprising a first semiconductor material that confines holes better than electrons in the core and an outer shell comprising a second semiconductor material that is permeable to electrons. In another embodiment of the device, the nanoparticles comprise n-doped inorganic semiconductor material, and a second layer comprising a material capable of transporting electrons is disposed between the layer including quantum dots and the first layer, wherein the second layer has a lower electron conductivity than the first. In a further embodiment of the device, the first layer is UV treated. A method and other embodiments are also disclosed.

    摘要翻译: 一种装置包括阳极; 阴极 其间包括量子点的层; 以及第一层,其包括能够传输和注入电子或与阴极形成接触的材料,所述材料包含无机半导体材料的纳米颗粒。 在该器件的一个实施例中,量子点包括一个芯,该芯包含一个第一半导体材料,该第一半导体材料限制了比芯中的电子更好的孔,以及一个外壳,其包含一个可渗透电子的第二半导体材料。 在该器件的另一实施例中,纳米颗粒包括n掺杂的无机半导体材料,并且包括能够传输电子的材料的第二层设置在包括量子点和第一层的层之间,其中第二层具有较低的电子传导性 比第一个。 在装置的另一实施例中,第一层被UV处理。 还公开了一种方法和其他实施例。