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    Apparatuses and methods for selective row refreshes
    41.
    发明授权
    Apparatuses and methods for selective row refreshes 有权

    公开(公告)号：US10134461B2

    公开(公告)日：2018-11-20

    申请号：US14707893

    申请日：2015-05-08

    Applicant: Micron Technology, Inc.

    Inventor： Debra M. Bell ,  Jeff A. McClain ,  Brian P. Callaway

    IPC: G11C11/406 ,  G11C7/10

    Abstract: Apparatuses and methods for selective row refreshes are disclosed herein. An example apparatus may include a refresh control circuit. The refresh control circuit may be configured to receive a target address associated with a target plurality of memory cells from an address bus. The refresh control circuit may further be configured to provide a proximate address to the address bus responsive, at least in part, to determining that a number of refresh operations have occurred. In some examples, a plurality of memory cells associated with the proximate address may be a plurality of memory cells adjacent the target plurality of memory cells.

    Apparatuses and methods for capturing data in a memory
    43.
    发明授权
    Apparatuses and methods for capturing data in a memory 有权
    用于在存储器中捕获数据的装置和方法

    公开(公告)号：US08913448B2

    公开(公告)日：2014-12-16

    申请号：US13660768

    申请日：2012-10-25

    Applicant: Micron Technology, Inc.

    Inventor： Robert Tamlyn ,  Debra M. Bell ,  Michael Roth ,  Eric A. Becker ,  Tyrel Z. Jensen

    IPC: G11C7/00

    CPC classification number: G11C29/028 ,  G11C7/1066 ,  G11C7/109 ,  G11C7/1093 ,  G11C7/222 ,  G11C29/022 ,  G11C29/023 ,  G11C2207/105

    Abstract: Apparatuses and methods for capturing data in a memory are disclosed herein. An apparatus may include a command path and a data capture logic. The command path may be configured to receive a command signal and to delay the command signal with a delay based, at least in part, on a plurality of propagation delays. The data capture logic may be coupled to the command path and configured to receive the delayed command signal and a data strobe signal. The data capture logic may further be configured to capture data according to the data strobe signal responsive, at least in part, to receipt of the delayed command signal.

    Abstract translation: 本文公开了用于在存储器中捕获数据的装置和方法。 装置可以包括命令路径和数据捕获逻辑。 命令路径可以被配置为接收命令信号并且至少部分地基于多个传播延迟延迟基于延迟的命令信号。 数据捕获逻辑可以耦合到命令路径并且被配置为接收延迟的命令信号和数据选通信号。 数据采集​​逻辑还可以被配置为至少部分地响应于接收延迟的命令信号而根据数据选通信号捕获数据。

    MEMORY DEVICE ON-DIE ECC DATA
    46.
    发明申请
    MEMORY DEVICE ON-DIE ECC DATA 有权

    公开(公告)号：US20230031842A1

    公开(公告)日：2023-02-02

    申请号：US17391830

    申请日：2021-08-02

    Applicant: Micron Technology, Inc.

    Inventor： Anthony D. Veches ,  Randall J. Rooney ,  Debra M. Bell

    IPC: G11C29/42 ,  G11C29/44 ,  G11C29/14 ,  G11C29/18

    Abstract: Methods, devices, and systems related to memory device on-die ECC data are described. In an example, a scrub operation can be performed on data in order to determine which rows of memory cells in an array include a particular number of errors. The particular number of errors can be a number of errors that exceed a threshold number of errors. An address of the determined rows with the particular number of errors can be stored in memory cells of the array for later access. The address of the determined rows can be accessed to perform a user-initiated repair operation, a self-repair operation, a refresh operation, and/or to alter timing of access of the cells or alter voltage of the cells.

    MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME
    47.
    发明申请
    MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME 有权

    公开(公告)号：US20230029003A1

    公开(公告)日：2023-01-26

    申请号：US17949836

    申请日：2022-09-21

    Applicant: Micron Technology, Inc.

    Inventor： Vaughn N. Johnson ,  Debra M. Bell ,  Miles S. Wiscombe ,  Brian T. Pecha ,  Kyle Alexander

    IPC: G11C11/406 ,  G11C11/408 ,  G11C11/4076

    Abstract: Memory devices and systems with programmable refresh order and stagger times are disclosed herein. In one embodiment, a memory device includes a first memory bank group and a second memory bank group. The memory device is configured, in response to a refresh command, to perform a first refresh operation on the first memory bank group at a first time and a second refresh operation on the second memory bank group at a second time after the first time. The memory device is further configured to perform, in response to a read or write command, a read or write operation on the first memory bank group, the second memory bank group, or both the first and second memory bank groups after beginning the first refresh operation and before completing the second refresh operation.

    MEMORY DEVICE SENSORS
    48.
    发明申请
    MEMORY DEVICE SENSORS 有权

    公开(公告)号：US20220404892A1

    公开(公告)日：2022-12-22

    申请号：US17892629

    申请日：2022-08-22

    Applicant: Micron Technology, Inc.

    Inventor： Debra M. Bell ,  Roya Baghi ,  Erica M. Gove ,  Zahra Hosseinimakarem ,  Cheryl M. O'Donnell

    IPC: G06F1/3234 ,  G11C16/26 ,  G11C11/56

    Abstract: Systems, apparatuses, and methods related to using memory device sensors are described. Some memory system or device types include sensors embedded in their circuitry. For instance, a device can be coupled to a memory device with an embedded sensor. The memory device can transmit the data generated by the embedded sensor using a sensor output coupled to the device. The memory device may generate, based at least in part on a characteristic of a memory device, a signal from a sensor embedded in the memory device and transmit the signal generated by the sensor from the memory device to another device coupled to the memory device.

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