公开(公告)号：US20070072858A1

公开(公告)日：2007-03-29

申请号：US11525200

申请日：2006-09-20

Applicant: Yan Zhu ,  Peng Cheng ,  Xin Chen ,  Jingyuan Ma ,  Zuchun Zhao

Inventor： Yan Zhu ,  Peng Cheng ,  Xin Chen ,  Jingyuan Ma ,  Zuchun Zhao

IPC: A61K31/5375 ,  A61K31/495 ,  A61K31/4025 ,  A61K31/401

CPC classification number: C07D295/185

Abstract: The present invention provides a compounds the formula (IV): and methods for producing an α-(phenoxy)phenylacetic acid compound of the formula: wherein R1 is a member selected from the group consisting of: each R2 is a member independently selected from the group consisting of (C1-C4)alkyl, halo, (C1-C4)haloalkyl, amino, (C1-C4)aminoalkyl, amido, (C1-C4)amidoalkyl, (C1-C4)sulfonylalkyl, (C1-C4)sulfamylalkyl, (C1-C4)alkoxy, (C1-C4)heteroalkyl, carboxy and nitro; the subscript n is 1 when R1 has the formula (a) or (b) and 2 when R1 has the formula (c) or (d); the subscript m is an integer of from 0 to 3; * indicates a carbon which is enriched in one stereoisomeric configuration; and the wavy line indicates the point of attachment of R1; and compounds

Abstract translation: 本发明提供式（IV）化合物及其制备下式的α-（苯氧基）苯乙酸化合物的方法：其中R 1是选自以下的成员：各 R 2是独立地选自（C 1 -C 4 -C 4）烷基，卤素，（C 1 -C 4）烷基的成员， C 1 -C 4卤代烷基，氨基，（C 1 -C 4）氨基烷基，酰氨基，（C 1 H 4） （C 1 -C 4）磺酰基烷基，（C 1 -C 4）磺酰基烷基，（C 1 -C 4 - C 1 -C 4亚磺酰基烷基，（C 1 -C 4 -C 4）烷氧基，（C 1 -C 3 - 亚磺酰基烷基） > 4个）杂烷基，羧基和硝基; 当R 1具有式（a）或（b）时，下标n为1，当R 1具有式（c）或（d））时，下标n为1。 下标m为0〜3的整数; *表示富含一种立体异构构型的碳; 波浪线表示R 1的连接点; 和化合物

公开(公告)号：US20060014809A1

公开(公告)日：2006-01-19

申请号：US11137678

申请日：2005-05-24

Applicant: Yan Zhu ,  Jingyuan Ma ,  Peng Cheng ,  Zuchun Zhao ,  Francine Gregoire ,  Vera Rakhmanova

Inventor： Yan Zhu ,  Jingyuan Ma ,  Peng Cheng ,  Zuchun Zhao ,  Francine Gregoire ,  Vera Rakhmanova

IPC: A61K31/4192 ,  C07D249/04

CPC classification number: C07D249/06 ,  C07D409/10

Abstract: The present invention is directed to certain novel triazole compounds represented by Formula I and pharmaceutically acceptable salts, solvates, hydrates, and prodrugs thereof. The present invention is also directed to methods of making and using such compounds and pharmaceutical compositions containing such compounds to treat or control a number of diseases mediated by PPAR such as glucose metabolism, lipid metabolism and insulin secretion, specifically Type 2 diabetes, hyperinsulemia, hyperlipidemia, hyperuricemia, hypercholesteremia, atherosclerosis, one or more risk factors for cardiovascular disease, Syndrome X, hypertriglyceridemia, hyperglycemia, obesity, and eating disorders.

Abstract translation: 本发明涉及由式I表示的某些新颖的三唑化合物及其药学上可接受的盐，溶剂合物，水合物和前药。 本发明还涉及制备和使用这些化合物和含有这些化合物的药物组合物的方法，以治疗或控制PPAR介导的许多疾病，例如葡萄糖代谢，脂质代谢和胰岛素分泌，特别是2型糖尿病，高胰岛素血症，高脂血症 高尿酸血症，高胆固醇血症，动脉粥样硬化，心血管疾病的一个或多个危险因素，X综合征，高甘油三酯血症，高血糖症，肥胖症和进食障碍。

公开(公告)号：US06689702B2

公开(公告)日：2004-02-10

申请号：US10304434

申请日：2002-11-25

Applicant: Gang Bai ,  David B. Fraser ,  Brian S. Doyle ,  Peng Cheng ,  Chunlin Liang

Inventor： Gang Bai ,  David B. Fraser ,  Brian S. Doyle ,  Peng Cheng ,  Chunlin Liang

IPC: H01L21469

CPC classification number: H01L29/513 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/28229 ,  H01L29/517

Abstract: A method of forming a dielectric layer suitable for use as the gate dielectric layer of a metal-oxide-semiconductor field effect transistor (MOSFET) includes oxidizing the surface of a silicon substrate, forming a metal layer over the oxidized surface, and reacting the metal with the oxidized surface to form a substantially intrinsic layer of silicon superjacent the substrate, wherein at least a portion of the silicon layer may be an epitaxial silicon layer, and a metal oxide layer superjacent the silicon layer. In a further aspect of the present invention, an integrated circuit includes a plurality of MOSFETs, wherein various ones of the plurality of transistors have metal oxide gate dielectric layers and substantially intrinsic silicon layers subjacent the metal oxide dielectric layers.

Abstract translation: 形成适合用作金属氧化物半导体场效应晶体管（MOSFET）的栅极电介质层的电介质层的方法包括氧化硅衬底的表面，在氧化表面上形成金属层，并使金属 与氧化表面形成超过衬底的基本上本征的硅层，其中硅层的至少一部分可以是外延硅层，以及位于硅层之上的金属氧化物层。 在本发明的另一方面，集成电路包括多个MOSFET，其中多个晶体管中的各个晶体管具有金属氧化物栅极电介质层和位于金属氧化物电介质层之下的基本上本征的硅层。

公开(公告)号：US06570220B2

公开(公告)日：2003-05-27

申请号：US09524986

申请日：2000-03-14

Applicant: Brian S. Doyle ,  Peng Cheng

Inventor： Brian S. Doyle ,  Peng Cheng

IPC: H01L2976

CPC classification number: B82Y10/00 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/762 ,  H01L21/823437 ,  H01L29/0665 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/785 ,  Y10S438/946 ,  Y10S438/947

Abstract: The invention relates to a method of forming reduced feature size spacers. The method includes providing a semiconductor substrate having an area region; patterning a first spacer over a portion of the area region of the substrate, the first spacer having a first thickness and opposing side portions; patterning a pair of second spacers, each second spacer adjacent to a side portion of the first spacer, each second spacer having a second thickness in opposing side portions, wherein the second thickness is less than the first thickness; removing the first spacer; patterning a plurality of third spacers, each third spacer adjacent to one of the side portions of one of the second spacers, each one of the third spacers having a third thickness, wherein the third thickness is less than the second thickness; and removing the second spacers. The invention also relates to a field of effect transistor. The transistor includes a semiconductor substrate having a source region and a drain region; a gate area of the substrate surface; a channel region in the substrate having a cross-sectional area defined by a portion of the gate area, a channel length measured accross a portion of the channel region between the source region and the drain region; and a trench formed in a portion of the channel region, the trench having a trench length substantially equivalent to the channel length.

公开(公告)号：US06277765B1

公开(公告)日：2001-08-21

申请号：US09376510

申请日：1999-08-17

Applicant: Peng Cheng ,  Brian S. Doyle ,  Chien Chiang ,  Mark Thiec-Hien Tran

Inventor： Peng Cheng ,  Brian S. Doyle ,  Chien Chiang ,  Mark Thiec-Hien Tran

IPC: H01L2131

CPC classification number: H01L21/02164 ,  H01L21/02203 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/7682 ,  H01L2221/1047

Abstract: A low dielectric constant material, suitable for use as an interlayer dielectric in microelectronic structures includes a porous silicon oxide layer. In a further aspect of the present invention, a porous oxide of silicon is formed by the room temperature oxidation of porous silicon. The room temperature oxidation is achieved by exposing a porous silicon layer to a solution of hydrochloric acid, hydrogen peroxide, and water, in the presence of a metal catalyst.

Abstract translation: 适用于微电子结构中的层间电介质的低介电常数材料包括多孔氧化硅层。 在本发明的另一方面，通过多孔硅的室温氧化形成硅的多孔氧化物。 通过在金属催化剂的存在下将多孔硅层暴露于盐酸，过氧化氢和水的溶液来实现室温氧化。

公开(公告)号：US06187694B1

公开(公告)日：2001-02-13

申请号：US08969008

申请日：1997-11-10

Applicant: Peng Cheng ,  Brian S. Doyle

Inventor： Peng Cheng ,  Brian S. Doyle

IPC: H01L21265

CPC classification number: H01L21/28132 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139 ,  Y10S438/947

Abstract: A method of fabricating a feature on a substrate is disclosed. In a described embodiment the feature is the gate electrode of an MOS transistor. In this embodiment a polysilicon layer is formed on the substrate. Next, an edge definition layer of silicon nitride is formed on the feature layer. Then, a patterned edge definition layer of silicon dioxide is formed on the first edge definition layer. Then, a silicon nitride spacer is formed adjacent to an edge of the patterned second edge definition layer. Finally, the polysilicon layer is etched, forming the transistor gate electrode from the polysilicon that remains under the spacer.

公开(公告)号：US6162696A

公开(公告)日：2000-12-19

申请号：US160012

申请日：1998-09-24

Applicant: Peng Cheng ,  Brian S. Doyle

Inventor： Peng Cheng ,  Brian S. Doyle

IPC: H01L21/28 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/331

CPC classification number: H01L21/28132 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/32139

Abstract: A method of fabricating a feature on a substrate is described. In one embodiment, the fabricated feature is the gate electrode of an MOS transistor. A feature layer is formed on the substrate with a patterned edge definition layer then formed on the feature layer. Next, a spacer layer is formed adjacent to an edge of the patterned edge definition layer. Finally, the feature layer is etched, forming the transistor gate electrode from the feature layer that remains under the spacer.

Abstract translation: 描述了在衬底上制造特征的方法。 在一个实施例中，所制造的特征是MOS晶体管的栅电极。 特征层形成在衬底上，然后形成在特征层上的图案化边缘限定层。 接下来，与图案化边缘限定层的边缘相邻地形成间隔层。 最后，蚀刻特征层，从保留在间隔物下方的特征层形成晶体管栅电极。

公开(公告)号：US11910255B2

公开(公告)日：2024-02-20

申请号：US17273334

申请日：2019-09-27

Applicant: Qualcomm Incorporated ,  Peng Cheng ,  Huichun Liu

Inventor： Peng Cheng ,  Huichun Liu

IPC: H04W72/04 ,  H04W36/00 ,  H04W24/10

CPC classification number: H04W36/0085 ,  H04W24/10 ,  H04W36/0058

Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) measure and report cell measurements for neighboring cells to assist the wireless network with handover decisions. In some cases, the UE may be configured to report beam-level measurements for just a subset of neighboring cells instead of each neighboring cell. For example, the UE may measure, or report beam measurements for a subset of the neighboring cells which meet configured criteria or are included in a subset of cells configured by the serving cell. Techniques for configuring and maintaining the subset of cells are described herein. For example, the cells in the subset may be configured by the UE or the serving cell of UE. A cell may also be removed from the subset if the cell does not continue to meet criteria for being included in the subset.

公开(公告)号：US10309847B2

公开(公告)日：2019-06-04

申请号：US15741248

申请日：2016-07-13

Applicant: Peng Cheng ,  Bengt Oelmann ,  Muhammad Nazar Ul Islam

Inventor： Peng Cheng ,  Bengt Oelmann ,  Muhammad Nazar Ul Islam

IPC: G01L3/00 ,  G01L3/04 ,  G01L25/00

Abstract: The torque sensor has a body. A first gastight chamber is defined at least partly by the body. A pressure sensor is connected with the gastight chamber for measuring the pressure in the gastight chamber. A pressure to torque converter is connected to the pressure sensor. The gastight chamber is arranged to change its volume by deformation of the body when the body is subjected to a torque wherein the volume change causes a change of pressure of the enclosed gas in the gastight chamber.

公开(公告)号：US10101059B2

公开(公告)日：2018-10-16

申请号：US12745168

申请日：2008-11-26

Applicant: Hongbin Ma ,  Joseph A. Boswell ,  Peng Cheng

Inventor： Hongbin Ma ,  Joseph A. Boswell ,  Peng Cheng

IPC: F25B33/00 ,  F25B1/08 ,  F25B15/02

Abstract: A thermally driven heat pump includes a low temperature evaporator for evaporating cooling fluid to remove heat A first heat exchanger located at an outlet of a converging/diverging chamber of a first ejector receives a flow of primary fluid vapor and cooling fluid vapor ejected from the first ejector for condensing a portion of the cooling fluid vapor An absorber located in the first heat exchanger absorbs cooling fluid vapor into an absorbing fluid to reduce the pressure in the first heat exchanger A second heat exchanger located at an outlet of a converging/diverging chamber of a second ejector receives primary fluid vapor and cooling fluid vapor ejected from the second ejector for condensing the cooling fluid vapor and the primary fluid vapor A separator in communication with the second ejector, the low temperature evaporator and the primary fluid evaporator separates the primary fluid from the cooling fluid.