Abstract:
A semiconductor package including: a first wiring structure; a semiconductor chip disposed on the first wiring structure; a second wiring structure disposed on the semiconductor chip and including a cavity; and a filling member between the first wiring structure and the second wiring structure and in the cavity, wherein an uppermost end of the filling member and an uppermost end of the second wiring structure are located at the same level.
Abstract:
Provided are a Bragg grating and a spectroscopy device including the same. The Bragg grating is disposed at each of opposite ends of a resonator for reflecting light of a certain wavelength band and includes a core member extending from a waveguide of the resonator in a lengthwise direction of the waveguide; a plurality of first refractive members protruding from the core member and spaced apart from each other along the lengthwise direction; and a second refractive member filling spaces between the first refractive members and having a refractive index different from a refractive index of the first refractive members.
Abstract:
Provided is a nanoparticle polymer in which a plurality of core particles that are linked to each other by a linker are surrounded by a metal-chalcogenide compound shell. The nanoparticle polymer may include a nanoparticle polymer including a core assembly including at least two nanoparticles connected to each other by a linker; and a shell that surrounds a surface of the core assembly and includes a metal-chalcogenide compound.
Abstract:
Provided is a dispenser for a solution including a reservoir configured to hold a suspension of micro light-emitting diodes (LEDs) suspended in a solvent; a stirrer configured to stir the suspension in the reservoir; a discharge path including a first valve configured to control outflow of the suspension from the reservoir; a filling path including a second valve configured to control inflow of the suspension into the reservoir; a hydraulic path including a third valve configured to control a pressure inside the reservoir; and a washing path connected to the first valve and configured to input a washing fluid for washing the discharge path into the discharge path, wherein the first valve includes a multi-way valve configured to selectively connect the discharge path to one of the reservoir and the washing path.
Abstract:
A micro semiconductor chip transfer method is provided and includes: preparing a transfer substrate including an upper portion having grooves formed therein; supplying, to the upper portion of the transfer substrate, a suspension including micro semiconductor chips and a liquid; and aligning the micro semiconductor chips in the grooves by sweeping, with an alignment bar that includes a hydrophobic wiper, an upper surface of the transfer substrate while the suspension is on the upper surface of the transfer substrate.
Abstract:
Provided are a multifold micro emitting device, a display apparatus, a method of manufacturing the multifold micro emitting device, and method of manufacturing the display apparatus. The multifold micro light emitting device includes a plurality of sub light emitting devices, a first electrode configured to apply a voltage to each of the plurality of sub light emitting devices, a second electrode configured to apply a common voltage to the plurality of sub light emitting devices, and a separator configured to separate the plurality of sub light emitting devices from each other, and the plurality of sub light emitting devices are configured as a single chip.
Abstract:
A method of mass-transferring a plurality of micro semiconductor chips, including mass-transferring a plurality of first micro semiconductor chips onto a first substrate such that they are disposed in a plurality of first grooves of the first substrate; determining whether an empty first groove is present; and positioning a second micro semiconductor chip in the empty first groove, wherein the positioning may include transferring a plurality of second micro semiconductor chips onto a second substrate separate from the first substrate; and adsorbing the second micro semiconductor chip from the second substrate, and positioning the adsorbed second micro semiconductor chip in the empty first groove, using an electrostatic force or an electromagnetic force.
Abstract:
A chip wet transfer apparatus includes a first chip supply module configured to supply a large amount of micro-semiconductor chips to a transfer substrate, a first chip alignment module configured to align the large amount of micro-semiconductor chips in a plurality of grooves, a second chip supply module configured to supply a small amount of micro-semiconductor chips, and a second chip alignment module configured to align the small amount of micro-semiconductor chips.
Abstract:
A method of manufacturing a semiconductor device, including: forming a membrane forming pattern on a substrate; forming a membrane material layer on the substrate, wherein the membrane material layer covers the membrane forming pattern; forming a membrane having a protruding pattern by crystallizing the membrane material layer; forming a two-dimensional (2D) material pattern on the protruding pattern by growing a 2D material on the membrane; and transferring the 2D material pattern to a transfer substrate
Abstract:
In some embodiments, an electronic device includes a memory and at least one processor coupled to the memory. The memory stores instructions configured to cause the electronic device to: retrieve data of at least one process allocated to the memory and perform a first memory retrieval operation; identify an available capacity of the memory, based on an event generated by the first memory retrieval operation; perform a second memory retrieval operation, based on a value of the identified available capacity being less than or equal to a first threshold value and the identified available capacity being greater than a second threshold value; and perform a third memory retrieval operation, based on a value of the identified available capacity being less than or equal to the first threshold value and the identified available capacity being less than or equal to the second threshold value.