公开(公告)号：US10062790B2

公开(公告)日：2018-08-28

申请号：US15823680

申请日：2017-11-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yuta Endo ,  Yoko Tsukamoto

IPC: H01L29/12 ,  H01L21/36 ,  H01L29/10 ,  H01L21/84 ,  H01L31/036 ,  H01L31/0376 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42392 ,  H01L29/78696

Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.

公开(公告)号：US09978879B2

公开(公告)日：2018-05-22

申请号：US15685040

申请日：2017-08-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo

IPC: H01L29/786 ,  H01L29/10 ,  H01L27/088 ,  H01L21/8234

CPC classification number: H01L29/7869 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/1225 ,  H01L29/1033 ,  H01L29/78648 ,  H01L29/78696

Abstract: A high-performance semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a first metal oxide covering at least part of the first transistor, an insulating film over the first transistor and the second transistor, and a second metal oxide over the insulating film. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide, a first source electrode, a first drain electrode, a second gate insulating film, and a second gate electrode. The second transistor includes a third gate electrode, a third gate insulating film, a second oxide, a second source electrode, a second drain electrode, a fourth gate insulating film, and a fourth gate electrode. The first gate insulating film and the second gate insulating film are in contact with the first metal oxide.

公开(公告)号：US09954003B2

公开(公告)日：2018-04-24

申请号：US15430746

申请日：2017-02-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinpei Matsuda ,  Masayuki Sakakura ,  Yuki Hata ,  Shuhei Nagatsuka ,  Yuta Endo ,  Shunpei Yamazaki

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L27/1225 ,  H01L27/1237 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device with high design flexibility is provided. A first transistor and a second transistor having electrical characteristics different from those of the first transistor are provided over the same layer without significantly increasing the number of manufacturing steps. For example, semiconductor materials with different electron affinities are used for a semiconductor layer in which a channel of the first transistor is formed and a semiconductor layer in which a channel of the second transistor is formed. This allows the threshold voltages of the first transistor and the second transistor to differ from each other. Forming a gate electrode using a damascene process enables miniaturization and high density of the transistors. Furthermore, a highly-integrated semiconductor device is provided.

公开(公告)号：US09871143B2

公开(公告)日：2018-01-16

申请号：US14657195

申请日：2015-03-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Kosei Noda

IPC: H01L29/786 ,  H01L21/336 ,  H01L29/41 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L29/66969

Abstract: A semiconductor device that is suitable for miniaturization. A method for manufacturing a semiconductor device includes the steps of forming a semiconductor, forming a first conductor over the semiconductor, performing a second process on the first conductor so as to form a conductor according to a first pattern, forming a first insulator over the conductor having the first pattern, forming an opening in the first insulator, performing a third process on the conductor having the first pattern in the opening so as to form a first electrode and a second electrode and to expose the semiconductor, forming a second insulator over the first insulator, an inner wall of the opening, and an exposed portion of the semiconductor, forming a second conductor over the second insulator, and performing a fourth process on the second conductor so as to form a third electrode.

公开(公告)号：US09812544B2

公开(公告)日：2017-11-07

申请号：US14935553

申请日：2015-11-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Toshinari Sasaki ,  Kosei Noda ,  Hitomi Sato ,  Yuhei Sato

IPC: H01L29/49 ,  H01L27/12 ,  H01L29/786 ,  H01L21/28 ,  H01L21/288 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/4908 ,  H01L21/28088 ,  H01L21/288 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/7869

Abstract: To manufacture a transistor whose threshold voltage is controlled without using a backgate electrode, a circuit for controlling the threshold voltage, and an impurity introduction method. To manufacture a semiconductor device having favorable electrical characteristics, high reliability, and low power consumption using the transistor. A gate electrode including a tungsten oxide film whose composition is controlled is used. The composition or the like is adjusted by a film formation method of the tungsten oxide film, whereby the work function can be controlled. By using the tungsten oxide film whose work function is controlled as part of the gate electrode, the threshold of the transistor can be controlled. Using the transistor whose threshold voltage is controlled, a semiconductor device having favorable electrical characteristics, high reliability, and low power consumption can be manufactured.

公开(公告)号：US09705006B2

公开(公告)日：2017-07-11

申请号：US14920259

申请日：2015-10-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo

IPC: H01L29/78 ,  H01L29/786 ,  H01L27/12 ,  H01L49/02 ,  H01L29/04 ,  H01L29/24 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1259 ,  H01L28/60 ,  H01L29/04 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78648

Abstract: A semiconductor device with high aperture ratio is provided. The semiconductor device includes a nitride insulating film, a transistor over the nitride insulating film, and a capacitor including a pair of electrodes over the nitride insulating film. An oxide semiconductor layer is used for a channel formation region of the transistor and one of the electrodes of the capacitor. A transparent conductive film is used for the other electrode of the capacitor. One electrode of the capacitor is in contact with the nitride insulating film, and the other electrode of the capacitor is electrically connected to one of a source electrode and a drain electrode of the transistor.

公开(公告)号：US09123692B2

公开(公告)日：2015-09-01

申请号：US13668454

申请日：2012-11-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kosei Noda ,  Yuta Endo

IPC: H01L29/10 ,  H01L29/417 ,  H01L29/45 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78636 ,  H01L29/7869

Abstract: By reducing the contact resistance between an oxide semiconductor film and a metal film, a transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device includes a pair of electrodes over an insulating surface; an oxide semiconductor film in contact with the pair of electrodes; a gate insulating film over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film interposed therebetween. In the semiconductor device, the pair of electrodes contains a halogen element in a region in contact with the oxide semiconductor film. Further, plasma treatment in an atmosphere containing fluorine can be performed so that the pair of electrodes contains the halogen element in a region in contact with the oxide semiconductor film.

Abstract translation: 通过降低氧化物半导体膜和金属膜之间的接触电阻，提供了使用氧化物半导体膜并且具有优异的导通状态特性的晶体管。 半导体器件包括绝缘表面上的一对电极; 与所述一对电极接触的氧化物半导体膜; 氧化物半导体膜上的栅极绝缘膜; 以及与氧化物半导体膜重叠的栅电极，其间具有栅极绝缘膜。 在半导体器件中，该对电极在与氧化物半导体膜接触的区域中含有卤素元素。 此外，可以在含氟气氛中进行等离子体处理，使得该对电极在与氧化物半导体膜接触的区域中含有卤素元素。

公开(公告)号：US20150187951A1

公开(公告)日：2015-07-02

申请号：US14580590

申请日：2014-12-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Kosei Noda

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/088 ,  H01L29/16 ,  H01L29/78648 ,  H01L29/78696

Abstract: To provide a transistor with stable electric characteristics, provide a transistor having a small current in a non-conductive state, provide a transistor having a large current in a conductive state, provide a semiconductor device including the transistor, or provide a durable semiconductor device, a semiconductor device includes a first insulator containing excess oxygen, a semiconductor over the first insulator, a second insulator over the semiconductor, and a conductor having a region overlapping with the semiconductor with the second insulator provided therebetween. A region containing boron or phosphorus is located between the first insulator and the semiconductor.

Abstract translation: 为了提供具有稳定电特性的晶体管，提供具有非导通状态的小电流的晶体管，提供具有导通状态的大电流的晶体管，提供包括晶体管的半导体器件，或提供耐用的半导体器件， 半导体器件包括含有过量氧的第一绝缘体，在第一绝缘体上的半导体，半导体上的第二绝缘体，以及具有与半导体重叠的区域的导体，其间设置有第二绝缘体。 含有硼或磷的区域位于第一绝缘体和半导体之间。

公开(公告)号：US20140319517A1

公开(公告)日：2014-10-30

申请号：US14263479

申请日：2014-04-28

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kosei Noda ,  Yuichi Sato ,  Yuta Endo

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/26586 ,  H01L27/1156 ,  H01L29/7869

Abstract: To provide a transistor formed using an oxide semiconductor film with reduced oxygen vacancies. To provide a semiconductor device that operates at high speed. To provide a highly reliable semiconductor device. To provide a miniaturized semiconductor device. The semiconductor device includes an oxide semiconductor film; a gate electrode overlapping with the oxide semiconductor film; a gate insulating film between the oxide semiconductor film and the gate electrode; and a protective insulating film that is above the oxide semiconductor film, the gate electrode, and the gate insulating film and includes a region containing phosphorus or boron.

Abstract translation: 提供使用具有减少的氧空位的氧化物半导体膜形成的晶体管。 提供高速运行的半导体器件。 提供高度可靠的半导体器件。 提供一种小型化的半导体器件。 半导体器件包括氧化物半导体膜; 与氧化物半导体膜重叠的栅电极; 氧化物半导体膜和栅电极之间的栅极绝缘膜; 以及在氧化物半导体膜，栅极电极和栅极绝缘膜之上的保护绝缘膜，并且包括含有磷或硼的区域。

公开(公告)号：US12101945B2

公开(公告)日：2024-09-24

申请号：US18225186

申请日：2023-07-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Tamae Moriwaka ,  Yuta Endo

IPC: H10B69/00 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  G11C11/408 ,  H01L27/06 ,  H01L29/24 ,  H01L29/786 ,  H10B41/20 ,  H10B41/70

CPC classification number: H10B69/00 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  G11C11/4085 ,  H01L27/0688 ,  H01L29/24 ,  H01L29/7869 ,  H10B41/20 ,  H10B41/70

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.
[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j−1th sub memory cell.