公开(公告)号：US20240323711A1

公开(公告)日：2024-09-26

申请号：US18574828

申请日：2022-10-21

Applicant: INTEL CORPORATION

Inventor： Hua LI ,  Andrey CHERVYAKOV ,  Ilya BOLOTIN ,  Dmitry BELOV ,  Rui HUANG ,  Meng ZHANG

IPC: H04W24/02 ,  H04W24/08

CPC classification number: H04W24/02 ,  H04W24/08

Abstract: This disclosure describes systems, methods, and devices related to good cell criteria. A device may establish a relaxation criteria for radio link monitoring (RLM) and beam failure detection (BFD). The device may utilize the relaxation criteria to assist a user equipment (UE) to enter or exit a relaxed condition. The device may apply a relaxation threshold to both RLM and BFD, wherein the relaxation threshold is based on a signal to noise ratio (SNR) of at least one reference signal (RS).

公开(公告)号：US20240322947A1

公开(公告)日：2024-09-26

申请号：US18575838

申请日：2022-11-02

Applicant: INTEL CORPORATION

Inventor： Gang XIONG ,  Yingyang LI ,  Debdeep CHATTERJEE ,  Sergey SOSNIN ,  Gregory ERMOLAEV

IPC: H04L1/08 ,  H04L5/14

CPC classification number: H04L1/08 ,  H04L5/14

Abstract: This disclosure describes systems, methods, and devices for physical uplink shared channel (PUSCH) repetition for half duplex frequency division duplex (HD-FDD) wireless operations. A user equipment (UE) device may detect a use of HD-FDD operations; identify an available time slot during which to transmit a PUSCH repetition for the HD-FDD operations; and encode the PUSCH repetition to be transmitted during the available time slot.

公开(公告)号：US20240321738A1

公开(公告)日：2024-09-26

申请号：US18125455

申请日：2023-03-23

Applicant: Intel Corporation

Inventor： Leonard P. Guler ,  Prabhjot Kaur Luthra ,  Nidhi Khandelwal ,  Marie T. Conte ,  Saurabh Acharya ,  Shengsi Liu ,  Gary Allen ,  Clifford J. Engel ,  Charles H. Wallace

IPC: H01L23/528 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L23/5283 ,  H01L27/092 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/778

Abstract: Techniques to form an integrated circuit having a bridging contact structure. A bridging contact structure may, for example, bridge between source/drain contacts and to an adjacent gate electrode within the same device layer. In an example, a gate cut structure extends in a first direction to separate the source or drain regions and gate structures of neighboring semiconductor devices. Contacts may be formed over the source or drain regions of the neighboring devices on opposite sides of the gate cut along a second direction orthogonal to the first direction. A portion of the gate cut is replaced with a first conductive bridge between the source or drain contacts. A portion of one or more dielectric barriers between one of the source or drain contacts and an adjacent gate electrode is replaced with a second conductive bridge in the first direction between the source or drain contact and the gate structure.

公开(公告)号：US20240320047A1

公开(公告)日：2024-09-26

申请号：US18575147

申请日：2022-02-24

Applicant: Intel Corporation

Inventor： Jianhui Li ,  Zhennan Qin ,  Jiong Gong ,  Jingze Cui ,  Yijie Mei ,  Yunfei Song

IPC: G06F9/50

CPC classification number: G06F9/5027

Abstract: Systems, apparatuses and methods may provide for technology that identifies a data layout associated with input tensors and output tensors, generates a micro-kernel based at least in part on the data layout, and generates a nested outer loop for a kernel, wherein the micro-kernel performs one or more subtasks associated with a task represented by the kernel. The technology also includes micro-kernel code caches, fused kernel generators and cyclic dependence free graph partitioning for deep learning workloads.

公开(公告)号：US20240318964A1

公开(公告)日：2024-09-26

申请号：US18393728

申请日：2023-12-22

Applicant: Intel Corporation

Inventor： Peter NOEST ,  Klaus UHL ,  Mirela Ecaterina STOICA

IPC: G01C21/34 ,  B25J5/00 ,  B25J9/16

CPC classification number: G01C21/3407 ,  B25J5/007 ,  B25J9/1664

Abstract: Disclosed herein are devices, methods, and systems for navigating and positioning an autonomous robot within a map of an environment. The system may obtain an occupancy grid associated with the environment around the robot, wherein the occupancy grid includes grid points of potential destinations for the robot. The system may determine, for each grid point of the grid points of potential destinations, a weight for the grid point based on a distance to the grid point from a predefined reference point and based on a directional deviation to the grid point, where the directional deviation comprises an angular difference between a current heading of the robot and an angular direction from the reference point toward the grid point. The system may select, based on the weight, a target point from among the grid points and generate a movement instruction associated with moving the robot toward the target point.

公开(公告)号：US12101475B2

公开(公告)日：2024-09-24

申请号：US17127544

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Brinda Ganesh ,  Nilesh Jain ,  Sumit Mohan ,  Faouzi Kossentini ,  Jill Boyce ,  James Holland ,  Zhijun Lei ,  Chekib Nouira ,  Foued Ben Amara ,  Hassene Tmar ,  Sebastian Possos ,  Craig Hurst

IPC: H04N19/114 ,  H04N19/154

CPC classification number: H04N19/114 ,  H04N19/154

Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.

公开(公告)号：US12100762B2

公开(公告)日：2024-09-24

申请号：US17578847

申请日：2022-01-19

Applicant: Intel Corporation

Inventor： Patrick Morrow ,  Kimin Jun ,  Il-Seok Son ,  Donald W. Nelson

IPC: H01L29/78 ,  H01L23/00 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L29/417 ,  H01L23/15

CPC classification number: H01L29/78 ,  H01L23/147 ,  H01L23/3107 ,  H01L23/49827 ,  H01L24/00 ,  H01L24/05 ,  H01L29/41791 ,  H01L23/145 ,  H01L23/15 ,  H01L2224/0237 ,  H01L2224/04105 ,  H01L2224/0603 ,  H01L2224/16227

Abstract: An apparatus including a circuit structure including a first side including a device layer including a plurality of devices and an opposite second side; an electrically conductive contact coupled to one of the plurality of devices on the first side; and an electrically conductive interconnect disposed on the second side of the structure and coupled to the conductive contact. A method including forming a transistor device including a channel between a source and a drain and a gate electrode on the channel defining a first side of the device; forming an electrically conductive contact to one of the source and the drain from the first side; and forming an interconnect on a second side of the device, wherein the interconnect is coupled to the contact.

公开(公告)号：US12099841B2

公开(公告)日：2024-09-24

申请号：US17212977

申请日：2021-03-25

Applicant: Intel Corporation

Inventor： Rajesh Sankaran ,  Gilbert Neiger ,  Vedvyas Shanbhogue ,  David Koufaty

IPC: G06F9/54 ,  G06F9/30 ,  G06F9/48

CPC classification number: G06F9/30076 ,  G06F9/30101 ,  G06F9/4825

Abstract: An embodiment of an apparatus comprises decode circuitry to decode a single instruction, the single instruction to include a field for an identifier of a first source operand, a field for an identifier of a destination operand, and a field for an opcode, the opcode to indicate execution circuitry is to program a user timer, and execution circuitry to execute the decoded instruction according to the opcode to retrieve timer program information from a location indicated by the first source operand, and program a user timer indicated by the destination operand based on the retrieved timer program information. Other embodiments are disclosed and claimed.

公开(公告)号：US12099838B2

公开(公告)日：2024-09-24

申请号：US17132464

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Deepti Aggarwal ,  Michael Espig ,  Chekib Nouira ,  Robert Valentine ,  Mark Charney

IPC: G06F17/18 ,  G06F9/30 ,  G06F9/38 ,  G06F17/16

CPC classification number: G06F9/3001 ,  G06F9/3802 ,  G06F9/3818 ,  G06F17/16 ,  G06F17/18

Abstract: In an embodiment, a processor includes: a fetch circuit to fetch instructions, the instructions including a sum of squared differences (SSD) instruction; a decode circuit to decode the SSD instruction; and an execution circuit to, during an execution of the decoded SSD instruction, generate an SSD output vector based on a plurality of input vectors, the SSD output vector including a plurality of squared differences values. Other embodiments are described and claimed.

公开(公告)号：US12099651B2

公开(公告)日：2024-09-24

申请号：US18186680

申请日：2023-03-20

Applicant: Intel Corporation

Inventor： William C. Deleeuw

IPC: G06F3/01 ,  G06T13/80 ,  G06V10/143 ,  G06V40/19 ,  G10L15/02 ,  G10L15/22 ,  G10L15/30 ,  G10L21/003

CPC classification number: G06F3/013 ,  G06T13/80 ,  G06V10/143 ,  G06V40/19 ,  G10L15/02 ,  G10L15/22 ,  G10L2015/025 ,  G10L2015/227 ,  G10L2015/228 ,  G10L15/30 ,  G10L21/003

Abstract: Technologies for natural language interactions with virtual personal assistant systems include a computing device configured to capture audio input, distort the audio input to produce a number of distorted audio variations, and perform speech recognition on the audio input and the distorted audio variants. The computing device selects a result from a large number of potential speech recognition results based on contextual information. The computing device may measure a user's engagement level by using an eye tracking sensor to determine whether the user is visually focused on an avatar rendered by the virtual personal assistant. The avatar may be rendered in a disengaged state, a ready state, or an engaged state based on the user engagement level. The avatar may be rendered as semitransparent in the disengaged state, and the transparency may be reduced in the ready state or the engaged state. Other embodiments are described and claimed.