Transistor logic tristate device with reduced output capacitance
    52.
    发明授权
    Transistor logic tristate device with reduced output capacitance 失效
    晶体管逻辑三态器件具有降低的输出电容

    公开(公告)号:US4311927A

    公开(公告)日:1982-01-19

    申请号:US58674

    申请日:1979-07-18

    申请人: David A. Ferris

    发明人: David A. Ferris

    CPC分类号: H03K19/088 H03K19/0826

    摘要: A transistor logic tristate output gate or device is provided with active or passive element arrangements coupled between the enable gate on the one hand and the base of the pull down element transistor on the other hand. This coupling affords a low impedance route to ground or low potential from the base of the pull down element when the enable gate is at low potential and the output device is in the high impedance third state. Miller feedback current at the base of the pull down element transistor is thereby diverted to ground. The coupling arrangement affords high impedance to current flow in the opposite direction thereby blocking current flow from the enable gate when the enable gate is at high potential. For active discharge of Miller current three transistors are provided in a double inversion series coupling between the enable gate and pull down element. Alternately a multiple emitter junction transistor is used. For passive element discharge of Miller current a low forward impedance high backward impedance large surface area diode is used.

    摘要翻译: 晶体管逻辑三态输出门或器件设置有一方面在一方面的使能栅极和下拉元件晶体管的基极之间耦合的有源或无源元件布置。 当使能栅极处于低电位并且输出器件处于高阻抗第三状态时,该耦合提供从下拉元件的基极到地电位或低电位的低阻抗路径。 因此,下拉元件晶体管的基极处的米勒反馈电流被转移到地。 耦合装置在相反方向上提供高阻抗电流,从而当使能栅极处于高电位时阻断来自使能栅极的电流。 对于米勒电流的有源放电,在使能栅极和下拉元件之间的双反相串联耦合中提供了三个晶体管。 可替代地,使用多发射极结晶体管。 对于毫米电流的无源元件放电,使用低正向阻抗高反向阻抗大表面积二极管。

    Transistor logic tristate output with reduced power dissipation
    53.
    发明授权
    Transistor logic tristate output with reduced power dissipation 失效
    晶体管逻辑三态输出,功耗降低

    公开(公告)号:US4287433A

    公开(公告)日:1981-09-01

    申请号:US5929

    申请日:1979-01-24

    摘要: A transistor logic tristate output device with plural phase splitter transistor means coupled in parallel configuration jointly to control sinking of current by the pulldown element with only one of the plural phase splitter transistor means coupled to control sourcing of current by the pullup element. In a preferred embodiment dual phase splitter transistors define a relatively low resistance path from high potential for controlling the pulldown element and a relatively high resistance path from high potential through the enable gate restricting power consumption in the high impedance third state.

    摘要翻译: 晶体管逻辑三态输出装置具有多个并联配置并联配置的相位分离器晶体管装置,用于通过下拉元件控制电流的吸收,多个相分离器晶体管装置中只有一个被耦合以控制上拉元件的电流源。 在优选实施例中,双相分流器晶体管限定了用于控制下拉元件的高电位的相对较低的电阻路径和从高电位通过使能栅极的相对较高电阻路径,限制高阻抗第三状态中的功率消耗。

    Means for reducing signal propagation losses in very large scale
integrated circuits
    54.
    发明授权
    Means for reducing signal propagation losses in very large scale integrated circuits 失效
    减少非常大规模集成电路中信号传播损耗的手段

    公开(公告)号:US4833521A

    公开(公告)日:1989-05-23

    申请号:US218433

    申请日:1988-07-08

    申请人: James M. Early

    发明人: James M. Early

    IPC分类号: H01L23/522 H01L23/66

    摘要: A method and means for reducing signal propagation losses in very large scale integrated circuits is provided comprising a ground plane located adjacent to, but insulated from, a conductive signal layer overlying an active region in a semiconductor substrate. While, the ground plane is preferrably disposed between the signal layer and the substrate, it may be disposed above the signal layer. Moreover, two or more signal layers may be employed and sandwiched between a pair of ground planes.

    摘要翻译: 提供了一种用于减小超大规模集成电路中的信号传播损耗的方法和装置,其包括与覆盖半导体衬底中的有源区的导电信号层相邻但绝缘的接地平面。 而优选地,接地平面设置在信号层和衬底之间,它可以设置在信号层之上。 此外,可以使用两个或更多个信号层并夹在一对接地平面之间。

    Monolithic telephone subscriber line interface circuit
    55.
    发明授权
    Monolithic telephone subscriber line interface circuit 失效
    单片电话用户线接口电路

    公开(公告)号:US4712233A

    公开(公告)日:1987-12-08

    申请号:US725461

    申请日:1985-04-22

    申请人: James R. Kuo

    发明人: James R. Kuo

    IPC分类号: H04M3/22 H04M19/02

    CPC分类号: H04M3/2272 H04M19/026

    摘要: The present invention is an improved subscriber line interface circuit which allows fast detection of an off-hook signal in the presence of a ringing signal during an answer mode while also permitting fast detection of dialing pulses during a calling mode. A programmable filter is used in the supervision circuit of the SLIC to allow the cutoff frequency of the filter to be varied so that the 20 Hz ringing signal will be attenuated during a ringing sequence and dialing pulse rates up to 20 Hz will be passed by the filter during the calling mode. A clamping amplifier is used to clamp the received signal to a maximum of 1.5 times the loop threshold current. This eliminates the large variations in the rise and fall times of the pulse dialing signal due to variations in the loop current caused by varying impedances of the telephone line. The filter is programmed by using an analog switch to bypass certain filter elements. The analog switch is a voltage-follower amplifier which has a current source which is disabled when the switch is to be opened.

    摘要翻译: 本发明是一种改进的用户线接口电路,其允许在应答模式期间在振铃信号的存在下快速检测摘机信号,同时还允许在呼叫模式期间快速检测拨号脉冲。 在SLIC的监控电路中使用可编程滤波器,以允许滤波器的截止频率变化,使得20Hz振铃信号在振铃序列期间衰减,并且拨号脉冲速率高达20Hz将通过 在呼叫模式下进行过滤。 钳位放大器用于将接收到的信号钳位到环路阈值电流的最大值的1.5倍。 这消除了由于电话线路的阻抗变化导致的环路电流变化引起的脉冲拨号信号的上升和下降时间的巨大变化。 滤波器通过使用模拟开关来绕过某些滤波器元件进行编程。 模拟开关是电压跟随放大器,具有电流源,当开关打开时,电流源被禁用。

    Identification of repaired integrated circuits
    56.
    发明授权
    Identification of repaired integrated circuits 失效
    识别修复后的集成电路

    公开(公告)号:US4480199A

    公开(公告)日:1984-10-30

    申请号:US360028

    申请日:1982-03-19

    摘要: A circuit for providing an identification signal indicative of whether or not an integrated circuit has been repaired includes a circuit which operates at potentials outside the normal range of the integrated circuit. The circuit includes at least one transistor T1 serially connected between a TTL pin 10 of the integrated circuit and a fuse F1. The fuse F1 is also connected to a potential source V.sub.CC. If the integrated circuit is repaired the fuse F1 is opened, and consequently, application of a potential outside the normal range will cause current to flow if fuse F1 has not been opened, and cause no current to flow if fuse F1 has been opened.

    摘要翻译: 用于提供指示集成电路是否被修复的识别信号的电路包括在集成电路的正常范围之外的电位下工作的电路。 电路包括串联连接在集成电路的TTL引脚10和熔丝F1之间的至少一个晶体管T1。 保险丝F1也连接到电位源VCC。 如果集成电路被修复,则保险丝F1断开,因此如果保险丝F1未被打开,则施加超出正常范围的电位将导致电流流动,如果保险丝F1已经断开,则不会流过电流。

    Cover gas control of bonding ball formation
    57.
    发明授权
    Cover gas control of bonding ball formation 失效
    覆盖焊接球形成的气体控制

    公开(公告)号:US4476365A

    公开(公告)日:1984-10-09

    申请号:US433448

    申请日:1982-10-08

    IPC分类号: H01L21/60 B23K20/00 B23K31/00

    摘要: A method and apparatus is disclosed for forming a ball at the end of bonding wire or lead wire held in a capillary wire holding and bonding tool for ball bonding of the lead wire to an integrated circuit chip. The method of ball formation is of the type in which the end of the bonding wire is enclosed in a shroud or shield and the shield and the end of the bonding wire are flooded with an inert cover gas. Ball formation is accomplished by electrically discharging an arc between the bonding wire and the shroud for melting and forming the ball at the end of the wire. A passageway is provided for delivering and mixing hydrogen gas into the inert cover gas delivery line at a location upstream from the shroud sufficient for complete mixing. The rate of flow of hydrogen gas is metered and controlled for adjusting the percent by volume of hydrogen in the cover gas mixture to a desired range.

    摘要翻译: 公开了一种在保持在用于将引线与集成电路芯片接合的毛细管线保持和接合工具中的接合线或导线的端部处形成球的方法和装置。 球形成的方法是将接合线的端部封装在护罩或护罩中的类型,并且屏蔽件和接合线的端部充满惰性覆盖气体。 球形成是通过在接合线和护罩之间电弧放电来实现的,以在线的端部熔化和形成球。 提供了一种通道,用于将氢气输送并混合到惰性覆盖气体输送管线中,该管道在护罩的上游位置足以完全混合。 计量和控制氢气流量,以将覆盖气体混合物中的氢气体积百分比调节至所需范围。

    Data storage apparatus
    59.
    发明授权
    Data storage apparatus 失效
    数据存储装置

    公开(公告)号:US4352492A

    公开(公告)日:1982-10-05

    申请号:US745025

    申请日:1976-11-26

    申请人: Ronald A. Smith

    发明人: Ronald A. Smith

    摘要: A video game apparatus for connection to a standard television set and including an electronics-containing console having a plurality of parameter selection buttons and a chute mechanism for receiving a replaceable cartridge-containing supplementary electronic circuitry, and a pair of hand controllers for providing player control inputs to the console electronics. Improved connector apparatus is associated with the chute mechanism to enable electrical connection to be made to a cartridge contained printed circuit board with a minimum of insertion force.

    摘要翻译: 一种用于连接到标准电视机并且包括具有多个参数选择按钮的电子装置控制台和用于接收可替换的包含盒的辅助电子电路的滑槽机构的视频游戏装置,以及用于提供玩家控制的一对手控制器 输入到控制台电子设备。 改进的连接器装置与滑槽机构相关联,以使得能够以最小的插入力进行与盒式印刷电路板的电连接。

    Universal test fixture employing interchangeable wired personalizers
    60.
    发明授权
    Universal test fixture employing interchangeable wired personalizers 失效
    通用测试夹具采用可互换的有线个性化设备

    公开(公告)号:US4352061A

    公开(公告)日:1982-09-28

    申请号:US42116

    申请日:1979-05-24

    申请人: John L. Matrone

    发明人: John L. Matrone

    CPC分类号: G01R1/07371

    摘要: A universe of probes is contained within a platen in a spaced-apart, substantially parallel relationship with one another with their tips pointing in the same direction. Each probe is free to move longitudinally between an advanced or test position and a retracted position. The platen nests into a wired personalizer having probe selector posts upstanding therein in a pattern corresponding to the pattern of test points on a circuit board to be tested. These posts serve to push up or advance the probes needed to test a particular type of circuit board. The posts are conductive and each is individually connected to the test system. The circuit board to be tested rests on a special deformable gasket so that its test points are suspended over and aligned with the advanced test probes. When the fixture is evacuated, the circuit board to be tested is drawn downwardly so that the test points on the board make electrical contact with the tips of the advanced probes.

    摘要翻译: 探针的宇宙以彼此间隔开的,基本上平行的关系包含在压板内,并且其尖端指向相同的方向。 每个探头可自由地在高级或测试位置与缩回位置之间纵向移动。 压板嵌入到具有探针选择器柱的有线个人化器中,其中以与要测试的电路板上的测试点的图案相对应的图案。 这些帖子用于推动或推进测试特定类型电路板所需的探针。 柱是导电的,并且每个都单独地连接到测试系统。 待测试的电路板位于特殊的可变形垫片上,使其测试点悬挂在高级测试探头上并与其对准。 当固定装置抽真空时,要测试的电路板向下拉,使板上的测试点与先进探头的尖端电接触。