公开(公告)号：US20210125666A1

公开(公告)日：2021-04-29

申请号：US17140064

申请日：2021-01-02

Applicant: Microchip Technology Inc.

Inventor： Victor Nguyen ,  Fethi Dhaoui ,  John L McCollum ,  Fengliang Xue

IPC: G11C13/00 ,  H01L45/00

Abstract: A ReRAM memory cell includes a ReRAM device including a solid electrolyte layer disposed between a first ion-source electrode and a second electrode and a select circuit including two series-connected select transistors connected in series with the ReRAM device, each of the two series-connected select transistors having a gate connected to a separate control line.

公开(公告)号：US10756719B2

公开(公告)日：2020-08-25

申请号：US14919000

申请日：2015-10-21

Applicant: Microchip Technology Inc.

Inventor： Isaac Ko ,  Ka Wai Ho ,  Wan Tim Chan ,  Jimes Lei

IPC: H03K17/693 ,  H03K17/06 ,  A61B8/00

Abstract: Described herein are multiple designs for an improved analog switch for use in transmitting high voltage signals without using high voltage power supplies for the switch. The analog switches are able to pass and block input signals in the approximate range of −100V to +100V. The use of translinear loops and a bootstrap configuration results in a constant on-resistance of the symmetrical switches and matches the conductance of each analog switch to the transconductance of an NMOS transistor, which can be easily stabilized with a constant gm biasing scheme. In certain embodiments, a shunt termination (T-switch) configuration is used for better off-isolation, and each of the symmetrical switches has its own translinear loop and thus flexibility of on-resistance and termination voltage.

公开(公告)号：US10199919B2

公开(公告)日：2019-02-05

申请号：US15960930

申请日：2018-04-24

Applicant: Microchip Technology Incorporated

Inventor： David Gammie

IPC: H02M1/38 ,  H02M3/158 ,  H02M1/088 ,  H03K17/567 ,  H03K5/24 ,  H02M3/157 ,  H02M3/156 ,  G05F1/24 ,  H02M1/00

Abstract: A circuit and method for controlling a power converter having a high-side and a low-side switch are provided. The circuit may include a comparator configured to receive a reference voltage at a first input and a ramp voltage at a second output, and to output a delay signal based on a comparison of the reference voltage and the ramp voltage. The delay signal may be configured to turn on one or more of the high-side switch and the low-side switch. The circuit may increase or decrease the reference voltage based on a dead time, which equals an amount of time when the high-side switch and the low-side switch are turned off. The circuit may include a first switch that is controlled to lower the reference voltage if a dead time exceeds a first threshold, and a second switch that is controlled to raise the reference voltage if the dead time delay signal is below a second threshold.

公开(公告)号：US10171072B2

公开(公告)日：2019-01-01

申请号：US15265341

申请日：2016-09-14

Applicant: Microchip Technology Inc.

Inventor： Isaac Ko ,  Ka Wai Ho ,  Wan Tim Chan

IPC: H03K17/687 ,  A61B8/08 ,  H03K17/16 ,  A61B8/00 ,  H03K17/693 ,  H04B1/48

Abstract: An improved analog switch for use in an ultrasound elastography probe is disclosed. The improved analog switch results in less heat dissipation compared to prior art analog switches.

公开(公告)号：US09568597B2

公开(公告)日：2017-02-14

申请号：US13965490

申请日：2013-08-13

Applicant: Microchip Technology Incorporated

Inventor： Benedict Choy ,  Ching Chu ,  Andy Tu

IPC: H03K17/16 ,  G01S7/52

CPC classification number: G01S7/52017

Abstract: An ultrasound image system has a plurality of channels. At least one of the plurality of channels has a capacitive T/R switch.

Abstract translation: 超声图像系统具有多个通道。 多个通道中的至少一个具有电容性T / R开关。

公开(公告)号：US09337725B2

公开(公告)日：2016-05-10

申请号：US13947894

申请日：2013-07-22

Applicant: Microchip Technology, Inc.

Inventor： Alexander Mednik ,  Simon Krugly ,  Marc Tan

IPC: H02J3/12 ,  G05F1/00 ,  H02M3/335 ,  H02M3/156 ,  H02M3/155 ,  H05B33/08

CPC classification number: H02M3/156 ,  H02M3/155 ,  H05B33/0818

Abstract: A switching power converter has an input voltage source. An output load is coupled to the input voltage source. An inductive element is coupled to the load. A switch is coupled to the inductive element. A control circuit is coupled to the switch and the inductive element for activating and deactivating the switch, the control circuit activating and deactivating the switch based on a negative voltage drop across a resistive element of the control circuit.

Abstract translation: 开关电源转换器具有输入电压源。 输出负载耦合到输入电压源。 电感元件耦合到负载。 开关耦合到电感元件。 控制电路耦合到开关和感应元件，用于启动和停用开关，控制电路基于控制电路的电阻元件上的负电压降激活和去激活开关。

公开(公告)号：US09048104B2

公开(公告)日：2015-06-02

申请号：US12834853

申请日：2010-07-12

Applicant: Benedict C. K. Choy ,  Ching Chu ,  Haibing (Robin) Liu ,  Ming-Yuan Yeh

Inventor： Benedict C. K. Choy ,  Ching Chu ,  Haibing (Robin) Liu ,  Ming-Yuan Yeh

IPC: H01L29/40 ,  H01L23/00 ,  H01L23/495 ,  H01L23/525 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0642 ,  H01L23/481 ,  H01L23/49575 ,  H01L23/525 ,  H01L24/06 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L27/088 ,  H01L29/0878 ,  H01L29/66712 ,  H01L29/7809 ,  H01L29/7827 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48135 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A circuit module comprises a die attach pad with a surface and a plurality of leads surrounding the surface. A nonconductive adhesive is on the surface. A plurality of electronic circuit dies are on the surface of the die attach pad. Each die has a top surface and a bottom surface with the bottom surface on the adhesive. The top surface has a plurality of bonding pads. A first electronic circuit die has at least one routing path of a conductive material connecting a first bonding pad to a second bonding pad. A first bonding wire connects a bonding pad of a second electronic circuit die to the first bonding pad of the first electronic die. A second bonding wire connects the second bonding pad of the first electronic circuit die to a lead. Where one of the dies contains vertical circuit element, where a doped layer forms a terminal along the bottom surface of the layer, a trench filled with doped polysilicon extends from the top surface to the terminal to connect to the terminal. The doped polysilicon filled trench also serves to isolate and separate different circuit elements.

Abstract translation: 电路模块包括具有表面的管芯附接垫和围绕表面的多个引线。 非导电粘合剂在表面上。 多个电子电路管芯在管芯附着垫的表面上。 每个模具具有顶表面和底表面，底表面在粘合剂上。 顶表面具有多个接合焊盘。 第一电子电路管芯具有将第一接合焊盘连接到第二接合焊盘的导电材料的至少一个布线路径。 第一接合线将第二电子电路管芯的接合焊盘连接到第一电子管芯的第一接合焊盘。 第二接合线将第一电子电路管芯的第二接合焊盘连接到引线。 在其中一个裸片包含垂直电路元件的情况下，其中掺杂层沿着该层的底表面形成端子，填充有掺杂多晶硅的沟槽从顶表面延伸到端子以连接至端子。 掺杂多晶硅填充的沟槽还用于隔离和分离不同的电路元件。

公开(公告)号：US08963430B2

公开(公告)日：2015-02-24

申请号：US13451457

申请日：2012-04-19

Applicant: James T Walker

Inventor： James T Walker

IPC: H05B37/02 ,  H05B33/08

CPC classification number: H05B33/0893

Abstract: A circuit is disclosed for determining which of a multiplicity of LED strings in an illumination system has a fault. A group of circuits determines the maximum, minimum, midpoint between maximum and minimum, and average voltage of the group of LED string voltages in use, and examines the statistical properties of the LED string voltages. Comparators are used to find the strings which have the highest and lowest operating voltages, and to compare the midpoint and average voltages to determine whether the highest or lowest voltage string is responsible for causing a fault in the illumination system operation. Memory means are used to keep the said determined string turned off to prevent faulty operation.

Abstract translation: 公开了一种用于确定照明系统中多个LED串中的哪一个具有故障的电路。 一组电路确定最大值和最小值之间的最大值，最小值，最小值以及所使用的LED串电压组的平均电压，并检查LED串电压的统计特性。 比较器用于找到具有最高和最低工作电压的串，并且比较中点和平均电压以确定最高或最低电压串是否导致照明系统操作中的故障。 存储装置用于保持所述确定的字符串被关闭以防止错误的操作。

公开(公告)号：US07186594B2

公开(公告)日：2007-03-06

申请号：US11183640

申请日：2005-07-18

Applicant: Randy L. Yach ,  Gregg Dix

Inventor： Randy L. Yach ,  Gregg Dix

IPC: H01L21/332

CPC classification number: H01L27/0259

Abstract: A high voltage ESD-protection structure is used to protect delicate transistor circuits connected to an input or output of an integrated circuit bond pad from destructive high voltage ESD events by conducting at a controlled breakdown voltage that is less than a voltage that may cause destructive breakdown of the input and/or output circuits. The ESD-protection structure is able to absorb high current from these ESD events without snapback that would compromise operation of the higher voltage inputs and/or outputs of the integrated circuit. The ESD-protection structure will conduct when an ESD event occurs at a voltage above a controlled breakdown voltage of an electronic device, e.g., diode, in the ESD protection structure. Conduction of current from an ESD event having a voltage above the electronic device controlled breakdown voltage may be through another electronic device, e.g., transistor, having high current conduction capabilities, in the ESD-protection structure that may be controlled (triggered) by the device (e.g., diode) determining the controlled breakdown voltage (at which the ESD voltage is clamped to a desired value). The high voltage ESD-protection structure may be located substantially under the bond pad and may also include a low capacitance forward diode structure between the bond pad and the ESD clamp circuit.

Abstract translation: 高压ESD保护结构用于通过在可能导致破坏性击穿的电压下进行受控击穿电压来保护连接到集成电路接合焊盘的输入或输出的精细晶体管电路免受破坏性高电压ESD事件的影响 的输入和/或输出电路。 ESD保护结构能够吸收来自这些ESD事件的高电流，而不会产生危及集成电路的较高电压输入和/或输出的操作的快速恢复。 当ESD事件发生在高于ESD保护结构中电子器件（例如二极管）的受控击穿电压的电压时，ESD保护结构将导通。 来自具有高于电子器件受控击穿电压的电压的ESD事件的电流的导通可以通过可由该器件控制（触发）的ESD保护结构中的另一电子器件，例如具有高电流传导能力的晶体管 （例如，二极管）确定受控击穿电压（ESD电压被钳位到期望值）。 高压ESD保护结构可以基本上位于接合焊盘下方，并且还可以包括在接合焊盘和ESD钳位电路之间的低电容正向二极管结构。

公开(公告)号：US07157890B1

公开(公告)日：2007-01-02

申请号：US11385374

申请日：2006-03-21

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: G05F1/595

CPC classification number: H02J1/102

Abstract: A plurality of power supply modules having their outputs coupled in parallel are controlled for load balancing purposes through a direct current bus having filtered pulse width modulation (PWM) signals representative of the power outputs of each of the plurality of power supply modules. A local PWM signal for each of the plurality of power supply modules is filtered to a DC voltage and used to compare with an average power required from each of the plurality of power supply modules.

Abstract translation: 通过具有代表多个电源模块中每个电源模块的功率输出的已滤波的脉冲宽度调制（PWM）信号的直流总线，控制具有并联耦合的多个电源模块用于负载平衡目的。 用于多个电源模块中的每一个的本地PWM信号被滤波成DC电压并用于与多个电源模块中的每一个所需的平均功率进行比较。