公开(公告)号：US20200312630A1

公开(公告)日：2020-10-01

申请号：US16828694

申请日：2020-03-24

Applicant: Applied Materials, Inc.

Inventor： Kartik Ramaswamy ,  Lawrence Wong ,  Steven Lane ,  Yang Yang ,  Srinivas D. Nemani ,  Praburam Gopalraja

IPC: H01J37/32 ,  H01H1/46

Abstract: A plasma reactor includes a processing chamber having a lower processing portion having an axis of symmetry and an array of cavities extending upwardly from the lower processing portion. A gas distributor couples plural gas sources to a plurality of gas inlets of the cavities, and the gas distributor includes a plurality of valves with each valve selectively connecting a respective gas inlet to one of the plural gas sources. Power is applied by an array of conductors that includes a respective conductor for each respective cavity with each conductor adjacent and surrounding a cavity. A power distributor couples a power source and the array of conductors, and the power distributor includes a plurality of switches with a switch for each respective conductor.

公开(公告)号：US10474033B2

公开(公告)日：2019-11-12

申请号：US15692087

申请日：2017-08-31

Applicant: Applied Materials, Inc.

Inventor： Viachslav Babayan ,  Douglas A. Buchberger, Jr. ,  Qiwei Liang ,  Ludovic Godet ,  Srinivas D. Nemani ,  Daniel J. Woodruff ,  Randy Harris ,  Robert B. Moore

IPC: G03D5/00 ,  G03F7/20 ,  H01L21/687 ,  G03F7/16 ,  G03F7/26 ,  G03F7/38

Abstract: Embodiments described herein relate to methods and apparatus for performing immersion field guided post exposure bake processes. Embodiments of apparatus described herein include a chamber body defining a processing volume. A pedestal may be disposed within the processing volume and a first electrode may be coupled to the pedestal. A moveable stem may extend through the chamber body opposite the pedestal and a second electrode may be coupled to the moveable stem. In certain embodiments, a fluid containment ring may be coupled to the pedestal and a dielectric containment ring may be coupled to the second electrode.

公开(公告)号：US10438849B2

公开(公告)日：2019-10-08

申请号：US15137245

申请日：2016-04-25

Applicant: APPLIED MATERIALS, INC.

Inventor： He Ren ,  Jie Zhou ,  Guannan Chen ,  Michael W. Stowell ,  Bencherki Mebarki ,  Mehul Naik ,  Srinivas D. Nemani ,  Nikolaos Bekiaris ,  Zhiyuan Wu

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532

Abstract: An integrated circuit is fabricated by chemical vapor deposition or atomic layer deposition of a metal film to metal film.

公开(公告)号：US10297441B2

公开(公告)日：2019-05-21

申请号：US15674108

申请日：2017-08-10

Applicant: Applied Materials, Inc. ,  The Regents of the University of California

Inventor： Steven Wolf ,  Mary Edmonds ,  Andrew C. Kummel ,  Srinivas D. Nemani ,  Ellie Y. Yieh

IPC: H01L21/44 ,  H01L21/31 ,  H01L21/469 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L21/02 ,  H01L29/51 ,  C23C16/46 ,  C23C16/455 ,  C23C16/34

Abstract: Methods of the disclosure include a BN ALD process at low temperatures using a reactive nitrogen precursor, such as thermal N2H4, and a boron containing precursor, which allows for the deposition of ultra thin (less than 5 nm) films with precise thickness and composition control. Methods are self-limiting and provide saturating atomic layer deposition (ALD) of a boron nitride (BN) layer on various semiconductors and metallic substrates.

公开(公告)号：US10096512B2

公开(公告)日：2018-10-09

申请号：US15290005

申请日：2016-10-11

Applicant: Applied Materials, Inc.

Inventor： Erica Chen ,  Ludovic Godet ,  Srinivas D. Nemani ,  Ellie Y. Yieh

IPC: H01L21/768 ,  H01L21/3115 ,  H01L21/265 ,  H01L21/306 ,  H01L21/324 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/321

Abstract: Implementations described herein relate to methods for forming gap fill materials. After the gap fill material is deposited and before a CMP process is performed on the gap fill material, one or more ion implantation processes are utilized to treat the deposited gap fill material. The one or more ion implantation processes include implanting a first ion species in the gap fill material using a first ion energy, and then implanting a second ion species in the gap fill material using a second ion energy that's lower than the first ion energy. The one or more ion implantation processes minimize CMP dishing and improve recess profile.

公开(公告)号：US20180122679A1

公开(公告)日：2018-05-03

申请号：US15337973

申请日：2016-10-28

Applicant: APPLIED MATERIALS, INC.

Inventor： Shambhu N. Roy ,  Gautam Pisharody ,  Seshadri Ramaswami ,  Srinivas D. Nemani ,  Zhong Qiang Hua ,  Douglas A. Buchberger, JR. ,  Niranjan Kumar ,  Ellie Y. Yieh

IPC: H01L21/683 ,  H01L21/67

CPC classification number: H01L21/67248 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/6831 ,  H01L21/6835 ,  H01L21/68785 ,  H01L2021/6006 ,  H01L2221/68304

Abstract: A substrate carrier with contacts is described that is balanced for thermal stress. In one example workpiece carrier has a rigid substrate configured to support a workpiece to be carried for processing, a first dielectric layer over the substrate, an electrostatic conductive electrode over the first dielectric layer to electrostatically hold the workpiece to be carried, a second dielectric layer over the electrode to electrically isolate the workpiece from the electrode, and a third dielectric layer under the substrate to counter thermal stress applied to the substrate by the first and second dielectric layers.

公开(公告)号：US20180033673A1

公开(公告)日：2018-02-01

申请号：US15657190

申请日：2017-07-23

Applicant: APPLIED MATERIALS, INC.

Inventor： Srinivas D. Nemani ,  Shambhu N. Roy ,  Sultan Malik ,  Viachslav Babayan

IPC: H01L21/687 ,  H01L21/67 ,  H01L21/02

CPC classification number: H01L21/68735 ,  H01L21/02274 ,  H01L21/67098 ,  H01L21/68742 ,  H01L21/68764 ,  H01L21/68785

Abstract: Embodiments of methods and apparatus for processing a substrate are provided herein. In some embodiments, a substrate support includes a base having a first support surface designed to support a substrate having a given width; a plurality of arcuate slots formed through the base; a corresponding plurality of lift pins disposed through the arcuate slots, wherein the lift pins are rotationally and vertically movable with respect to the base; and a cover plate disposed on but not coupled to the base to cover the first support surface, wherein the cover plate has a diameter greater than the given width, and wherein the cover plate includes a second support surface designed to support a substrate having the given width.

公开(公告)号：US09829790B2

公开(公告)日：2017-11-28

申请号：US14733923

申请日：2015-06-08

Applicant: Applied Materials, Inc.

Inventor： Douglas A. Buchberger, Jr. ,  Sang Ki Nam ,  Viachslav Babayan ,  Christine Y. Ouyang ,  Ludovic Godet ,  Srinivas D. Nemani

IPC: G03F7/20 ,  G03F7/004 ,  G03F7/38

CPC classification number: G03F7/0045 ,  G03F7/38 ,  G03F7/70 ,  G03F7/70866

Abstract: Methods disclosed herein provide apparatus and method for applying an electric field and/or a magnetic field to a photoresist layer without air gap intervention during photolithography processes. In one embodiment, an apparatus includes a processing chamber comprising a substrate support having a substrate supporting surface, a heat source embedded in the substrate support configured to heat a substrate positioned on the substrate supporting surface, an electrode assembly configured to generate an electric field in a direction substantially perpendicular to the substrate supporting surface, wherein the electrode assembly is positioned opposite the substrate supporting surface having a downward surface facing the substrate supporting surface, wherein the electrode assembly is spaced apart from substrate support defining a processing volume between the electrode assembly and the substrate supporting surface, and a confinement ring disposed on an edge of the substrate support or the electrode assembly configured to retain an intermediate medium.

公开(公告)号：US20170203363A1

公开(公告)日：2017-07-20

申请号：US15324672

申请日：2015-07-08

Applicant: APPLIED MATERIALS ,INC.

Inventor： Christopher A. Rowland ,  Anantha K. Subramani ,  Kasiraman Krishnan ,  Kartik Ramaswamy ,  Thomas B. Brezoczky ,  Swaminathan Srinivasan ,  Jennifer Y. Sun ,  Simon Yavelberg ,  Srinivas D. Nemani ,  Nag B. Patibandla ,  Hou T. Ng

IPC: B22F3/00 ,  B33Y10/00 ,  H05B3/00 ,  B33Y50/02 ,  B23K10/02 ,  B23K10/00 ,  B28B1/00 ,  B33Y30/00

CPC classification number: B22F3/008 ,  B22F2003/1051 ,  B22F2003/1057 ,  B22F2998/10 ,  B23K10/006 ,  B23K10/027 ,  B28B1/001 ,  B29C64/153 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y50/02 ,  H05B3/0061

Abstract: An additive manufacturing system that includes a platen, a feed material delivery system configured to deliver feed material to a location on the platen specified by a computer aided design program and a heat source configured to raise a temperature of the feed material simultaneously across all of the layer or across a region that extends across a width of the platen and scans the region across a length of the platen. The heat source can be an array of heat lamps, or a plasma source.

公开(公告)号：US09548201B2

公开(公告)日：2017-01-17

申请号：US14730194

申请日：2015-06-03

Applicant: Applied Materials, Inc.

Inventor： Ying Zhang ,  Uday Mitra ,  Praburam Gopalraja ,  Srinivas D. Nemani ,  Hua Chung

IPC: H01L23/58 ,  H01L23/544 ,  H01L21/302 ,  H01L21/461 ,  H01L21/033 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L21/0332 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76816

Abstract: The present disclosure provides forming nanostructures with precision dimension control and minimum lithographic related errors for features with dimension under 14 nanometers and beyond. A self-aligned multiple spacer patterning (SAMSP) process is provided herein and the process utilizes minimum lithographic exposure process, but rather multiple deposition/etching process to incrementally reduce feature sizes formed in the mask along the manufacturing process, until a desired extreme small dimension nanostructures are formed in a mask layer.

Abstract translation: 本公开提供形成具有尺寸在14纳米以下的特征的精确尺寸控制和最小光刻相关误差的纳米结构。 本文提供了自对准多间隔图案（SAMSP）工艺，并且该工艺利用最小光刻曝光工艺，而是采用多次沉积/蚀刻工艺来逐渐减小沿制造工艺在掩模中形成的特征尺寸，直到期望的极小尺寸 在掩模层中形成纳米结构。