公开(公告)号：US07348211B2

公开(公告)日：2008-03-25

申请号：US11117158

申请日：2005-04-27

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。

公开(公告)号：US20060103014A1

公开(公告)日：2006-05-18

申请号：US11232612

申请日：2005-09-21

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; an encapsulant formed on the chip carrier and for encapsulating the chip, with a non-active surface of the chip being exposed from the encapsulant; and a heat spreader having a hollow portion and attached to the encapsulant, wherein the chip is received in the hollow portion and the non-active surface of the chip is completely exposed to the hollow portion, such that heat generated by the chip can be directly dissipated out of the package structure. The present invention also provides a method for fabricating the heat dissipating package structure.

摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 形成在所述芯片载体上并用于封装所述芯片的密封剂，所述芯片的非活性表面从所述密封剂暴露出来; 以及具有中空部分并附着到密封剂的散热器，其中芯片被容纳在中空部分中，并且芯片的非活动表面完全暴露于中空部分，使得芯片产生的热量可以直接 从包装结构中消散掉。 本发明还提供一种制造散热封装结构的方法。

公开(公告)号：US07019406B2

公开(公告)日：2006-03-28

申请号：US10635168

申请日：2003-08-05

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83385 ,  H01L2224/92224 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

摘要： A thermally enhanced semiconductor package and a fabrication method thereof are provided. A plurality of conductive bumps are formed on bond pads on an active surface of a chip. A heat sink is attached to an inactive surface of the chip and has a surface area larger than that of the chip. An encapsulation body encapsulates the heat sink, chip and conductive bumps, while exposing a bottom or surfaces, not for attaching the chip, of the heat sink and ends of the conductive bumps outside. A plurality of conductive traces are formed on the encapsulation body and electrically connected to the ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with a plurality of openings for exposing predetermined portions of the conductive traces. A solder ball is implanted on each exposed portion of the conductive traces.

摘要翻译： 提供一种热增强型半导体封装及其制造方法。 在芯片的有源表面上的接合焊盘上形成多个导电凸块。 散热器附着在芯片的非活性表面上，其表面积大于芯片的表面积。 封装体封装散热器，芯片和导电凸块，同时暴露散热片的底部或表面，而不是将散热片和导电凸块的端部外露。 多个导电迹线形成在封装主体上并电连接到导电凸块的端部。 焊接掩模层施加在导电迹线上并形成有多个用于暴露导电迹线的预定部分的开口。 在导电迹线的每个暴露部分上注入焊球。

公开(公告)号：US20050287707A1

公开(公告)日：2005-12-29

申请号：US11117158

申请日：2005-04-27

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31

CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。

公开(公告)号：US20050253284A1

公开(公告)日：2005-11-17

申请号：US10972200

申请日：2004-10-22

申请人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/13 ,  H01L23/28 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L23/49822 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on the second circuit layer. At least one first opening is formed on the first circuit layer corresponding to the second opening. A plurality of finger holes corresponding to bond fingers on the first circuit layer are formed in the core layer. A through opening is formed in the core layer and communicates with the first and second openings. At least one chip is mounted on the first circuit layer and covers the first opening, with its active surface being exposed to the first opening. An encapsulant is formed to fill the first and second openings and the through opening and encapsulate the chip.

摘要翻译： 提出了一种半导体封装及其制造方法。 提供了具有形成在第一和第二电路层之间的第一电路层，第二电路层和芯层的衬底。 在第二电路层上形成至少一个第二开口。 在对应于第二开口的第一电路层上形成至少一个第一开口。 在芯层中形成与第一电路层上的接合指状对应的多个指孔。 在芯层中形成通孔，并与第一和第二开口连通。 至少一个芯片安装在第一电路层上并且覆盖第一开口，其有源表面暴露于第一开口。 形成密封剂以填充第一和第二开口和通孔并封装芯片。

公开(公告)号：US06444498B1

公开(公告)日：2002-09-03

申请号：US09990752

申请日：2001-11-15

申请人： Chien Ping Huang ,  Tzong-Da Ho ,  Cheng-Hsu Hsiao

发明人： Chien Ping Huang ,  Tzong-Da Ho ,  Cheng-Hsu Hsiao

IPC分类号： H01L2144

CPC分类号： H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A method is provided of making a semiconductor package with a heat spreader in which a chip carrier module plate consisting of a plurality of array-arranged chip carriers is mounted with at least one chip on each of the chip carriers. A heat spreader module plate is attached to the chips, with an interface layer formed on a top surface of the heat spreader module plate. The chip carrier module plate, the chips and the heat spreader module plate are encapsulated. Adhesion force between the interface layer and the encapsulant is larger than that between the interface layer and the heat spreader module plate, and adhesion force between the interface layer and the heat spreader module plate is smaller than that between the heat spreader module plate and the encapsulant.

摘要翻译： 提供了一种制造具有散热器的半导体封装的方法，其中由多个阵列布置的芯片载体组成的芯片载体模块板在每个芯片载体上安装有至少一个芯片。 散热器模块板附接到芯片，其中界面层形成在散热器模块板的顶表面上。 芯片载体模块板，芯片和散热器模块板被封装。 界面层与密封剂之间的粘附力大于界面层与散热器模块板之间的粘合力，界面层与散热器模块板之间的粘合力小于散热器模块板与密封剂之间的粘附力 。

公开(公告)号：US20110287588A1

公开(公告)日：2011-11-24

申请号：US13195639

申请日：2011-08-01

申请人： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/56

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/48 ,  H01L25/03 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A heat-dissipating semiconductor package structure and a method for manufacturing the same is disclosed. The method includes: disposing on and electrically connecting to a chip carrier at least a semiconductor chip and a package unit; disposing on the top surface of the package unit a heat-dissipating element having a flat portion and a supporting portion via the flat portion; receiving the package unit and semiconductor chip in a receiving space formed by the flat portion and supporting portion of the heat-dissipating element; and forming on the chip carrier encapsulant for encapsulating the package unit, semiconductor chip, and heat-dissipating element. The heat-dissipating element dissipates heat generated by the package unit, provides EMI shielding, prevents delamination between the package unit and the encapsulant, decreases thermal resistance, and prevents cracking.

摘要翻译： 公开了一种散热半导体封装结构及其制造方法。 该方法包括：在至少半导体芯片和封装单元上布置并电连接到芯片载体; 在所述封装单元的顶表面上设置有经由所述平坦部分具有平坦部分和支撑部分的散热元件; 在由散热元件的平坦部分和支撑部分形成的接收空间中接收封装单元和半导体芯片; 以及在芯片载体密封剂上形成以封装封装单元，半导体芯片和散热元件。 散热元件消散封装单元产生的热量，提供EMI屏蔽，防止封装单元与密封剂之间的分层，降低热阻，防止开裂。

公开(公告)号：US20100233855A1

公开(公告)日：2010-09-16

申请号：US12788772

申请日：2010-05-27

申请人： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2924/00

摘要： A chip scale package structure and a method for fabricating the same are disclosed. The method includes forming metal pads on a predetermined part of a carrier; mounting chips on the carrier, each of the chips having a plurality of conductive bumps soldered to the metal pads; forming an encapsulant on the carrier to encapsulate the chips and the conductive bumps; removing the carrier to expose the metal pads and even the metal pads with a surface of the encapsulant; forming on the encapsulant a plurality of first conductive traces electrically connected to the metal pads; applying a solder mask on the first conductive traces, and forming a plurality of openings on the solder mask to expose a predetermined part of the first conductive traces; forming a plurality of conductive elements on the predetermined part; and cutting the encapsulant to form a plurality of chip scale package structures.

摘要翻译： 公开了一种芯片级封装结构及其制造方法。 该方法包括在载体的预定部分上形成金属垫; 在载体上安装芯片，每个芯片具有焊接到金属焊盘的多个导电凸块; 在载体上形成密封剂以封装芯片和导电凸块; 移除载体以暴露金属垫和甚至具有密封剂表面的金属垫; 在所述密封剂上形成电连接到所述金属焊盘的多个第一导电迹线; 在所述第一导电迹线上施加焊接掩模，以及在所述焊接掩模上形成多个开口以暴露所述第一导电迹线的预定部分; 在所述预定部分上形成多个导电元件; 以及切割所述密封剂以形成多个芯片级封装结构。

公开(公告)号：US07638879B2

公开(公告)日：2009-12-29

申请号：US11985662

申请日：2007-11-16

申请人： Yih-Jenn Jiang ,  Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Yih-Jenn Jiang ,  Han-Ping Pu ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3121 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming a conductive metallic layer in each through hole; forming a patterned circuit layer on the insulation layer to be electrically connected to the conductive metallic layer; mounting at least a chip on the insulation layer and electrically connecting the chip to the patterned circuit layer; forming an encapsulant to encapsulate the chip and the patterned circuit layer; and removing the metal carrier and the sacrificial layer to expose the insulation layer and conductive metallic layer to allow the conductive metallic layer to protrude from the insulation layer. In the present invention, the distance between the semiconductor package and the external device is increased, and thermal stress caused by difference between the thermal expansion coefficients is reduced, so as to enhance the reliability of the product.

摘要翻译： 公开了半导体封装和制造方法。 制造方法包括在金属载体的一个表面上施加牺牲层，在牺牲层上施加绝缘层，以及在牺牲层和绝缘层中形成通孔以露出金属载体; 在每个通孔中形成导电金属层; 在所述绝缘层上形成图案化电路层，以电连接到所述导电金属层; 将至少一个芯片安装在所述绝缘层上并将所述芯片电连接到所述图案化电路层; 形成密封剂以封装所述芯片和所述图案化电路层; 并且去除金属载体和牺牲层以暴露绝缘层和导电金属层，以允许导电金属层从绝缘层突出。 在本发明中，半导体封装和外部器件之间的距离增加，由于热膨胀系数之差导致的热应力降低，从而提高了产品的可靠性。

公开(公告)号：US20080213942A1

公开(公告)日：2008-09-04

申请号：US12074321

申请日：2008-03-03

申请人： Min-Shun Hung ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Wen-Tsung Tseng ,  Cheng-Hsu Hsiao

发明人： Min-Shun Hung ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Wen-Tsung Tseng ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/12 ,  H05K7/00

CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/16 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

摘要： This invention provides a method for fabricating a semiconductor device and a carrier applied therein. The method includes the steps of: disposing a chip-mounted substrate in an opening of a carrier; forming at least a storage aperture and at least an inspection aperture in the carrier; infusing an adhesive into the storage aperture to fill a gap between the substrate and carrier with the adhesive by capillarity; determining whether the inspection aperture is filled with the adhesive to ascertain whether the gap is completely filled with the adhesive; in response to a positive result, performing a molding process to form a molding compound for encapsulating the chip; and performing implantation of solder ball and a singulation process to form a semiconductor device with desirable dimensions. The inspection aperture is inspected with a naked eye to determine whether the gap is completely filled with the adhesive, thereby reducing inspection costs and increasing yields of products with no additional packaging costs.

摘要翻译： 本发明提供一种用于制造应用于其中的半导体器件和载体的方法。 该方法包括以下步骤：将芯片安装的基板设置在载体的开口中; 在所述载体中至少形成存储孔径和至少一个检查孔; 将粘合剂注入到存储孔中，以通过毛细管力用粘合剂填充基底和载体之间的间隙; 确定检查孔是否填充有粘合剂以确定间隙是否完全被粘合剂填充; 响应于积极的结果，进行成型处理以形成用于封装芯片的模塑料; 并且执行焊球的注入和单一化处理以形成具有所需尺寸的半导体器件。 检查孔径用肉眼检查以确定间隙是否完全充满粘合剂，从而降低检查成本并提高产品的产量，而不需要额外的包装成本。