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    Method for fabricating semiconductor packages
    1.
    发明授权
    Method for fabricating semiconductor packages 有权
    半导体封装的制造方法

    公开(公告)号：US07348211B2

    公开(公告)日：2008-03-25

    申请号：US11117158

    申请日：2005-04-27

    申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44

    CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

    摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。

    Method for fabricating semiconductor packages
    2.
    发明申请
    Method for fabricating semiconductor packages 有权
    半导体封装的制造方法

    公开(公告)号：US20050287707A1

    公开(公告)日：2005-12-29

    申请号：US11117158

    申请日：2005-04-27

    申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31

    CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

    摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。

    Method for fabricating semiconductor packages, and structure and method for positioning semiconductor components
    5.
    发明申请
    Method for fabricating semiconductor packages, and structure and method for positioning semiconductor components 审中-公开
    制造半导体封装的方法以及用于定位半导体元件的结构和方法

    公开(公告)号：US20070141761A1

    公开(公告)日：2007-06-21

    申请号：US11703517

    申请日：2007-02-06

    申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/00

    CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A method for fabricating semiconductor packages includes the steps of: providing a plurality of substrates and a carrier having a plurality of openings, wherein, each of the substrates has at least one chip (die) disposed thereon, length and width of the substrates are approximately equal to the predefined length and width of semiconductor packages, and length and width of the openings of the carrier are bigger than length and width of the substrates; respectively positioning the substrates in the openings of the carrier and blocking the gaps between the substrates and the carrier so as to prevent the gaps from penetrating through the carrier; performing a mold press process so as to form an encapsulant on each of the openings for encapsulating the chip, wherein length and width of the area covered by the encapsulant are bigger than length and width of the opening; performing a mold releasing process; and cutting along edges of the substrates according to the predefined length and width of semiconductor packages, thereby obtaining a plurality of semiconductor packages. The present invention also discloses a structure and method for positioning the substrates.

    摘要翻译： 一种制造半导体封装的方法包括以下步骤：提供多个基板和具有多个开口的载体，其中每个基板具有设置在其上的至少一个芯片（芯片），基板的长度和宽度大致为 等于半导体封装的预定长度和宽度，载体的开口的长度和宽度大于基板的长度和宽度; 分别将基板定位在载体的开口中并阻挡基板和载体之间的间隙，以防止间隙穿透载体; 进行模压加工，以在封装芯片的每个开口上形成密封剂，其中由密封剂覆盖的区域的长度和宽度大于开口的长度和宽度; 执行脱模工艺; 并且根据半导体封装的预定长度和宽度切割基板的边缘，从而获得多个半导体封装。 本发明还公开了一种用于定位基板的结构和方法。

    METHOD FOR MANUFACTURING HEAT-DISSIPATING SEMICONDUCTOR PACKAGE STRUCTURE
    6.
    发明申请
    METHOD FOR MANUFACTURING HEAT-DISSIPATING SEMICONDUCTOR PACKAGE STRUCTURE 审中-公开
    制造散热半导体封装结构的方法

    公开(公告)号：US20110287588A1

    公开(公告)日：2011-11-24

    申请号：US13195639

    申请日：2011-08-01

    申请人： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/56

    CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/48 ,  H01L25/03 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A heat-dissipating semiconductor package structure and a method for manufacturing the same is disclosed. The method includes: disposing on and electrically connecting to a chip carrier at least a semiconductor chip and a package unit; disposing on the top surface of the package unit a heat-dissipating element having a flat portion and a supporting portion via the flat portion; receiving the package unit and semiconductor chip in a receiving space formed by the flat portion and supporting portion of the heat-dissipating element; and forming on the chip carrier encapsulant for encapsulating the package unit, semiconductor chip, and heat-dissipating element. The heat-dissipating element dissipates heat generated by the package unit, provides EMI shielding, prevents delamination between the package unit and the encapsulant, decreases thermal resistance, and prevents cracking.

    摘要翻译： 公开了一种散热半导体封装结构及其制造方法。 该方法包括：在至少半导体芯片和封装单元上布置并电连接到芯片载体; 在所述封装单元的顶表面上设置有经由所述平坦部分具有平坦部分和支撑部分的散热元件; 在由散热元件的平坦部分和支撑部分形成的接收空间中接收封装单元和半导体芯片; 以及在芯片载体密封剂上形成以封装封装单元，半导体芯片和散热元件。 散热元件消散封装单元产生的热量，提供EMI屏蔽，防止封装单元与密封剂之间的分层，降低热阻，防止开裂。

    Method for fabricating semiconductor device and carrier applied therein
    7.
    发明申请
    Method for fabricating semiconductor device and carrier applied therein 审中-公开
    制造应用于其中的半导体器件和载体的方法

    公开(公告)号：US20080213942A1

    公开(公告)日：2008-09-04

    申请号：US12074321

    申请日：2008-03-03

    申请人： Min-Shun Hung ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Wen-Tsung Tseng ,  Cheng-Hsu Hsiao

    发明人： Min-Shun Hung ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Wen-Tsung Tseng ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/12 ,  H05K7/00

    CPC分类号： H01L23/3128 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/16 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

    摘要： This invention provides a method for fabricating a semiconductor device and a carrier applied therein. The method includes the steps of: disposing a chip-mounted substrate in an opening of a carrier; forming at least a storage aperture and at least an inspection aperture in the carrier; infusing an adhesive into the storage aperture to fill a gap between the substrate and carrier with the adhesive by capillarity; determining whether the inspection aperture is filled with the adhesive to ascertain whether the gap is completely filled with the adhesive; in response to a positive result, performing a molding process to form a molding compound for encapsulating the chip; and performing implantation of solder ball and a singulation process to form a semiconductor device with desirable dimensions. The inspection aperture is inspected with a naked eye to determine whether the gap is completely filled with the adhesive, thereby reducing inspection costs and increasing yields of products with no additional packaging costs.

    摘要翻译： 本发明提供一种用于制造应用于其中的半导体器件和载体的方法。 该方法包括以下步骤：将芯片安装的基板设置在载体的开口中; 在所述载体中至少形成存储孔径和至少一个检查孔; 将粘合剂注入到存储孔中，以通过毛细管力用粘合剂填充基底和载体之间的间隙; 确定检查孔是否填充有粘合剂以确定间隙是否完全被粘合剂填充; 响应于积极的结果，进行成型处理以形成用于封装芯片的模塑料; 并且执行焊球的注入和单一化处理以形成具有所需尺寸的半导体器件。 检查孔径用肉眼检查以确定间隙是否完全充满粘合剂，从而降低检查成本并提高产品的产量，而不需要额外的包装成本。

    Heat dissipating semiconductor package and heat dissipating structure thereof
    8.
    发明申请
    Heat dissipating semiconductor package and heat dissipating structure thereof 审中-公开
    散热半导体封装及其散热结构

    公开(公告)号：US20080017977A1

    公开(公告)日：2008-01-24

    申请号：US11801625

    申请日：2007-05-10

    申请人： Wen-Tsung Tseng ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    发明人： Wen-Tsung Tseng ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/34

    CPC分类号： H01L23/4334 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A heat dissipating semiconductor package and a heat dissipating structure thereof are provided. The heat dissipating structure includes an outer surface, consecutive recessed step portions, and a pressure-releasing groove. The outer surface is exposed from an encapsulant made of a molding compound. The step portions are formed at an edge of the outer surface and have decreasing depths wherein the closer a step portion to a central position of the outer surface, the smaller the depth of this step portion is. The pressure-releasing groove is disposed next to and deeper than the innermost one of the step portions. A molding compound flows to the step portions and absorbs heat from an encapsulation mold quickly, such that a flowing speed of the molding compound is reduced. Pressure suffered by air remaining at the step portions is released through the pressure-releasing groove, thereby preventing flashes of the molding compound and resin bleeding.

    摘要翻译： 提供散热半导体封装及其散热结构。 散热结构包括外表面，连续凹进的台阶部分和压力释放槽。 外表面从由模塑料制成的密封剂暴露。 台阶部分形成在外表面的边缘处并且具有减小的深度，其中台阶部分越接近外表面的中心位置，该阶梯部分的深度越小。 压力释放槽设置在步骤部分的最内侧之上并深度。 模塑料流到台阶部分并迅速从封装模具吸收热量，从而降低模塑料的流动速度。 通过压力释放槽释放在台阶部分残留的空气所产生的压力，从而防止模塑料的闪烁和树脂渗色。

    Heat dissipation semiconductor package
    10.
    发明授权
    Heat dissipation semiconductor package 有权
    散热半导体封装

    公开(公告)号：US07608915B2

    公开(公告)日：2009-10-27

    申请号：US12151902

    申请日：2008-05-08

    申请人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    发明人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/495 ,  H01J23/10

    CPC分类号： H01L23/4334 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

    摘要： A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.

    摘要翻译： 散热半导体封装包括芯片载体，半导体芯片，导热粘合剂，散热构件和密封剂。 半导体芯片倒装芯片安装在芯片载体上，并用导热粘合剂安装区域限定。 热粘合剂安装区域的周边与半导体芯片的边缘间隔开。 散热构件安装在形成在导热粘合剂安装区域中的导热粘合剂上。 形成在芯片载体和散热构件之间的密封剂封装半导体芯片和导热粘合剂，并且嵌入半导体芯片的有源表面和非有源表面和侧边缘的边缘，从而增加密封剂和 半导体芯片。 导热粘合剂和半导体芯片的侧边缘彼此不齐平，从而防止分层的蔓延。