公开(公告)号：US5192714A

公开(公告)日：1993-03-09

申请号：US654895

申请日：1991-02-13

申请人： Kyoichi Suguro ,  Haruo Okano

发明人： Kyoichi Suguro ,  Haruo Okano

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/762 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/78

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02208 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/31608 ,  H01L21/76879 ,  Y10S148/117

摘要： A method of manufacturing a semiconductor device includes the steps of forming a first insulating layer having a hole on a substrate, selectively forming a conductive layer in the hole, selectively forming a second insulating layer on the first insulating layer, patterning the second insulating layer, and forming an interconnection layer in an opening portion of the second insulating layer formed by patterning so as to be electrically connected to the conductive layer.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在衬底上形成具有孔的第一绝缘层，在孔中选择性地形成导电层，在第一绝缘层上选择性地形成第二绝缘层，图案化第二绝缘层， 以及在通过图案化形成的第二绝缘层的开口部分中形成互连层，从而与导电层电连接。

公开(公告)号：US5189503A

公开(公告)日：1993-02-23

申请号：US683132

申请日：1991-04-10

申请人： Kyoichi Suguro ,  Keitaro Imai ,  Mitsutoshi Koyama ,  Kikuo Yamabe

发明人： Kyoichi Suguro ,  Keitaro Imai ,  Mitsutoshi Koyama ,  Kikuo Yamabe

IPC分类号： H01L21/02 ,  H01L21/316 ,  H01L27/108 ,  H01L29/92

CPC分类号： H01L27/10808 ,  H01L28/40 ,  H01L21/31604

摘要： A dielectric insulation film consists of a metal oxide and pieces of dissimilar metal element added to the metal oxide. A positive charge number under an ionized state of the dissimilar metal element is smaller by one than that of the metal oxide. An ionic charge number of the dissimilar metal element is of a predetermined one kind. The dielectric insulation film is formed as an insulation film of capacitor of each cell of a semiconductor device according to a chemical vapor deposition (CVD) method in the process of forming cells of the semiconductor device.

摘要翻译： 介电绝缘膜由金属氧化物和添加到金属氧化物中的异种金属元素组成。 异种金属元素的离子化状态下的正电荷数小于金属氧化物的正电荷数。 异种金属元素的离子电荷数是预定的一种。 在形成半导体器件的电池的工艺中，根据化学气相沉积（CVD）方法，将介电绝缘膜形成为半导体器件的每个电池的电容器的绝缘膜。

公开(公告)号：US4959745A

公开(公告)日：1990-09-25

申请号：US319342

申请日：1989-03-06

申请人： Kyoichi Suguro

发明人： Kyoichi Suguro

IPC分类号： H01L27/08 ,  H01G4/008 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/76 ,  H01L21/822 ,  H01L23/52 ,  H01L27/04 ,  H01L27/108

CPC分类号： H01G4/008 ,  H01L28/40 ,  H01L2924/0002 ,  Y10T29/435

摘要： A capacitor including a dielectric film of a metal oxide, in which two electrodes contact with the surfaces of the dielectric film, and at least one of the electrodes is a conductive metal compound to which oxygen is added. A method for producing the capacitor is also disclosed.

摘要翻译： 一种电容器，包括金属氧化物的电介质膜，其中两个电极与电介质膜的表面接触，并且至少一个电极是添加有氧的导电金属化合物。 还公开了一种用于制造电容器的方法。

公开(公告)号：US4662949A

公开(公告)日：1987-05-05

申请号：US762374

申请日：1985-08-05

申请人： Tomoyasu Inoue ,  Hiroyuki Tango ,  Kyoichi Suguro ,  Iwao Higashinakagawa ,  Toshihiko Hamasaki

发明人： Tomoyasu Inoue ,  Hiroyuki Tango ,  Kyoichi Suguro ,  Iwao Higashinakagawa ,  Toshihiko Hamasaki

IPC分类号： H01L21/20 ,  H01L21/263 ,  H01L21/208

CPC分类号： H01L21/2636 ,  H01L21/2022 ,  Y10S148/093

摘要： In an apparatus for forming a single crystal semiconductor layer from a non-single-crystalline semiconductor material by scanning a region of the material with an electron beam, a first pair of deflection electrodes and a second pair of deflection electrodes, both pairs being provided in the path of the electron beam. A deflection signal generated by modifying the amplitude of a high-frequency fundamental wave signal with a modulation wave signal having a frequency lower than that of the high-frequency fundamental wave signal is supplied to the deflection electrodes of the first pair. The electrodes rapidly deflect the electron beam in a first direction, while changing the range of deflecting the beam, thereby forming a locus of the beam spot on the sample. Simultaneously, the deflection electrodes of the second pair deflect the beam in a second direction, thereby annealing a region of the material, to form a single crystal semiconductor layer.

摘要翻译： 在通过用电子束扫描材料区域从非单晶半导体材料形成单晶半导体层的装置中，第一对偏转电极和第二对偏转电极设置在 电子束的路径。 通过用频率低于高频基波信号的调制波信号改变高频基波信号的振幅而产生的偏转信号被提供给第一对的偏转电极。 电极在第一方向上快速偏转电子束，同时改变偏转光束的范围，从而在样品上形成束斑的轨迹。 同时，第二对的偏转电极在第二方向上偏转光束，从而退火材料的区域，以形成单晶半导体层。

公开(公告)号：US08741161B2

公开(公告)日：2014-06-03

申请号：US13428535

申请日：2012-03-23

申请人： Yasuyuki Sonoda ,  Kyoichi Suguro ,  Masatoshi Yoshikawa ,  Koji Yamakawa ,  Katsuaki Natori ,  Daisuke Ikeno

发明人： Yasuyuki Sonoda ,  Kyoichi Suguro ,  Masatoshi Yoshikawa ,  Koji Yamakawa ,  Katsuaki Natori ,  Daisuke Ikeno

IPC分类号： H01L21/302

CPC分类号： H01L21/31053 ,  H01L27/228 ,  H01L43/12

摘要： According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.

摘要翻译： 根据一个实施方案，一种制造半导体器件的方法，该方法包括在基底层上形成柱，在基底层上形成绝缘层以通过GCIB法覆盖柱，其中上表面的最下部分 绝缘层低于柱的上表面，并且通过使用CMP方法研磨绝缘层和柱以露出柱的头部，其中抛光的终点是上表面的最下部 绝缘层。

公开(公告)号：US20130069195A1

公开(公告)日：2013-03-21

申请号：US13419882

申请日：2012-03-14

申请人： Kyoichi Suguro

发明人： Kyoichi Suguro

IPC分类号： H01L21/762 ,  H01L29/12

CPC分类号： H01L21/76254

摘要： According to one embodiment, a fabrication method for a semiconductor device includes: injecting an ion into a first substrate; joining the first substrate and a second substrate; irradiating a microwave to agglomerate the ion in a planar state in a desired position in the first substrate and form an agglomeration region spreading in a planar state; separating the second substrate provided with a part of the first substrate from the rest of the first substrate by exfoliating the joined first substrate from the second substrate in the agglomeration region; and grinding a part of the second substrate on a back surface opposite to an exfoliated surface in the second substrate provided with a part of the first substrate.

摘要翻译： 根据一个实施例，一种用于半导体器件的制造方法包括：将离子注入第一衬底; 接合第一基板和第二基板; 照射微波以使平面状态的离子在第一基板中的期望位置聚集，并形成在平面状态下扩散的聚集区域; 通过将结合的第一基板从附聚区域中的第二基板剥离而将设置有第一基板的一部分的第二基板与第一基板的其余部分分离; 以及在设置有所述第一基板的一部分的所述第二基板中的与所述剥离表面相对的背面上研磨所述第二基板的一部分。

公开(公告)号：US08211785B2

公开(公告)日：2012-07-03

申请号：US11819776

申请日：2007-06-29

申请人： Takaharu Itani ,  Takayuki Ito ,  Kyoichi Suguro

发明人： Takaharu Itani ,  Takayuki Ito ,  Kyoichi Suguro

IPC分类号： H01L21/425

CPC分类号： H01L21/26533 ,  H01L21/324 ,  H01L29/6659

摘要： A shallow p-n junction diffusion layer having a high activation rate of implanted ions, low resistivity, and a controlled leakage current is formed through annealing. Annealing after impurities have been doped is carried out through light irradiation. Those impurities are activated by annealing at least twice through light irradiation after doping impurities to a semiconductor substrate 11. The light radiations are characterized by usage of a W halogen lamp RTA or a flash lamp FLA except for the final light irradiation using a flash lamp FLA. Impurity diffusion may be controlled to a minimum, and crystal defects, which have developed in an impurity doping process, may be sufficiently reduced when forming ion implanted layers in a source and a drain extension region of the MOSFET or ion implanted layers in a source and a drain region.

摘要翻译： 通过退火形成具有注入离子的高激活速率，低电阻率和受控的漏电流的浅p-n结扩散层。 通过光照射进行杂质掺杂后的退火。 这些杂质通过在将杂质掺杂到半导体衬底11之后通过光照射退火至少两次来激活。光辐射的特征在于使用W卤素灯RTA或闪光灯FLA，除了使用闪光灯FLA的最终光照射 。 杂质扩散可以被控制到最小，并且当在源的源极和漏极延伸区域中形成离子注入层时，或者在源中的离子注入层形成离子注入层时，杂质掺杂过程中已经形成的晶体缺陷可以被充分地减小，以及 漏极区域。

公开(公告)号：US07989903B2

公开(公告)日：2011-08-02

申请号：US12757658

申请日：2010-04-09

申请人： Takayuki Ito ,  Kyoichi Suguro ,  Kouji Matsuo

发明人： Takayuki Ito ,  Kyoichi Suguro ,  Kouji Matsuo

IPC分类号： H01L21/02

CPC分类号： H01L21/823857 ,  H01L21/823814 ,  H01L21/823842

摘要： A semiconductor device includes a semiconductor region, a source region, a drain region, a source extension region a drain extension region, a first gate insulation film, a second gate insulation film, and a gate electrode. The source region, drain region, source extension region and drain extension region are formed in a surface portion of the semiconductor region. The first gate insulation film is formed on the semiconductor region between the source extension region and the drain extension region. The first gate insulation film is formed of a silicon oxide film or a silicon oxynitride film having a nitrogen concentration of 15 atomic % or less. The second gate insulation film is formed on the first gate insulation film and contains nitrogen at a concentration of between 20 atomic % and 57 atomic %. The gate electrode is formed on the second gate insulation film.

摘要翻译： 半导体器件包括半导体区域，源极区域，漏极区域，源极延伸区域，漏极延伸区域，第一栅极绝缘膜，第二栅极绝缘膜和栅极电极。 源极区域，漏极区域，源极延伸区域和漏极延伸区域形成在半导体区域的表面部分中。 第一栅极绝缘膜形成在源极延伸区域和漏极延伸区域之间的半导体区域上。 第一栅极绝缘膜由氮浓度为15原子％以下的氧化硅膜或氮氧化硅膜形成。 第二栅极绝缘膜形成在第一栅极绝缘膜上，并且含有浓度为20原子％至57原子％之间的氮。 栅电极形成在第二栅绝缘膜上。

公开(公告)号：US20100055859A1

公开(公告)日：2010-03-04

申请号：US12591085

申请日：2009-11-06

申请人： Takayuki Ito ,  Toshihiko Iinuma ,  Kyoichi Suguro

发明人： Takayuki Ito ,  Toshihiko Iinuma ,  Kyoichi Suguro

IPC分类号： H01L21/336 ,  H01L21/425

CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/2686 ,  H01L29/6653 ,  H01L29/66575 ,  H01L29/6659

摘要： Disclosed is a method for manufacturing a semiconductor device comprising implanting ions of an impurity element into a semiconductor region, implanting, into the semiconductor region, ions of a predetermined element which is a group IV element or an element having the same conductivity type as the impurity element and larger in mass number than the impurity element, and irradiating a region into which the impurity element and the predetermined element are implanted with light to anneal the region, the light having an emission intensity distribution, a maximum point of the distribution existing in a wavelength region of not more than 600 nm.

摘要翻译： 公开了一种制造半导体器件的方法，包括将杂质元素的离子注入到半导体区域中，将作为IV族元素的预定元素或与杂质相同的导电类型的元素的离子注入半导体区域 元素，并且质量数大于杂质元素，并且用光照射杂质元素和预定元素被注入的区域以使该区域退火，该光具有发光强度分布，存在于a的分布的最大点 波长区域不大于600nm。

公开(公告)号：US20090206379A1

公开(公告)日：2009-08-20

申请号：US12389266

申请日：2009-02-19

申请人： Soichirou Kitazaki ,  Hideaki Aochi ,  Kyoichi Suguro

发明人： Soichirou Kitazaki ,  Hideaki Aochi ,  Kyoichi Suguro

IPC分类号： H01L25/00 ,  H01L21/00 ,  H01L29/66 ,  H01L21/336

CPC分类号： H01L21/76831 ,  G11C11/22 ,  H01G4/1245 ,  H01G4/1254 ,  H01G4/33 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/31691 ,  H01L21/3185 ,  H01L23/485 ,  H01L23/5226 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  H01L29/665 ,  H01L29/66575 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device which can prevent the degradation of contact yield even when subjected to a high-temperature and long-time thermal process, and a manufacturing method thereof are provided. The semiconductor device includes: a first semiconductor circuit formed on a semiconductor substrate; a second semiconductor circuit formed above the first semiconductor circuit; an interlayer insulating film formed between the first semiconductor circuit and the second semiconductor circuit; and a contact plug formed in a state of penetrating the interlayer insulating film, the contact plug including a contact plug body made up of a conductor, and a contact plug coating which is insulating and which covers at least a portion of a side face of the contact plug body in contact with the interlayer insulating film.

摘要翻译： 提供即使经受高温长时间热处理也能够防止接触性降低的半导体装置及其制造方法。 半导体器件包括：形成在半导体衬底上的第一半导体电路; 形成在所述第一半导体电路之上的第二半导体电路; 形成在所述第一半导体电路和所述第二半导体电路之间的层间绝缘膜; 以及以穿透层间绝缘膜的状态形成的接触塞，所述接触插塞包括由导体构成的接触插塞体和绝缘的接触塞涂层，并且覆盖所述接触插塞的侧面的至少一部分 接触插塞体与层间绝缘膜接触。