公开(公告)号：US5489542A

公开(公告)日：1996-02-06

申请号：US91921

申请日：1993-07-16

Applicant: Hiroshi Iwai ,  Toyota Morimoto ,  Hisayo S. Momose ,  Kikuo Yamabe ,  Yoshio Ozawa

Inventor： Hiroshi Iwai ,  Toyota Morimoto ,  Hisayo S. Momose ,  Kikuo Yamabe ,  Yoshio Ozawa

IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/51 ,  H01L21/265 ,  H01L21/02 ,  H01L21/70 ,  H01L27/00

CPC classification number: H01L21/28185 ,  H01L21/28202 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66575 ,  H01L21/28211

Abstract: A method for fabricating a semiconductor device on a silicon substrate, consists of producing a silicon oxide film on the silicon substrate producing a thin silicon nitride film on the silicon oxide film, thermally nitriding the silicon nitride film in an atmosphere of nitrogenous gas, producing a conductive film on the silicon nitride film nitrided in the atmosphere of the nitrogenous gas, producing a gate region from the silicon oxide film, the silicon nitride film, and the conductive film, a channel region being positioned under the gate region in the silicon substrate, producing a source region in the silicon substrate adjacent to one side of the channel region, producing a drain region in the silicon substrate adjacent to another side of the channel region, and producing wiring regions on the source region, the drain region, and the gate region.

Abstract translation: 一种在硅衬底上制造半导体器件的方法，包括在硅衬底上产生氧化硅膜，在氧化硅膜上产生薄的氮化硅膜，在氮气气氛中氮化氮化硅膜， 氮化硅膜上的导电膜在氮气气氛中氮化，从硅氧化膜，氮化硅膜和导电膜产生栅极区，沟道区位于硅衬底的栅极区下方， 在所述硅衬底中邻近所述沟道区的一侧产生源极区，在所述硅衬底中与所述沟道区的另一侧相邻的漏极区产生，并且在所述源极区，所述漏极区和所述栅极上产生布线区 地区。

公开(公告)号：US5360748A

公开(公告)日：1994-11-01

申请号：US007876

申请日：1993-01-22

Applicant: Soichi Nadahara ,  Kikuo Yamabe

Inventor： Soichi Nadahara ,  Kikuo Yamabe

IPC: H01L21/322 ,  H01L21/306

CPC classification number: H01L21/3221 ,  Y10S148/06

Abstract: A method of manufacturing a semiconductor device, which comprises the steps of providing a semiconductor substrate having a first primary surface which is designated to form the semiconductor device and a second primary surface opposite from the first primary surface, the substrate containing contaminants therein; forming a boron-doped layer on the second primary surface of the substrate; and absorbing the contaminants into the boron-doped layer.

Abstract translation: 一种制造半导体器件的方法，包括以下步骤：提供半导体衬底，所述半导体衬底具有指定为形成所述半导体器件的第一主表面和与所述第一主表面相对的第二主表面，所述衬底中含有污染物; 在所述衬底的所述第二主表面上形成硼掺杂层; 并将污染物吸收到硼掺杂层中。

公开(公告)号：US5297956A

公开(公告)日：1994-03-29

申请号：US799931

申请日：1991-11-29

Applicant: Kikuo Yamabe ,  Keitaro Imai ,  Katsuya Okumura ,  Ken Nakao ,  Seikou Ueno

Inventor： Kikuo Yamabe ,  Keitaro Imai ,  Katsuya Okumura ,  Ken Nakao ,  Seikou Ueno

IPC: H01L21/324 ,  C30B31/12 ,  C30B31/14 ,  H01L21/22 ,  H01L21/31 ,  H01L21/673 ,  H01L21/683 ,  F23D5/00

CPC classification number: C30B31/12 ,  C30B31/14

Abstract: A method and an apparatus for heat treating in a heat treating apparatus having a heating chamber to be introduced with predetermined gas, a heater disposed around the heating chamber, and jigs disposed in the heating chamber for supporting wafers of a plurality of substrates to be treated in parallel with each other, wherein in order to make the temperature distribution of the wafers of the substrates to be treated in the radial direction uniform in the heat treatment, the jigs are formed to determine the sizes and the shape thereof in predetermined ranges having a gradient according to the heat treating method having a predetermined shape determining procedure so that the jigs are formed in ring-shaped trays (i.e. support-ring) for holding at the peripheries the substrates to be treated and the thickness of the tray is constant or such that the outer peripheral side thereof is thicker than the inner peripheral side thereof.

Abstract translation: 一种热处理装置中的热处理方法和装置，其特征在于，具有要加入预定气体的加热室，设置在所述加热室周围的加热器和设置在所述加热室中的夹具，用于支撑待处理的多个基板的晶片 彼此并联，其中为了使热处理中要处理的基板的晶片的温度分布均匀，形成夹具以确定其尺寸和形状，其具有在 根据具有预定形状确定步骤的热处理方法的梯度，使得夹具形成为环状托盘（即，支撑环），用于在周边保持要处理的基板，并且托盘的厚度等于或等于 其外周侧比其内周侧厚。

公开(公告)号：US20110039418A1

公开(公告)日：2011-02-17

申请号：US12865969

申请日：2009-02-06

Applicant: Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

Inventor： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

IPC: H01L21/31 ,  C23C16/40

CPC classification number: H01L21/3105 ,  C23C16/0272 ,  C23C16/402 ,  C23C16/45565 ,  C23C16/511 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/28008 ,  H01L21/31612 ,  H01L21/31654 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/66765

Abstract: In order to form an insulating film, which constitutes a flat interface with silicon, by CVD, a surface of silicon is oxidized to form a silicon oxide film using a plasma treatment apparatus in which microwaves are introduced into a chamber through a flat antenna having a plurality of holes. A silicon oxide film is formed as an insulating film on the silicon oxide film by CVD. Further, in the plasma treatment apparatus, a treating gas containing a noble gas and oxygen is introduced into the chamber, and, further, microwaves are introduced into the chamber through the flat antenna. Plasma is generated under a pressure in the range of not less than 6.7 Pa and not more than 533 Pa to modify the insulating film with the plasma.

Abstract translation: 为了通过CVD形成与硅形成平坦界面的绝缘膜，使用等离子体处理装置将硅的表面氧化形成氧化硅膜，其中微波通过具有 多个孔。 通过CVD在氧化硅膜上形成氧化硅膜作为绝缘膜。 此外，在等离子体处理装置中，将含有惰性气体和氧气的处理气体引入室内，并且还通过平板天线将微波引入室内。 在不低于6.7Pa且不大于533Pa的压力下产生等离子体，以便用等离子体改性绝缘膜。

公开(公告)号：US5757063A

公开(公告)日：1998-05-26

申请号：US730322

申请日：1996-10-11

Applicant: Hiroshi Tomita ,  Mami Takahashi ,  Kikuo Yamabe

Inventor： Hiroshi Tomita ,  Mami Takahashi ,  Kikuo Yamabe

IPC: H01L21/322

CPC classification number: H01L21/3225 ,  H01L21/3221 ,  Y10S257/913

Abstract: A semiconductor device includes a semiconductor substrate having first and second main surfaces and including a denuded zone, in which an oxygen concentration is lower than that in an inner portion of the semiconductor substrate and which does not include a bulk microdefect, and an intrinsic gettering zone, and element region formed on the first surface of the semiconductor substrate, and an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, and formed directly on at least a portion of the intrinsic gettering region or the denuded zone entirely or partially thinned of the second main surface of the semiconductor substrate. A method for manufacturing a semiconductor device includes the steps of forming an element region on a first main surface of a semiconductor substrate having first and second main surfaces and having an intrinsic gettering zone, and forming an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, directly on at least a portion of the intrinsic gettering region of the second main surface of the semiconductor substrate.

Abstract translation: 一种半导体器件包括具有第一和第二主表面并且包括其中氧浓度低于半导体衬底的内部部分且不包括体微缺陷的溶解区的半导体衬底，以及固有的吸杂区 以及形成在半导体衬底的第一表面上的元件区域和由非晶半导体材料制成的非固有吸杂层，其捕获金属杂质，并且直接在至少一部分本征吸气区域或裸露区域上形成 或部分地薄化半导体衬底的第二主表面。 一种制造半导体器件的方法包括以下步骤：在具有第一和第二主表面并具有固有吸气区的半导体衬底的第一主表面上形成元件区，并形成由非晶半导体材料制成的外部吸气层 其直接在半导体衬底的第二主表面的固有吸气区的至少一部分上捕获金属杂质。

公开(公告)号：US5698891A

公开(公告)日：1997-12-16

申请号：US667884

申请日：1996-06-20

Applicant: Hiroshi Tomita ,  Mami Saito ,  Kikuo Yamabe

Inventor： Hiroshi Tomita ,  Mami Saito ,  Kikuo Yamabe

IPC: H01L21/322 ,  H01L29/32 ,  H01L21/38 ,  H01L29/36

CPC classification number: H01L21/3221 ,  H01L21/3225 ,  H01L29/32 ,  Y10S257/913

Abstract: A semiconductor device includes a semiconductor substrate having first and second main surfaces and including a denuded zone, in which an oxygen concentration is lower than that in an inner portion of the semiconductor substrate and which does not include a bulk microdefect, and an intrinsic gettering zone, an element region formed on the first surface of the semiconductor substrate, and an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, and formed directly on at least a portion of the intrinsic gettering region or the denuded zone entirely or partially thinned of the second main surface of the semiconductor substrate. A method for manufacturing a semiconductor device includes the steps of forming an element region on a first main surface of a semiconductor substrate having first and second main surfaces and having an intrinsic gettering zone, and forming an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, directly on at least a portion of the intrinsic gettering region of the second main surface of the semiconductor substrate.

Abstract translation: 一种半导体器件包括具有第一和第二主表面并且包括其中氧浓度低于半导体衬底的内部部分且不包括体微缺陷的溶解区的半导体衬底，以及固有的吸杂区 ，形成在半导体衬底的第一表面上的元件区域和由捕获金属杂质的非晶半导体材料制成的外部吸杂层，并且直接在至少一部分本征吸气区域或裸露区域上形成 或部分地薄化半导体衬底的第二主表面。 一种制造半导体器件的方法包括以下步骤：在具有第一和第二主表面并具有固有吸气区的半导体衬底的第一主表面上形成元件区，并形成由非晶半导体材料制成的外部吸气层 其直接在半导体衬底的第二主表面的固有吸气区的至少一部分上捕获金属杂质。

公开(公告)号：US5514904A

公开(公告)日：1996-05-07

申请号：US297114

申请日：1994-08-26

Applicant: Shinji Onga ,  Takako Okada ,  Kouichirou Inoue ,  Yoshiaki Matsushita ,  Kikuo Yamabe ,  Hiroaki Hazama ,  Haruo Okano

Inventor： Shinji Onga ,  Takako Okada ,  Kouichirou Inoue ,  Yoshiaki Matsushita ,  Kikuo Yamabe ,  Hiroaki Hazama ,  Haruo Okano

IPC: H01L21/8247 ,  H01L21/00 ,  H01L21/316 ,  H01L29/00 ,  H01L29/51 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L29/04 ,  H01L31/036

CPC classification number: H01L29/517

Abstract: A semiconductor device includes a monocrystalline silicon substrate, an insulating film consisting of a monocrystalline silicon oxide formed on the surface of the monocrystalline silicon substrate, and a conductive film formed on the insulating film. The monocrystalline silicon substrate has a (100) plane orientation, the insulating film essentially consists of .beta.-cristobalite having a unit structure in a P4.sub.1 2.sub.1 2 structural expression in such a manner that every other silicon atoms of four silicon atoms aligned about a C-axis are arranged on two adjacent silicon atoms aligned in a 110! direction on an Si (100) plane, and that a plane including the C-axis of the .beta.-cristobalite and the 110! direction is set perpendicular to the (100) plane.

Abstract translation: 半导体器件包括单晶硅衬底，由形成在单晶硅衬底的表面上的单晶氧化硅组成的绝缘膜和形成在绝缘膜上的导电膜。 单晶硅衬底具有（100）面取向，绝缘膜基本上由具有P41212结构表达式的单元结构的β-方英石组成，使得围绕C轴排列的四个硅原子的每隔一个硅原子为 布置在Si（100）平面上沿[110]方向排列的两个相邻的硅原子上，并且包括β-方英石的C轴和[110]方向的平面垂直于（100）平面 。

公开(公告)号：US5173440A

公开(公告)日：1992-12-22

申请号：US517331

申请日：1990-05-01

Applicant: Yoshitaka Tsunashima ,  Kenji Todori ,  Kikuo Yamabe

Inventor： Yoshitaka Tsunashima ,  Kenji Todori ,  Kikuo Yamabe

IPC: H01L21/225 ,  H01L21/334 ,  H01L21/336

CPC classification number: H01L29/66181 ,  H01L21/2255 ,  H01L29/66575 ,  Y10S148/014

Abstract: In fabricating a semiconductor device, when impurities are diffused from a silicon oxide layer containing the impurities to a semiconductor layer, a diffusion atmosphere is controlled so as to oxidize or reduce a specified impurity to thereby control the diffusion coefficient of the impurities in the silicon oxide layer. Thus, it is possible to form a diffusion layer having a desired impurity profile under a good control.

Abstract translation: 在制造半导体器件时，当杂质从包含杂质的氧化硅层扩散到半导体层时，控制扩散气氛以氧化或减少特定杂质，从而控制氧化硅中杂质的扩散系数 层。 因此，可以在良好的控制下形成具有所需杂质分布的扩散层。

公开(公告)号：US4735824A

公开(公告)日：1988-04-05

申请号：US866310

申请日：1986-05-23

Applicant: Kikuo Yamabe ,  Keitaro Imai

Inventor： Kikuo Yamabe ,  Keitaro Imai

IPC: H01L29/00 ,  H01L21/28 ,  H01L21/8242 ,  B05D5/12

CPC classification number: H01L21/28211 ,  H01L27/10861

Abstract: A method of forming an MOS capacitor by the steps of cutting a groove in the surface of a silicon substrate by the RIE process, thermally oxidizing the surface of said silicon substrate, depositing a capacitor electrode on said capacitor-insulating layer, being characterized in that when the capacitor-insulating layer is deposited, the surface of the silicon substrate is thermally oxidized in an oxidizing atmosphere containing 15% by vol. of steam.

Abstract translation: 通过以下步骤形成MOS电容器的方法：通过RIE工艺在硅衬底的表面中切割沟槽，热氧化所述硅衬底的表面，在所述电容器绝缘层上沉积电容器电极，其特征在于， 当沉积电容器绝缘层时，硅衬底的表面在含有15体积％的氧化气氛中被热氧化。 的蒸汽。

公开(公告)号：US08026187B2

公开(公告)日：2011-09-27

申请号：US12550788

申请日：2009-08-31

Applicant: Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

Inventor： Yoshiro Kabe ,  Junichi Kitagawa ,  Kikuo Yamabe

IPC: H01L21/00 ,  H01L21/76

CPC classification number: H01L21/31662 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/02337 ,  H01L21/31654 ,  H01L21/67115 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

Abstract: To form a good quality silicon oxide film provided with both a superior Qbd characteristic and Rd characteristic, a wafer W is loaded into a plasma treatment apparatus where the surface of a silicon layer 501 of the wafer W is treated by plasma oxidation to form on the silicon layer 501 to a film thickness T1 a silicon oxide film 503. Next, the wafer W on which the silicon oxide film 503 is formed is transferred to a thermal oxidation treatment apparatus where the silicon oxide film 503 is treated by thermal oxidation to thereby form a silicon oxide film 505 having a target film thickness T2.

Abstract translation: 为了形成具有优异的Qbd特性和Rd特性的优质氧化硅膜，将晶片W装载到等离子体处理装置中，其中通过等离子体氧化处理晶片W的硅层501的表面以形成在 硅层501形成膜厚T1，形成氧化硅膜503.接着，将形成有氧化硅膜503的晶片W转移到热氧化处理装置中，通过热氧化处理氧化硅膜503，形成 具有目标膜厚度T2的氧化硅膜505。