公开(公告)号：US07471096B2

公开(公告)日：2008-12-30

申请号：US11339836

申请日：2006-01-26

申请人： Naohito Kohashi ,  Shigeyuki Maruyama ,  Yoshikazu Arisaka ,  Hiroyuki Murotani ,  Katsuhiko Ono

发明人： Naohito Kohashi ,  Shigeyuki Maruyama ,  Yoshikazu Arisaka ,  Hiroyuki Murotani ,  Katsuhiko Ono

IPC分类号： G01R31/02

CPC分类号： G01R1/0466 ,  G01R1/0483

摘要： A contactor for electronic parts can provide an appropriate and uniform contact with respect to a plurality of electrode terminals in an electronic part such as an IC. Each of a plurality of contact members has a first contact portion on one end thereof and a second contact portion on the other end thereof, the first contract portion having a recessed portion that receives one of the electrode terminals of the electronic part. A base accommodates and supports the plurality of the contact members. The first contact portion is movable in a horizontal direction.

摘要翻译： 用于电子部件的接触器可以提供相对于诸如IC的电子部件中的多个电极端子的适当且均匀的接触。 多个接触构件中的每一个在其一端具有第一接触部分和另一端的第二接触部分，第一接合部分具有容纳电子部件的电极端子之一的凹部。 基座容纳并支撑多个接触构件。 第一接触部分可沿水平方向移动。

公开(公告)号：US07430798B2

公开(公告)日：2008-10-07

申请号：US11126246

申请日：2005-05-11

申请人： Daisuke Koizumi ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe

发明人： Daisuke Koizumi ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe

IPC分类号： B23P19/00 ,  H01L21/44

CPC分类号： B25B27/14 ,  H05K7/1061 ,  Y10T29/4913 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53187 ,  Y10T29/53191 ,  Y10T29/53943

摘要： An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.

摘要翻译： 准备适用于半导体器件外形的电子部件安装工具。 电子部件安装工具具有将半导体器件的位置与IC插座对准的功能。 电子部件安装工具安装在形成在IC插座上的标准表面上，基本上与半导体器件的外部形状无关。 然后通过使用电子部件安装工具将半导体器件对准并附接到IC插座，并且将电子部件附接工具从IC插座移除。 准备适用于另一半导体器件的外部形状的另一个电子部件附接工具，并且执行与上述相同的步骤以将该半导体器件对准并附接到相同类型的IC插座。

公开(公告)号：US07403024B2

公开(公告)日：2008-07-22

申请号：US10900362

申请日：2004-07-28

申请人： Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe ,  Daisuke Koizumi ,  Takafumi Hashitani ,  Ei Yano

发明人： Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe ,  Daisuke Koizumi ,  Takafumi Hashitani ,  Ei Yano

IPC分类号： G01R31/26

CPC分类号： G01R1/06716 ,  G01R1/06733 ,  G01R1/07357 ,  G01R3/00

摘要： A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.

摘要翻译： 接触器具有可在接触器的厚度方向上弹性变形的接触电极，使得接触器能够以适当的接触压力与半导体器件接触。 接触器位于半导体器件和测试板之间，以将半导体器件电连接到测试板。 多个接触电极中的每一个具有第一接触电极部分，第二接触电极部分和将第一接触电极部分电连接到第二接触电极部分的连接部分。 第一接触电极部分接触半导体器件的电极。 第二接触电极部分接触测试板的端子。 组合构件具有绝缘特性，并且以预定的布置保持每个接触电极的连接部分。

公开(公告)号：US07355421B2

公开(公告)日：2008-04-08

申请号：US11339826

申请日：2006-01-26

申请人： Shigeyuki Maruyama ,  Yoshikazu Arisaka ,  Kazuhiro Tashiro ,  Takayuki Katayama ,  Tetsu Ozawa ,  Yuushin Kimura

发明人： Shigeyuki Maruyama ,  Yoshikazu Arisaka ,  Kazuhiro Tashiro ,  Takayuki Katayama ,  Tetsu Ozawa ,  Yuushin Kimura

IPC分类号： G01R31/02 ,  G01R31/26 ,  G06K5/04

CPC分类号： G01R1/0433

摘要： A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.

摘要翻译： 一种用于测试在半导体衬底上制造的多个半导体器件的半导体器件测试装置，具有布置有多个测试单元的衬底，每个单元包括与半导体器件的电极端子相对应的探针和连接的导体部件 用探针。

公开(公告)号：US07145250B2

公开(公告)日：2006-12-05

申请号：US11113063

申请日：2005-04-25

申请人： Shigeyuki Maruyama ,  Toru Nishino ,  Kazuhiro Tashiro

发明人： Shigeyuki Maruyama ,  Toru Nishino ,  Kazuhiro Tashiro

IPC分类号： H01L29/40 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L23/49838 ,  G01R31/2886 ,  H01L21/6835 ,  H01L22/32 ,  H01L24/48 ,  H01L24/72 ,  H01L24/81 ,  H01L2221/68354 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15173 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： An LSI package comprises an LSI element and a wiring board. The plurality of pin terminals of the LSI element each includes a first conductive layer and a second conductive layer superposed on the first conductive layer. The plurality of pin terminals of the wiring board each includes a third conductive layer joined to the second conductive layer, and the wiring board further comprises outer joining terminals. The first, second, and third conductive layers are made of materials causing the metallic bond between the second conductive layer and third conductive layer to be stronger than the metallic bond between the first conductive layer and second conductive layer. The LSI element is tested using the outer joining terminals of the wiring board. The second conductive layer and third conductive layer are joined to attain a metallic bond through aggregation derived from pressure, and are reliably brought into electrical contact with each other for a test. After the test is completed, the terminals of the LSI element are peeled off from the terminals of the wiring board. At this time, the second conductive layer is transferred to the third conductive layer, and the first conductive layer is left intact in each of the terminals of the LSI element. The LSI element is then mounted on another wiring board.

摘要翻译： LSI封装包括LSI元件和布线板。 LSI元件的多个引脚端子各自包括叠置在第一导电层上的第一导电层和第二导电层。 布线基板的多个引脚端子各自包括接合到第二导电层的第三导电层，并且布线板还包括外连接端子。 第一，第二和第三导电层由使得第二导电层和第三导电层之间的金属键合比第一导电层和第二导电层之间的金属键更强的材料制成。 使用布线板的外部接合端子来测试LSI元件。 第二导电层和第三导电层被接合以通过来自压力的聚集获得金属键，并且可靠地彼此进行电接触以进行测试。 测试完成后，LSI元件的端子从布线板的端子剥离。 此时，第二导电层被转移到第三导电层，并且第一导电层在LSI元件的每个端子中保持完整。 然后将LSI元件安装在另一个布线板上。

公开(公告)号：US20060202201A1

公开(公告)日：2006-09-14

申请号：US11433396

申请日：2006-05-15

申请人： Shigeyuki Maruyama

发明人： Shigeyuki Maruyama

IPC分类号： H01L23/58 ,  H01L23/48

CPC分类号： H01L22/32 ,  G01R31/2831 ,  G01R31/2884 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14

摘要： A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.

摘要翻译： 晶片级封装包括具有至少一个半导体芯片电路形成区域的半导体晶片，每个半导体芯片电路形成区域各自包括半导体芯片电路，每个半导体芯片电路分别具有测试芯片端子和非测试芯片端子，至少一个外部连接端子，至少一个再分布迹线 半导体晶片，至少一个测试构件和绝缘材料。 再分配迹线的第一端连接到测试芯片端子之一，并且所述再分布迹线的第二端延伸到与芯片端子偏移的位置。 测试构件设置在半导体芯片电路形成区域的外部区域中，再分布迹线的第二端连接到测试构件。

公开(公告)号：US20060119374A1

公开(公告)日：2006-06-08

申请号：US11327497

申请日：2006-01-09

申请人： Shigeyuki Maruyama ,  Susumu Kida ,  Naoyuki Watanabe ,  Takafumi Hashitani ,  Ei Yano ,  Ichiro Midorikawa

发明人： Shigeyuki Maruyama ,  Susumu Kida ,  Naoyuki Watanabe ,  Takafumi Hashitani ,  Ei Yano ,  Ichiro Midorikawa

IPC分类号： G01R31/02

CPC分类号： G01R1/06733 ,  G01R1/0483 ,  G01R1/06711 ,  G01R1/06755 ,  G01R1/07314 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A contactor is provided which contactor comprises an insulating substrate, a concave portion formed in the insulating substrate and extending in a perpendicular direction from a surface thereof, and elastic conductive particles disposed in the concave portion. A part of one of the conductive particles protrudes from the surface of the insulating substrate.

公开(公告)号：US20050204551A1

公开(公告)日：2005-09-22

申请号：US11126246

申请日：2005-05-11

申请人： Daisuke Koizumi ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe

发明人： Daisuke Koizumi ,  Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe

IPC分类号： H01R33/76 ,  B25B27/14 ,  H01R43/00 ,  H05K7/10 ,  H05K13/04 ,  B23K31/00

CPC分类号： B25B27/14 ,  H05K7/1061 ,  Y10T29/4913 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53187 ,  Y10T29/53191 ,  Y10T29/53943

摘要： An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.

摘要翻译： 准备适用于半导体器件外形的电子部件安装工具。 电子部件安装工具具有将半导体器件的位置与IC插座对准的功能。 电子部件安装工具安装在形成在IC插座上的标准表面上，基本上与半导体器件的外部形状无关。 然后通过使用电子部件安装工具将半导体器件对准并附接到IC插座，并且将电子部件附接工具从IC插座移除。 准备适用于另一半导体器件的外部形状的另一个电子部件附接工具，并且执行与上述相同的步骤以将该半导体器件对准并附接到相同类型的IC插座。

公开(公告)号：US06791345B2

公开(公告)日：2004-09-14

申请号：US10059114

申请日：2002-01-31

申请人： Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe ,  Daisuke Koizumi ,  Takafumi Hashitani ,  Ei Yano

发明人： Shigeyuki Maruyama ,  Kazuhiro Tashiro ,  Naoyuki Watanabe ,  Daisuke Koizumi ,  Takafumi Hashitani ,  Ei Yano

IPC分类号： G01R3102

CPC分类号： G01R1/06716 ,  G01R1/06733 ,  G01R1/07357 ,  G01R3/00

摘要： A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.

摘要翻译： 接触器具有可在接触器的厚度方向上弹性变形的接触电极，使得接触器能够以适当的接触压力与半导体器件接触。 接触器位于半导体器件和测试板之间，以将半导体器件电连接到测试板。 多个接触电极中的每一个具有第一接触电极部分，第二接触电极部分和将第一接触电极部分电连接到第二接触电极部分的连接部分。 第一接触电极部分接触半导体器件的电极。 第二接触电极部分接触测试板的端子。 组合构件具有绝缘特性，并且以预定的布置保持每个接触电极的连接部分。

公开(公告)号：US06774650B2

公开(公告)日：2004-08-10

申请号：US10392925

申请日：2003-03-21

申请人： Shigeyuki Maruyama ,  Daisuke Koizumi ,  Naoyuki Watanabe ,  Yoshito Konno ,  Eiji Yoshida ,  Toshiyuki Honda ,  Toshimi Kawahara ,  Kenichi Nagashige

发明人： Shigeyuki Maruyama ,  Daisuke Koizumi ,  Naoyuki Watanabe ,  Yoshito Konno ,  Eiji Yoshida ,  Toshiyuki Honda ,  Toshimi Kawahara ,  Kenichi Nagashige

IPC分类号： G01R3102

CPC分类号： G01R31/2886 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/11 ,  H05K3/326

摘要： A probe card for testing a wafer having formed a plurality of semiconductor chips, the probe card including a board and a multi-layer substrate. The probe card may also include a flexible substrate. A contact electrode, located opposite from an electrode on one of the chips, is disposed above or below the flexible substrate, or may be provided on an elastic material on the multi-layered substrate. A first wiring has a first portion connected to the contact electrode, a level transitioning portion extending from a level of the first portion to the multi-layer substrate at a lower level, and a connecting terminal at an end of the level transitioning portion connected to an internal terminal on the multi-layered substrate. A second wiring in the multi-layered substrate connects the internal terminal to an external terminal at a periphery of the multi-layer substrate. A third wiring on the board connects the external terminal on the multi-layer substrate to an external connecting terminal on the board. Displacements of the internal terminal resulting from the temperature load applied during testing of the wafer are compensated by the level transitioning portion of the first wiring. Unevenness involved with the contact between the contact electrodes on the probe card and the electrodes on the chips are compensated by the contact electrodes and/or elastic material. An electrode pitch of the contact electrodes is expanded by the first wiring.

摘要翻译： 一种用于测试形成多个半导体芯片的晶片的探针卡，所述探针卡包括基板和多层基板。 探针卡还可以包括柔性基底。 在其中一个芯片上与电极相对设置的接触电极设置在柔性基板的上方或下方，或者可以设置在多层基板上的弹性材料上。 第一布线具有连接到接触电极的第一部分，从第一部分的电平延伸到较低电平的多层基板的电平转换部分，以及连接到电平转换部分的端部处的连接端子 多层基板上的内部端子。 多层基板中的第二布线将内部端子连接到多层基板的外围的外部端子。 电路板上的第三个接线将多层基板上的外部端子连接到电路板上的外部连接端子。 在晶片测试期间施加的温度负载导致的内部端子的位移由第一布线的电平转换部分补偿。 与探针卡上的接触电极和芯片上的电极之间的接触相关的不均匀性由接触电极和/或弹性材料补偿。 接触电极的电极间距由第一布线扩大。