公开(公告)号：US06577006B1

公开(公告)日：2003-06-10

申请号：US09473405

申请日：1999-12-28

申请人： Kiyoshi Oota ,  Nobuhiko Hayashi

发明人： Kiyoshi Oota ,  Nobuhiko Hayashi

IPC分类号： H01L3300

CPC分类号： H01L33/40 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

摘要： An undoped GaN buffer layer, an n-type GaN layer and a p-type GaN layer are successively formed on a sapphire substrate, and a partial region from the p-type GaN layer to the n-type GaN layer is removed, to expose the n-type GaN layer. Ti films having a thickness of 3 to 100 Å and Pt films are successively formed on the p-type GaN layer and on the exposed upper surfaces of the n-type GaN layer. Consequently, a p electrode in ohmic contact with the p-type GaN layer and an n electrode in ohmic contact with the n-type GaN layer are formed without being alloyed by heat treatment.

摘要翻译： 在蓝宝石衬底上依次形成未掺杂的GaN缓冲层，n型GaN层和p型GaN层，并且从p型GaN层到n型GaN层的部分区域被去除，以露出 n型GaN层。 在p型GaN层和n型GaN层的露出的上表面上依次形成厚度为3〜100的Ti膜和Pt膜。 因此，与p型GaN层欧姆接触的p电极和与n型GaN层欧姆接触的n电极形成，而不通过热处理合金化。

公开(公告)号：US06522676B1

公开(公告)日：2003-02-18

申请号：US09492008

申请日：2000-01-27

申请人： Takenori Goto ,  Nobuhiko Hayashi

发明人： Takenori Goto ,  Nobuhiko Hayashi

IPC分类号： H01S500

CPC分类号： B82Y20/00 ,  H01S5/0208 ,  H01S5/021 ,  H01S5/0211 ,  H01S5/0213 ,  H01S5/0658 ,  H01S5/2205 ,  H01S5/2231 ,  H01S5/3211 ,  H01S5/3213 ,  H01S5/34333

摘要： A nitride semiconductor device of the self-pulsation type comprises as superposed on a substrate 1 an n-type cladding layer 3, active layer 4 and p-type cladding layer including an upwardly projecting stripe portion 53, an n-type current blocking layer 6 being formed at each of opposite sides of the stripe portion 53. The stripe portion 53 of the p-type cladding layer 5 comprises an upper stripe portion 51 and a lower stripe portion 52. The upper stripe portion 51 has a minimum width W1 at the position of the boundary between the upper and lower stripe portions 51, 52, and the lower stripe portion 52 has at the position of its lower end a width W2 greater than the minimum width W1 of the upper stripe portion 51. This construction realizes a higher yield than in the prior art.

摘要翻译： 自脉动型氮化物半导体器件包括在基板1上叠加n型包覆层3，有源层4和包括向上突出的条形部分53，n型电流阻挡层6的p型覆层 形成在条形部分53的相对两侧.p型包覆层5的条形部分53包括上条纹部分51和下条纹部分52.上条纹部分51具有最小宽度W1 上条带部分51和下条带部分52和下条部分52之间的边界的位置在其下端的宽度W2大于上条部分51的最小宽度W1的位置。这种结构实现了更高的 产率高于现有技术。

公开(公告)号：US06319742B1

公开(公告)日：2001-11-20

申请号：US09361246

申请日：1999-07-27

申请人： Nobuhiko Hayashi ,  Takashi Kano

发明人： Nobuhiko Hayashi ,  Takashi Kano

IPC分类号： H01L2100

CPC分类号： H01S5/32341 ,  H01L21/31608 ,  H01L33/007 ,  H01S5/0216 ,  H01S5/0217 ,  H01S2304/12

摘要： A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.

摘要翻译： 在蓝宝石衬底上生长GaN层，在GaN层上形成SiO 2膜，然后使用外延横向生长在GaN层和SiO 2膜上生长包括MQW有源层的GaN半导体层。 通过蚀刻除去在SiO 2膜上的区域中的GaN基半导体层，然后在SiO 2膜上的GaN基半导体层的顶表面上形成ap电极，以将p电极连接到GaN基半导体层 涉及GaAs衬底上的欧姆电极。 n电极形成在GaN基半导体层的顶表面上。

公开(公告)号：US08746752B2

公开(公告)日：2014-06-10

申请号：US13640265

申请日：2012-02-22

申请人： Nobuhiko Hayashi ,  Hajime Imura

发明人： Nobuhiko Hayashi ,  Hajime Imura

IPC分类号： F16L17/00

CPC分类号： F16L37/091 ,  F16L41/021

摘要： An inner tubular portion (15) and an outer tubular portion (16) form an insertion space (14) of a plastic pipe (11) and are integrally formed on a joint main body (13). A cap (29) is connected to the outer tubular portion (16) by projection-recess engagement. A retainer mechanism (27) of the plastic pipe (11) is provided between the outer tubular portion (16) and the cap (29). A cutout portion (20) is formed in the outer tubular portion (16), and a bulging engagement portion (24) is arranged on the cutout portion (20). The outer periphery of the bulging engagement portion (24) is connected to the cap (29) by the projection-recess engagement. A restricting portion is provided between the cutout portion (20) and the bulging engagement portion (24). The restricting portion is composed of a first tapered surface (21) and a second tapered surface (25). The first tapered surface (21) is provided on the cutout portion (20) and decreases in width toward the outer end. The second tapered surface (25) is provided on the bulging engagement portion (24) and engaged with the first tapered surface (21).

摘要翻译： 一个内部管状部分（15）和一个外部管状部分（16）形成一个塑料管道（11）的插入空间（14），并一体形成在一个接头主体（13）上。 帽（29）通过突出凹部接合连接到外管状部分（16）。 塑料管（11）的保持机构（27）设置在外管状部分（16）和帽（29）之间。 在外管部（16）上形成切口部（20），在切口部（20）上设置有凸出接合部（24）。 凸出接合部分（24）的外周通过突出凹陷接合连接到盖（29）。 在切口部（20）与凸出接合部（24）之间设有限制部。 限制部分由第一锥形表面（21）和第二锥形表面（25）构成。 第一锥形表面（21）设置在切口部（20）上，朝向外端减小宽度。 第二锥形表面（25）设置在凸出接合部分（24）上并与第一锥形表面（21）接合。

公开(公告)号：US20120299052A1

公开(公告)日：2012-11-29

申请号：US13576954

申请日：2011-02-04

申请人： Nobuhiko Hayashi ,  Masayuki Hata

发明人： Nobuhiko Hayashi ,  Masayuki Hata

IPC分类号： H01L33/48

CPC分类号： H01S5/02204 ,  G11B7/127 ,  H01L23/26 ,  H01L2224/48091 ,  H01L2924/12044 ,  H01L2924/19107 ,  H01S5/02212 ,  H01S5/0222 ,  H01S5/02244 ,  H01S5/02296 ,  H01L2924/00014

摘要： A semiconductor light-emitting device capable of inhibiting a semiconductor light-emitting element from deterioration and capable of inhibiting the size of a package from enlargement is obtained. The semiconductor light-emitting device includes a semiconductor light-emitting element and a package sealing the semiconductor light-emitting element. The package includes a base portion mounted with the semiconductor light-emitting element and a cap portion mounted on the base portion for covering the semiconductor light-emitting element. At least either one of the base portion and the cap portion is made of a mixture of resin and a gas absorbent.

摘要翻译： 可以获得能够抑制半导体发光元件劣化并且能够抑制封装尺寸放大的半导体发光器件。 半导体发光器件包括半导体发光元件和密封半导体发光元件的封装。 封装包括安装有半导体发光元件的基座部分和安装在基座部分上用于覆盖半导体发光元件的盖部分。 底座部分和盖部分中的至少一个由树脂和气体吸收剂的混合物制成。

公开(公告)号：US07829900B2

公开(公告)日：2010-11-09

申请号：US12071978

申请日：2008-02-28

申请人： Masayuki Hata ,  Tatsuya Kunisato ,  Nobuhiko Hayashi

发明人： Masayuki Hata ,  Tatsuya Kunisato ,  Nobuhiko Hayashi

IPC分类号： H01L27/15

CPC分类号： B82Y20/00 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/007 ,  H01S5/0207 ,  H01S5/22 ,  H01S5/2214 ,  H01S5/227 ,  H01S5/34333 ,  H01S2304/12

摘要： A nitride-based semiconductor element having superior mass productivity and excellent element characteristics is obtained. This nitride-based semiconductor element comprises a substrate comprising a surface having projection portions, a mask layer formed to be in contact with only the projection portions of the surface of the substrate, a first nitride-based semiconductor layer formed on recess portions of the substrate and the mask layer and a nitride-based semiconductor element layer, formed on the first nitride-based semiconductor layer, having an element region. Thus, the first nitride-based semiconductor layer having low dislocation density is readily formed on the projection portions of the substrate and the mask layer through the mask layer serving for selective growth. When the nitride-based semiconductor element layer having the element region is grown on the first nitride-based semiconductor layer having low dislocation density, a nitride-based semiconductor element having excellent element characteristics can be readily obtained. The first nitride-based semiconductor layer is formed through only single growth on the substrate, whereby a nitride-based semiconductor element having excellent mass productivity is obtained.

摘要翻译： 获得具有优异的质量生产率和优异的元件特性的氮化物基半导体元件。 该氮化物系半导体元件包括基板，该基板包括具有突出部的表面，形成为仅与基板的表面的突出部接触的掩模层，形成在基板的凹部的第一氮化物系半导体层 以及形成在具有元件区域的第一氮化物系半导体层上的掩模层和氮化物系半导体元件层。 因此，具有低位错密度的第一氮化物基半导体层通过用于选择生长的掩模层容易地形成在衬底和掩模层的突出部分上。 当在具有低位错密度的第一氮化物基半导体层上生长具有元素区域的氮化物基半导体元件层时，可以容易地获得具有优异元素特性的氮化物基半导体元件。 第一氮化物基半导体层仅通过基板上的单一生长形成，从而获得具有优异的批量生产率的氮化物基半导体元件。

公开(公告)号：US20100252913A1

公开(公告)日：2010-10-07

申请号：US12818694

申请日：2010-06-18

申请人： Nobuhiko Hayashi ,  Takashi Kano

发明人： Nobuhiko Hayashi ,  Takashi Kano

IPC分类号： H01L29/20

CPC分类号： H01S5/32341 ,  H01L21/31608 ,  H01L33/007 ,  H01S5/0216 ,  H01S5/0217 ,  H01S2304/12

摘要： A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.

摘要翻译： 在蓝宝石衬底上生长GaN层，在GaN层上形成SiO 2膜，然后使用外延横向生长在GaN层和SiO 2膜上生长包括MQW有源层的GaN半导体层。 通过蚀刻除去在SiO 2膜上的区域中的GaN基半导体层，然后在SiO 2膜上的GaN基半导体层的顶表面上形成ap电极，以将p电极连接到GaN基半导体层 涉及GaAs衬底上的欧姆电极。 n电极形成在GaN基半导体层的顶表面上。

公开(公告)号：US20090114941A1

公开(公告)日：2009-05-07

申请号：US12149960

申请日：2008-05-12

申请人： Nobuhiko Hayashi ,  Takashi Kano

发明人： Nobuhiko Hayashi ,  Takashi Kano

IPC分类号： H01L33/00 ,  H01L21/00 ,  H01L21/20 ,  H01L21/02

CPC分类号： H01S5/32341 ,  H01L21/31608 ,  H01L33/007 ,  H01S5/0216 ,  H01S5/0217 ,  H01S2304/12

摘要： A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.

公开(公告)号：US20050145878A1

公开(公告)日：2005-07-07

申请号：US11054956

申请日：2005-02-11

申请人： Nobuhiko Hayashi ,  Takashi Kano

发明人： Nobuhiko Hayashi ,  Takashi Kano

IPC分类号： H01L21/316 ,  H01L33/00 ,  H01S5/02 ,  H01S5/323 ,  H01L29/22

CPC分类号： H01S5/32341 ,  H01L21/31608 ,  H01L33/007 ,  H01S5/0216 ,  H01S5/0217 ,  H01S2304/12

摘要： A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.

摘要翻译： 在蓝宝石衬底上生长GaN层，在GaN层上形成SiO 2膜，然后在GaN层上生长包括MQW有源层的GaN半导体层，并且将SiO _{2 膜使用外延横向过度生长。 通过蚀刻除去GaN基半导体层，除了在SiO 2膜上的区域中，然后在SiO 2膜上的GaN基半导体层的顶表面上形成ap电极， / SUB>膜，将GaN基半导体层上的p电极连接到GaAs衬底上的欧姆电极。 n电极形成在GaN基半导体层的顶表面上。}

公开(公告)号：US06759139B2

公开(公告)日：2004-07-06

申请号：US10081842

申请日：2002-02-25

申请人： Tatsuya Kunisato ,  Nobuhiko Hayashi ,  Hiroki Ohbo ,  Masayuki Hata ,  Tsutomu Yamaguchi

发明人： Tatsuya Kunisato ,  Nobuhiko Hayashi ,  Hiroki Ohbo ,  Masayuki Hata ,  Tsutomu Yamaguchi

IPC分类号： H01L2912

CPC分类号： H01L33/007 ,  H01L21/02378 ,  H01L21/02387 ,  H01L21/0242 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02647 ,  H01L29/2003 ,  H01S5/32341 ,  Y10T428/12528 ,  Y10T428/24802

摘要： A nitride-based semiconductor element enabling formation of a nitride-based semiconductor layer having low dislocation density, consisting of a material different from that of an underlayer, on the underlayer with a small thickness is obtained. This nitride-based semiconductor element comprises a plurality of mask layers formed at a prescribed interval to be in contact with the upper surface of the underlayer while partially exposing the underlayer and the nitride-based semiconductor layer, formed on the upper surface of the underlayer and the mask layers, consisting of the material different from that of the underlayer. The minimum distance between adjacent mask layers is smaller than the width of an exposed part of the underlayer located between the adjacent mask layers.

摘要翻译： 获得能够在厚度较小的底层上形成由不同于下层的材料构成的位错密度低的氮化物系半导体元件的氮化物系半导体元件。 这种氮化物基半导体元件包括以规定间隔形成的多个掩模层，以与底层的上表面接触，同时部分地暴露形成在底层的上表面上的下层和氮化物类半导体层， 掩模层，由与底层不同的材料组成。 相邻掩模层之间的最小距离小于位于相邻掩模层之间的底层的暴露部分的宽度。