公开(公告)号：US10811334B2

公开(公告)日：2020-10-20

申请号：US15361394

申请日：2016-11-26

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Archana Venugopal ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/495 ,  H01L23/34 ,  H01L23/367 ,  H01L23/373 ,  H01L21/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L23/532

Abstract: An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region has a plurality of interconnect levels. The integrated circuit includes a thermal routing structure in the interconnect region. The thermal routing structure extends over a portion, but not all, of the integrated circuit in the interconnect region. The thermal routing structure includes a cohered nanoparticle film in which adjacent nanoparticles cohere to each other. The thermal routing structure has a thermal conductivity higher than dielectric material touching the thermal routing structure. The cohered nanoparticle film is formed by a method which includes an additive process.

公开(公告)号：US20200219969A1

公开(公告)日：2020-07-09

申请号：US16820549

申请日：2020-03-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Poornika Fernandes ,  Luigi Colombo ,  Haowen Bu

IPC: H01L49/02 ,  C23C16/455 ,  H01L21/677 ,  H01G4/018

Abstract: In a described example, a method for forming a capacitor includes: forming a capacitor first plate over a non-conductive substrate; flowing ammonia and nitrogen gas into a plasma enhanced chemical vapor deposition (PECVD) chamber containing the non-conductive substrate; stabilizing a pressure and a temperature in the PECVD chamber; turning on radio frequency high frequency (RF-HF) power to the PECVD chamber; pretreating the capacitor first plate for at least 60 seconds; depositing a capacitor dielectric on the capacitor first plate; and depositing a capacitor second plate on the capacitor dielectric.

公开(公告)号：US10181521B2

公开(公告)日：2019-01-15

申请号：US15437818

申请日：2017-02-21

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Benjamin Stassen Cook ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L29/16 ,  H01L29/66 ,  H01L29/778 ,  H01L23/66 ,  H01L49/02

Abstract: A microelectronic device includes an electrical conductor which includes a graphene heterolayer. The graphene heterolayer includes a plurality of alternating layers of graphene and barrier material. Each layer of the graphene has one to two atomic layers of graphene. Each layer of the barrier material has one to three layers of hexagonal boron nitride, cubic boron nitride, and/or aluminum nitride. The layers of graphene and the layers of barrier material may be continuous, or may be disposed in nanoparticles of a nanoparticle film.

公开(公告)号：US20180240886A1

公开(公告)日：2018-08-23

申请号：US15437818

申请日：2017-02-21

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Benjamin Stassen Cook ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L29/66 ,  H01L29/778 ,  H01L23/66 ,  H01L49/02

CPC classification number: H01L29/66045 ,  H01L23/66 ,  H01L28/40 ,  H01L29/1606 ,  H01L29/778 ,  H01L2223/6677

Abstract: A microelectronic device includes an electrical conductor which includes a graphene heterolayer. The graphene heterolayer includes a plurality of alternating layers of graphene and barrier material. Each layer of the graphene has one to two atomic layers of graphene. Each layer of the barrier material has one to three layers of hexagonal boron nitride, cubic boron nitride, and/or aluminum nitride. The layers of graphene and the layers of barrier material may be continuous, or may be disposed in nanoparticles of a nanoparticle film.

公开(公告)号：US20180151464A1

公开(公告)日：2018-05-31

申请号：US15361397

申请日：2016-11-26

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Archana Venugopal ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L23/367 ,  H01L23/528 ,  H01L23/373 ,  H01L23/48 ,  H01L23/522 ,  H01L23/532 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/324

CPC classification number: H01L23/367 ,  H01L21/32051 ,  H01L21/32055 ,  H01L21/324 ,  H01L21/743 ,  H01L21/76895 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53276 ,  H01L27/0248 ,  H01L2224/48463

Abstract: An integrated circuit has a substrate which includes a semiconductor material, and an interconnect region disposed on the substrate. The integrated circuit includes a thermal routing trench in the substrate. The thermal routing trench includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal routing trench has a thermal conductivity higher than the semiconductor material contacting the thermal routing trench. The cohered nanoparticle film is formed by an additive process.

公开(公告)号：US09882008B2

公开(公告)日：2018-01-30

申请号：US14933872

申请日：2015-11-05

Applicant: Texas Instruments Incorporated

Inventor： Luigi Colombo ,  Archana Venugopal

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/786 ,  H01L51/00 ,  H01L51/05 ,  H01L29/66 ,  H01L29/45 ,  H01L21/02 ,  H01L29/778 ,  H01L29/51

CPC classification number: H01L29/1606 ,  H01L21/02244 ,  H01L29/401 ,  H01L29/41725 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/517 ,  H01L29/66045 ,  H01L29/66742 ,  H01L29/778 ,  H01L29/786 ,  H01L51/0048 ,  H01L51/0558

Abstract: A method for forming a graphene FET includes providing a graphene layer having a surface. A first metal layer having a work function

公开(公告)号：US20170067970A1

公开(公告)日：2017-03-09

申请号：US14936631

申请日：2015-11-09

Applicant: Texas Instruments Incorporated

Inventor： Arup Polley ,  Archana Venugopal ,  Luigi Colombo ,  Robert R. Doering

IPC: G01R33/07 ,  H01L43/06 ,  H01L43/10 ,  H01L43/04

CPC classification number: G01R33/07 ,  G01R33/0029 ,  G01R33/0041 ,  G01R33/075 ,  G01R33/1284 ,  H01L43/04 ,  H01L43/06 ,  H01L43/10

Abstract: A Graphene Hall sensor (GHS) may be provided with a modulated gate bias signal in which the modulated gate bias signal alternates at a modulation frequency between a first voltage that produces a first conductivity state in the GHS and a second voltage that produces approximately a same second conductivity state in the GHS. A bias current may be provided through a first axis of the GHS. A resultant output voltage signal may be provided across a second axis of the Hall sensor that includes a modulated Hall voltage and an offset voltage, in which the Hall voltage is modulated at the modulation frequency. An amplitude of the Hall voltage that does not include the offset voltage may be extracted from the resultant output voltage signal.

Abstract translation: 石墨烯霍尔传感器（GHS）可以设置有调制的栅极偏置信号，其中调制的栅极偏置信号以在GHS中产生第一导电状态的第一电压和产生大致相同的第二电压之间的调制频率交替 GHS中的第二导电状态。 可以通过GHS的第一轴提供偏置电流。 可以在霍尔传感器的第二轴上提供结果输出电压信号，其包括调制霍尔电压和偏移电压，其中霍尔电压以调制频率被调制。 可以从所得到的输出电压信号中提取不包括偏移电压的霍尔电压的振幅。

公开(公告)号：US20160300775A1

公开(公告)日：2016-10-13

申请号：US15183896

申请日：2016-06-16

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Marie Denison ,  Luigi Colombo ,  Sameer Pendharkar

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/373

Abstract: A microelectronic device includes a heat spreader layer on an electrode of a component and a metal interconnect on the heat spreader layer. The heat spreader layer is disposed above a top surface of a substrate of the semiconductor device. The heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter-° K, and an electrical resistivity less than 100 micro-ohm-centimeters.

公开(公告)号：US11309388B2

公开(公告)日：2022-04-19

申请号：US16995563

申请日：2020-08-17

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Luigi Colombo ,  Nazila Dadvand ,  Archana Venugopal

IPC: H01L29/15 ,  H01L29/16 ,  H01L29/423 ,  H01L29/808 ,  H01L29/66

Abstract: A switchable array includes: a microstructure of interconnected units formed of graphene tubes with open spaces in the microstructure bounded by the graphene tubes; at least one JFET gate in at least one of the graphene tubes; and a control line having an end connected to the at least one JFET gate. The control line extends to a periphery of the microstructure.

公开(公告)号：US11145598B2

公开(公告)日：2021-10-12

申请号：US16236042

申请日：2018-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Nazila Dadvand ,  Archana Venugopal ,  Luigi Colombo

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532

Abstract: An interconnect structure for a semiconductor device includes a plurality of unit cells. Each unit cell is formed of interconnected conducting segments. The plurality of unit cells forms a conducting lattice.