公开(公告)号：US06373099B1

公开(公告)日：2002-04-16

申请号：US09252077

申请日：1999-02-18

申请人： Shin Kikuchi ,  Hayao Ohzu ,  Shunsuke Inoue ,  Yoshio Nakamura ,  Takeshi Ichikawa ,  Osamu Ikeda

发明人： Shin Kikuchi ,  Hayao Ohzu ,  Shunsuke Inoue ,  Yoshio Nakamura ,  Takeshi Ichikawa ,  Osamu Ikeda

IPC分类号： H01L31062

CPC分类号： H01L27/115 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including: an insulated gate type transistor having a columnar semiconductor region formed on the main side of a semiconductor substrate, a gate electrode formed on the side surface of the columnar semiconductor region while interposing a gate insulating film and main electrode regions respectively formed on and formed below the columnar semiconductor region; and a memory element which is formed on the upper main electrode region and which can be broken electrically.

摘要翻译： 一种半导体器件，包括：绝缘栅型晶体管，其具有形成在半导体衬底的主侧上的柱状半导体区域，形成在柱状半导体区域的侧表面上的栅电极，同时插入栅极绝缘膜和分别形成的主电极区域 形成在柱状半导体区域的下方; 以及形成在上主电极区域上并且可以被电断开的存储元件。

公开(公告)号：US06300615B1

公开(公告)日：2001-10-09

申请号：US09383435

申请日：1999-08-27

申请人： Mahito Shinohara ,  Shin Kikuchi

发明人： Mahito Shinohara ,  Shin Kikuchi

IPC分类号： H01J4014

CPC分类号： H04N5/35518

摘要： Provided is a photoelectric conversion apparatus having a pair of transistors respective control electrodes of which are connected to each other, and a capacitor, wherein the pair of transistors are arranged so that a potential of a main electrode of one transistor is fixed to a constant potential and so that a main electrode of the other transistor is connected to the capacitor and wherein a potential or a charge appearing in the capacitor is taken out as a signal.

摘要翻译： 提供一种光电转换装置，其具有彼此连接的各自的控制电极的一对晶体管，以及电容器，其中一对晶体管被布置成使得一个晶体管的主电极的电位固定为恒定电位 并且使得另一个晶体管的主电极连接到电容器，并且其中出现在电容器中的电位或电荷作为信号被取出。

公开(公告)号：US5889503A

公开(公告)日：1999-03-30

申请号：US764300

申请日：1996-12-12

申请人： Shin Kikuchi ,  Kazuyuki Shigeta

发明人： Shin Kikuchi ,  Kazuyuki Shigeta

IPC分类号： G02F1/133 ,  G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/3611 ,  G09G2320/0204 ,  G09G2320/0276 ,  G09G3/3607

摘要： A signal processing circuit is disclosed in which the DC level of a signal having constant signal value periods during each of non-inverting periods and inverting periods can be correctly adjusted. The circuit has first and second sample-and-hold sections which perform sample-and-hold operations on the signal value which occurs during the constant signal value periods of the non-inverting and inverting periods. An averaging section averages the sample-and-hold values of the sample-and-hold sections. A feedback section compares the output value of the averaging section with a reference value and, upon comparison, feeds back the resulting value to the signal processing section. Also disclosed is a liquid crystal display apparatus using the above-described signal processing circuit.

摘要翻译： 公开了一种信号处理电路，其中可以正确地调整在每个非反相周期和反相周期期间具有恒定信号值周期的信号的直流电平。 该电路具有第一和第二取样和保持部分，对在非反相和反相周期的恒定信号值周期期间发生的信号值执行采样和保持操作。 平均部分对采样和保持部分的采样和保持值进行平均。 反馈部分将平均部分的输出值与参考值进行比较，并且在比较时将所得到的值反馈到信号处理部分。 还公开了使用上述信号处理电路的液晶显示装置。

公开(公告)号：US5885376A

公开(公告)日：1999-03-23

申请号：US58329

申请日：1998-04-09

申请人： Takeshi Suzuki ,  Manpei Kuwahara ,  Shin Kikuchi ,  Yoshiharu Mae ,  Junichi Kumagai ,  Katsuyoshi Narita ,  Rensei Futatsuka

发明人： Takeshi Suzuki ,  Manpei Kuwahara ,  Shin Kikuchi ,  Yoshiharu Mae ,  Junichi Kumagai ,  Katsuyoshi Narita ,  Rensei Futatsuka

IPC分类号： C22C9/04

CPC分类号： C22C9/04

摘要： A copper based alloy consists essentially, by weight %, of 15 to 35% Zn, 7 to 14% Ni, 0.1 to 2% or less Mn, 0.01 to 0.5% Fe, 0.0005 to 0.1% P, at least one or two elements selected from the group consisting of 0.001 to 0.9% Si, 0.0003 to 0.02% Pb, and 0.0003 to 0.01% C, the total content of the selected at least two elements being limited to a range of 0.0006 to 0.9%, and the balance of Cu and inevitable impurities. The copper based alloy has excellent blankability as well as good corrosion resistance and high strength.

摘要翻译： 铜基合金基本上以重量％计含有15-35％Zn，7-14％Ni，0.1％到2％或更少的Mn，0.01到0.5％的Fe，0.0005到0.1％的P，至少一种或两种元素 选自0.001至0.9％的Si，0.0003至0.02％的Pb和0.0003至0.01％的C，所选择的至少两种元素的总含量限制在0.0006至0.9％的范围内，余量为 Cu和不可避免的杂质。 铜基合金具有优异的可剥离性以及良好的耐腐蚀性和高强度。

公开(公告)号：US5541454A

公开(公告)日：1996-07-30

申请号：US478115

申请日：1995-06-07

申请人： Shunsuke Inoue ,  Yukihiko Sakashita ,  Yoshio Nakamura ,  Shin Kikuchi ,  Hiroshi Yuzurihara

发明人： Shunsuke Inoue ,  Yukihiko Sakashita ,  Yoshio Nakamura ,  Shin Kikuchi ,  Hiroshi Yuzurihara

IPC分类号： H01L27/108 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L27/10829 ,  H01L2924/0002

摘要： A semiconductor device comprises a capacitor consisting of an Al region formed on a semiconductor substrate, an Al oxide film formed on a surface of said Al region, and electrodes opposed to said Al region with interposition of said Al oxide film.

摘要翻译： 半导体器件包括由在半导体衬底上形成的Al区域，形成在所述Al区域的表面上的Al氧化物膜和与所述Al区域相对的电极组成的电容器，插入所述Al氧化物膜。

公开(公告)号：US5438218A

公开(公告)日：1995-08-01

申请号：US54831

申请日：1993-04-30

申请人： Yoshio Nakamura ,  Shin Kikuchi ,  Shigeru Nishimura

发明人： Yoshio Nakamura ,  Shin Kikuchi ,  Shigeru Nishimura

IPC分类号： H01L21/285 ,  H01L21/329 ,  H01L29/47 ,  H01L29/78 ,  H01L29/872

CPC分类号： H01L29/66166 ,  H01L21/28537 ,  H01L29/47 ,  H01L29/7308 ,  H01L29/7839 ,  H01L29/872

摘要： A semiconductor device is provided having a first semiconductor region comprising an n-type semiconductor and a second semiconductor region of an n-type semiconductor having a higher resistivity than the first semiconductor region. An insulation film is provided adjacent to the semiconductor region having an aperture therein, and an electrode region is provided in the aperture. A third semiconductor region comprising a p-type semiconductor is provided at a junction between the insulation film and the electrode region. The electrode comprises a monocrystalline metal and constitutes a Schottky junction with the semiconductor region. An ohmic electrode comprising aluminum is arranged on the electrode region.

摘要翻译： 提供一种半导体器件，其具有包括n型半导体的第一半导体区域和具有比第一半导体区域更高的电阻率的n型半导体的第二半导体区域。 在其中具有孔的半导体区域附近提供绝缘膜，并且在孔中设置电极区域。 包括p型半导体的第三半导体区域设置在绝缘膜和电极区域之间的接合处。 电极包括单晶金属，并与半导体区域构成肖特基结。 包括铝的欧姆电极布置在电极区域上。

公开(公告)号：US09281477B2

公开(公告)日：2016-03-08

申请号：US14125254

申请日：2012-06-17

申请人： Yutaka Nishioka ,  Kazumasa Horita ,  Natsuki Fukuda ,  Shin Kikuchi ,  Koukou Suu

发明人： Yutaka Nishioka ,  Kazumasa Horita ,  Natsuki Fukuda ,  Shin Kikuchi ,  Koukou Suu

IPC分类号： H01L45/00 ,  G11C11/56 ,  G11C13/00

CPC分类号： H01L45/1253 ,  G11C11/5614 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/56 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1675

摘要： To provide a resistance change element which does not require a forming process and enables reduction of power consumption and miniaturization of the element, and to provide a method for producing it. A resistance change element 1 according to an embodiment of the present invention includes a bottom electrode layer 3, a top electrode layer 5 and an oxide semiconductor layer 4. The oxide semiconductor layer 4 has a first metal oxide layer 41 and a second metal oxide layer 42. The first metal oxide layer 41 is formed between the bottom electrode layer 3 and the top electrode layer 5, and in ohmic contact with the bottom electrode layer 3. The second metal oxide layer 42 is formed between the first metal oxide layer 41 and the top electrode layer 5, and in ohmic contact with the top electrode layer 5.

摘要翻译： 为了提供不需要成形工艺的电阻变化元件，并且能够降低功耗并且元件的小型化，并提供其制造方法。 根据本发明实施例的电阻变化元件1包括底电极层3，顶电极层5和氧化物半导体层4.氧化物半导体层4具有第一金属氧化物层41和第二金属氧化物层 第一金属氧化物层41形成在底电极层3和顶电极层5之间，并与底电极层3欧姆接触。第二金属氧化物层42形成在第一金属氧化物层41和 顶部电极层5，并与顶部电极层5欧姆接触。

公开(公告)号：US20140166966A1

公开(公告)日：2014-06-19

申请号：US14125254

申请日：2012-06-07

申请人： Yutaka Nishioka ,  Kazumasa Horita ,  Natsuki Fukuda ,  Shin Kikuchi ,  Koukou Suu

发明人： Yutaka Nishioka ,  Kazumasa Horita ,  Natsuki Fukuda ,  Shin Kikuchi ,  Koukou Suu

IPC分类号： H01L45/00

CPC分类号： H01L45/1253 ,  G11C11/5614 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/56 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1675

摘要： To provide a resistance change element which does not require a forming process and enables reduction of power consumption and miniaturization of the element, and to provide a method for producing it. A resistance change element 1 according to an embodiment of the present invention includes a bottom electrode layer 3, a top electrode layer 5 and an oxide semiconductor layer 4. The oxide semiconductor layer 4 has a first metal oxide layer 41 and a second metal oxide layer 42. The first metal oxide layer 41 is formed between the bottom electrode layer 3 and the top electrode layer 5, and in ohmic contact with the bottom electrode layer 3. The second metal oxide layer 42 is formed between the first metal oxide layer 41 and the top electrode layer 5, and in ohmic contact with the top electrode layer 5.

摘要翻译： 为了提供不需要成形工艺的电阻变化元件，并且能够降低功耗并且元件的小型化，并提供其制造方法。 根据本发明实施例的电阻变化元件1包括底电极层3，顶电极层5和氧化物半导体层4.氧化物半导体层4具有第一金属氧化物层41和第二金属氧化物层 第一金属氧化物层41形成在底电极层3和顶电极层5之间，并与底电极层3欧姆接触。第二金属氧化物层42形成在第一金属氧化物层41和 顶部电极层5，并与顶部电极层5欧姆接触。

公开(公告)号：US20140102879A1

公开(公告)日：2014-04-17

申请号：US14122966

申请日：2012-06-07

申请人： Yutaka Nishioka ,  Kazumasa Horita ,  Natsuki Fukuda ,  Shin Kikuchi ,  Youhei Ogawa ,  Koukou Suu

发明人： Yutaka Nishioka ,  Kazumasa Horita ,  Natsuki Fukuda ,  Shin Kikuchi ,  Youhei Ogawa ,  Koukou Suu

IPC分类号： H01L45/00

CPC分类号： H01L45/1625 ,  C23C14/08 ,  C23C14/3464 ,  C23C14/3492 ,  C23C14/542 ,  C23C14/548 ,  H01J37/34 ,  H01J37/3426 ,  H01J37/3429 ,  H01L27/101 ,  H01L45/04 ,  H01L45/146

摘要： [Object] To provide a method and an apparatus for manufacturing a variable resistance element by which a metal oxide layer having a desired resistivity can be precisely formed.[Solving Means] The method of manufacturing the variable resistance element according to an embodiment of the present invention includes a step of forming a first metal oxide having a first resistivity and a step of forming a second metal oxide having a second resistivity different from the first resistivity. The first metal oxide is formed on a substrate by sputtering, while sputtering a first target made of an oxide of metal, a second target made of the metal with a first power. The second metal oxide layer is formed on the first metal oxide layer by sputtering the second target with a second power different from the first power while sputtering the first target.

摘要翻译： 提供一种用于制造可变电阻元件的方法和装置，通过该方法和装置可以精确地形成具有所需电阻率的金属氧化物层。 本发明的实施方式的可变电阻元件的制造方法包括：形成具有第一电阻率的第一金属氧化物和形成具有与第一电阻率不同的第二电阻率的第二金属氧化物的工序的工序; 电阻率。 第一金属氧化物通过溅射形成在基板上，同时溅射由金属氧化物制成的第一靶，以第一功率由金属制成的第二靶。 通过在溅射第一靶的同时以不同于第一功率的第二功率溅射第二靶，在第一金属氧化物层上形成第二金属氧化物层。

公开(公告)号：US08507870B2

公开(公告)日：2013-08-13

申请号：US13154525

申请日：2011-06-07

申请人： Yu Arishima ,  Yuichiro Yamashita ,  Masaru Fujimura ,  Shin Kikuchi ,  Shoji Kono ,  Shinichiro Shimizu

发明人： Yu Arishima ,  Yuichiro Yamashita ,  Masaru Fujimura ,  Shin Kikuchi ,  Shoji Kono ,  Shinichiro Shimizu

IPC分类号： G01T1/24

CPC分类号： H04N5/378 ,  H04N5/32 ,  H04N5/3415 ,  H04N5/3575 ,  H04N5/3745 ,  H04N5/37452 ,  H04N5/376

摘要： An imaging apparatus has an imaging area formed by arranging a plurality of imaging blocks each including a pixel array, a plurality of vertical signal lines, a horizontal output line commonly provided for the plurality of vertical signal lines to read out signals read out to the plurality of vertical signal lines, a first scanning circuit, and a second scanning circuit, wherein signals of the pixels of a selected row in the pixel array are read out to the plurality of vertical signal lines in accordance with a driving pulse from the first scanning circuit, the signals read out to the plurality of vertical signal lines are sequentially read out to the horizontal output line in accordance with a driving pulse from the second scanning circuit, and a length in a row direction of the pixel array is smaller than a length in a column direction of the pixel array.

摘要翻译： 成像装置具有通过布置多个成像块而形成的成像区域，每个成像块包括像素阵列，多个垂直信号线，为多个垂直信号线共同设置的水平输出线，以读出读出到多个垂直信号线的信号 垂直信号线，第一扫描电路和第二扫描电路，其中根据来自第一扫描电路的驱动脉冲将像素阵列中的所选行的像素的信号读出到多条垂直信号线 根据来自第二扫描电路的驱动脉冲，向多个垂直信号线读出的信号依次读出到水平输出行，并且像素阵列的行方向的长度小于 像素阵列的列方向。