公开(公告)号：US07355260B2

公开(公告)日：2008-04-08

申请号：US10881678

申请日：2004-06-30

申请人： Vishnu K. Khemka ,  Vijay Parthasarathy ,  Ronghua Zhu ,  Amitava Bose

发明人： Vishnu K. Khemka ,  Vijay Parthasarathy ,  Ronghua Zhu ,  Amitava Bose

IPC分类号： H01L27/095 ,  H01L29/47

CPC分类号： H01L29/66143 ,  H01L29/812 ,  H01L29/872

摘要： A conductive layer includes a first portion that forms a Schottky region with an underlying first region having a first conductivity type. A second region of a second conductivity type underlies the first region, where the second conductivity type is opposite the first conductivity type. A third region of the first conductivity type immediately underlies the second region and is electrically coupled to a cathode of the device.

摘要翻译： 导电层包括形成具有第一导电类型的下面的第一区域的肖特基区域的第一部分。 第二导电类型的第二区域位于第一区域的正下方，其中第二导电类型与第一导电类型相反。 第一导电类型的第三区域刚好在第二区域的下面，并且电耦合到器件的阴极。

公开(公告)号：US20070210401A1

公开(公告)日：2007-09-13

申请号：US11681316

申请日：2007-03-02

申请人： Carmelo Sanfilippo ,  Rossano Carta

发明人： Carmelo Sanfilippo ,  Rossano Carta

IPC分类号： H01L31/07 ,  H01L27/095

CPC分类号： H01L27/0817 ,  H01L29/872

摘要： A trench type junction barrier rectifier has silicon dioxide spacers at the bottom of trenches in a silicon surface and beneath the bottom of a conductive polysilicon filler in the trench. A Schottky barrier electrode is connected to the tops of the mesas and the tops of the polysilicon fillers. Further oxide spacers may be formed in the length of the polysilicon fillers.

摘要翻译： 沟槽型结势垒整流器在硅表面的沟槽的底部具有二氧化硅间隔物，并且在沟槽中的导电多晶硅填料的底部下方具有二氧化硅间隔物。 肖特基势垒电极连接到台面的顶部和多晶硅填料的顶部。 可以在多晶硅填料的长度上形成更多的氧化物间隔物。

公开(公告)号：US20070080421A1

公开(公告)日：2007-04-12

申请号：US11428500

申请日：2006-07-03

申请人： Se-Ho LEE ,  Jae-Hee OH ,  Jae-Hyun PARK

发明人： Se-Ho LEE ,  Jae-Hee OH ,  Jae-Hyun PARK

IPC分类号： H01L27/095 ,  H01L29/47 ,  H01L29/812 ,  H01L31/07 ,  H01L31/108 ,  H01L21/8242

CPC分类号： H01L27/101 ,  H01L27/24

摘要： In an embodiment, a memory device, with a highly integrated cell stricture, includes a mold insulating layer disposed on a semiconductor substrate. At least one conductive line is disposed on the mold insulating layer. Data storage elements self-aligned with the conductive line are interposed between the conductive line and the mold insulating layer. In this case, each of the data storage elements may include a resistor pattern and a barrier pattern, which are sequentially stacked, and the resistor pattern may be self-aligned with the barrier pattern.

摘要翻译： 在一个实施例中，具有高度集成的单元结构的存储器件包括设置在半导体衬底上的模具绝缘层。 在模具绝缘层上设置至少一根导线。 与导线自对准的数据存储元件插入在导线和模绝缘层之间。 在这种情况下，每个数据存储元件可以包括顺序堆叠的电阻器图案和阻挡图案，并且电阻器图案可以与阻挡图案自对准。

公开(公告)号：US07193291B2

公开(公告)日：2007-03-20

申请号：US10809135

申请日：2004-03-25

申请人： Tzu-Chen Lee ,  Michael A. Haase ,  Paul F. Baude

发明人： Tzu-Chen Lee ,  Michael A. Haase ,  Paul F. Baude

IPC分类号： H01L27/095 ,  H01L29/47

CPC分类号： H01L51/105 ,  H01L51/002 ,  H01L51/0051 ,  H01L51/0052 ,  H01L51/0053 ,  H01L51/0059 ,  H01L51/0078 ,  H01L51/0081 ,  H01L51/0579 ,  H01L51/0583

摘要： An organic Schottky diode includes a polycrystalline organic semiconductor layer with a rectifying contact on one side of the layer. An amorphous doped semiconductor layer is placed on the other side of the polycrystalline organic semiconductor layer, and it acts as a buffer between the semiconductor layer and an ohmic contact layer.

摘要翻译： 有机肖特基二极管包括在层的一侧具有整流接触的多晶有机半导体层。 非晶掺杂半导体层被放置在多晶有机半导体层的另一侧上，并且其作为半导体层和欧姆接触层之间的缓冲区。

公开(公告)号：US07187054B2

公开(公告)日：2007-03-06

申请号：US11072868

申请日：2005-03-04

申请人： Tatsuhiko Fujihira ,  Yasushi Miyasaka

发明人： Tatsuhiko Fujihira ,  Yasushi Miyasaka

IPC分类号： H01L27/095 ,  H01L29/47 ,  H01L29/812 ,  H01L31/07

CPC分类号： H01L29/66136 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/36 ,  H01L29/417 ,  H01L29/66143 ,  H01L29/8611 ,  H01L29/872 ,  Y10S257/928

摘要： A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

摘要翻译： 提供一种二极管，其包括第一导电型阴极层，放置在阴极区上并具有比阴极层低的浓度的第一导电型漂移层，大致呈环状的第二导电型环状区域 形成在漂移层中的第二导电型阳极区域，形成在位于环形区域内部的漂移层中的第二导电型阳极区域，与阴极层接触形成的阴极电极以及与该阳极区域接触形成的阳极电极，其中最低 第二导电型阳极区域的电阻率至少为漂移层电阻率的1/100，阳极区域的厚度小于环形区域的扩散深度。

公开(公告)号：US07129558B2

公开(公告)日：2006-10-31

申请号：US10289486

申请日：2002-11-06

申请人： Slawomir Skocki

发明人： Slawomir Skocki

IPC分类号： H01L27/095 ,  H01L29/00 ,  H01L23/48

CPC分类号： H01L29/872 ,  H01L24/02 ,  H01L24/72 ,  H01L29/417 ,  H01L2924/12032 ,  H01L2924/13091 ,  H01L2924/00

摘要： A chip-scale schottky package which has at least one cathode electrode and at least one anode electrode disposed on only one major surface of a die, and solder bumps connected to the electrode for surface mounting of the package on a circuit board.

摘要翻译： 一种芯片级肖特基封装，其具有至少一个阴极电极和至少一个设置在管芯的一个主表面上的阳极电极，以及连接到电极的焊料凸块，用于在电路板上表面安装封装。

公开(公告)号：US20060211222A1

公开(公告)日：2006-09-21

申请号：US11275748

申请日：2006-01-26

申请人： Robert Linares

发明人： Robert Linares

IPC分类号： H01L21/00 ,  H01L29/47 ,  H01L27/095 ,  H01L29/812 ,  H01L31/07 ,  H01L31/108

CPC分类号： C30B23/02 ,  C30B25/02 ,  C30B25/105 ,  C30B29/04 ,  C30B29/406 ,  C30B31/18 ,  H01L21/02376 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02658 ,  H01L33/007 ,  H01S5/0213 ,  H01S5/32341

摘要： Gallium nitride devices are formed on a diamond substrate, such as for light emitting diodes as a replacement for incandescent light bulbs and fluorescent light bulbs. In one embodiment, gallium nitride diodes (or other devices) are formed on diamond in at least two methods. A first method comprises growing gallium nitride on diamond and building devices on that gallium nitride layer. The second method involves bonding gallium nitride (device or film) onto diamond and building the device onto the bonded gallium nitride. These devices may provide significantly higher efficiency than incandescent or fluorescent lights, and provide significantly higher light or energy density than other technologies. Similar methods and structures result in other gallium nitride semiconductor devices.

摘要翻译： 氮化镓器件形成在金刚石衬底上，例如作为白炽灯泡和荧光灯泡的替代品的发光二极管。 在一个实施例中，氮化镓二极管（或其它器件）以至少两种方法形成在金刚石上。 第一种方法包括在该氮化镓层上生长金刚石和建筑器件上的氮化镓。 第二种方法包括将氮化镓（器件或膜）接合到金刚石上并将该器件构建到结合的氮化镓上。 这些器件可以提供比白炽灯或荧光灯明显更高的效率，并且提供比其他技术显着更高的光或能量密度。 类似的方法和结构导致其他氮化镓半导体器件。

公开(公告)号：US07078781B2

公开(公告)日：2006-07-18

申请号：US10942000

申请日：2004-09-16

申请人： Tetsuo Hatakeyama ,  Takashi Shinohe

发明人： Tetsuo Hatakeyama ,  Takashi Shinohe

IPC分类号： H01L27/095 ,  H01L29/861 ,  H01L29/00

CPC分类号： H01L29/7811 ,  H01L29/0615 ,  H01L29/0661 ,  H01L29/0692 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7392 ,  H01L29/7395 ,  H01L29/7722 ,  H01L29/7802 ,  H01L29/872

摘要： A high-breakdown-voltage semiconductor device includes a high-resistance semiconductor layer, first trenches formed on the surface thereof in a longitudinal plane shape and in parallel, a Schottky electrode formed thereon and sandwiched between adjacent first trenches, a first region having an opposite conductivity type to the semiconductor layer continuously disposed in a sidewall and a bottom of each of the first trenches, a sidewall insulating film disposed on the sidewall, a second region of the opposite conductivity type disposed in the bottom of each of the first trenches, a third region disposed on the opposite surface of the semiconductor layer, a control electrode filling each of the first trenches in contact with the second region and connected to the Schottky electrode, a backside electrode formed on the third region, wherein second trenches communicate with the first trenches at both ends of longitudinal sides thereof, and the Schottky electrode is surrounded by the first and second trenches.

摘要翻译： 高耐压半导体器件包括：高电阻半导体层，在其表面上形成纵向平面形状并且平行的第一沟槽，形成在其上并夹在相邻第一沟槽之间的肖特基电极，第一区域具有相反的 导电类型连续地设置在每个第一沟槽的侧壁和底部中的半导体层，设置在侧壁上的侧壁绝缘膜，设置在每个第一沟槽的底部的相反导电类型的第二区域， 第三区域，设置在所述半导体层的相对表面上;控制电极，填充与所述第二区域接触并连接到所述肖特基电极的每个所述第一沟槽;形成在所述第三区域上的背面电极，其中，所述第二沟槽与所述第一沟槽连通， 沟槽在其纵向侧的两端，肖特基电极被第一个a包围 第二个沟渠。

公开(公告)号：US07064407B1

公开(公告)日：2006-06-20

申请号：US11051520

申请日：2005-02-04

申请人： Shekar Mallikarjunaswamy

发明人： Shekar Mallikarjunaswamy

IPC分类号： H01L27/095 ,  H01L29/47 ,  H01L29/812 ,  H01L31/07 ,  H01L31/108

CPC分类号： H01L27/0727 ,  H01L27/095 ,  H01L27/098 ,  H01L29/0843 ,  H01L29/8083

摘要： A JFET controlled Schottky barrier diode includes a p-type diffusion region integrated into the cathode of the Schottky diode to form an integrated JFET where the integrated JFET provides on-off control of the Schottky barrier diode. The p-type diffusion region encloses a portion of the forward current path of the Schottky barrier diode where the p-type diffusion region forms the gate of the JFET and the enclosed portion of the forward current path forms the channel region of the JFET. By applying a reverse biased potential to the gate of the JEFT with respect to the anode of the Schottky diode, the forward current of the Schottky diode can be pinched off, thereby providing on-off control over the Schottky diode forward current.

摘要翻译： JFET控制的肖特基势垒二极管包括集成到肖特基二极管的阴极中的p型扩散区，以形成集成JFET，其中集成JFET提供肖特基势垒二极管的导通截止控制。 p型扩散区包围肖特基势垒二极管的正向电流通路的一部分，其中p型扩散区形成JFET的栅极，并且正向电流通路的封闭部分形成JFET的沟道区。 通过相对于肖特基二极管的阳极向JEFT的栅极施加反向偏置电位，可以将肖特基二极管的正向电流夹断，从而对肖特基二极管正向电流进行开关控制。

公开(公告)号：US20060125041A1

公开(公告)日：2006-06-15

申请号：US11296152

申请日：2005-12-06

申请人： Jong Yang ,  In Baek ,  Ki Im ,  Chang Ahn ,  Won Cho ,  Seong Lee

发明人： Jong Yang ,  In Baek ,  Ki Im ,  Chang Ahn ,  Won Cho ,  Seong Lee

IPC分类号： H01L27/095

CPC分类号： H01L29/66659 ,  H01L21/26586 ,  H01L21/28052 ,  H01L21/28202 ,  H01L29/495 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66643 ,  H01L29/7835 ,  H01L29/7839

摘要： A transistor using impact ionization and a method of manufacturing the same are provided. A gate dielectric layer, a gate, and first and second spacers are formed on a semiconductor substrate. A first impurity layer is formed spaced from the first spacer and a second impurity layer is formed expanding and overlapping with the second spacer therebelow, by performing slant ion-implantation on the semiconductor substrate using the gate and the first and second spacers as a mask. A source and a drain are formed on the semiconductor substrate to be self-aligned with the first and second spacers, respectively, thereby defining an ionization region between the source and the drain in the semiconductor substrate. The source includes a first silicide layer to form a schottky junction with the ionization region. The drain includes a portion of the second impurity layer overlapping with the second spacer and a second silicide layer which is aligned with the second spacer to form an ohmic contact with the second impurity layer.

摘要翻译： 提供了使用冲击电离的晶体管及其制造方法。 栅极电介质层，栅极以及第一和第二间隔物形成在半导体衬底上。 第一杂质层与第一间隔物隔开形成，并且通过使用栅极和第一和第二间隔物作为掩模在半导体衬底上进行倾斜离子注入，形成第二杂质层与其间的第二间隔物膨胀和重叠。 源极和漏极分别形成在半导体衬底上以与第一和第二间隔物自对准，由此在半导体衬底中的源极和漏极之间限定电离区域。 源包括与电离区形成肖特基结的第一硅化物层。 漏极包括与第二间隔物重叠的第二杂质层的一部分和与第二间隔物对准的第二硅化物层以与第二杂质层形成欧姆接触。