公开(公告)号：US20170153367A1

公开(公告)日：2017-06-01

申请号：US15357871

申请日：2016-11-21

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Romain Girard Desprolet ,  Sandrine Lhostis ,  Salim Boutami

IPC: G02B5/20 ,  H01L27/146

CPC classification number: G02B5/208 ,  G02B5/20 ,  G02B5/204 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14645 ,  H01L27/14649

Abstract: An infrared high-pass plasmonic filter includes a copper layer interposed between two layers of a dielectric material. An array of patterned openings extend through the copper layer and are filled with the dielectric material. Each patterned opening is in the shape of a greek cross, with the arms of adjacent patterns being collinear. A ratio of the width to the length of each arm is in the range from 0.3 to 0.6, and the distance separating the opposite ends of arms of adjacent patterns is shorter than 10 nm.

公开(公告)号：US09640631B2

公开(公告)日：2017-05-02

申请号：US14970341

申请日：2015-12-15

Applicant: STMicroelectronics SA

Inventor： Alain Chantre ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/66 ,  H01L21/8249 ,  H01L27/12 ,  H01L29/73 ,  H01L29/732 ,  H01L29/737 ,  H01L29/10

CPC classification number: H01L29/66272 ,  H01L21/8249 ,  H01L27/1203 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66265 ,  H01L29/73 ,  H01L29/7317 ,  H01L29/7322 ,  H01L29/7371

Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.

公开(公告)号：US09638589B2

公开(公告)日：2017-05-02

申请号：US14311497

申请日：2014-06-23

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Vincent Fiori ,  Pierre Bar ,  Sébastien Gallois-Garreignot

IPC: G01L1/00 ,  G01L1/20 ,  G01L25/00 ,  G01B7/16 ,  G01L1/22 ,  G01L5/16 ,  H01L21/66

CPC classification number: G01L1/20 ,  G01B7/18 ,  G01L1/2287 ,  G01L5/161 ,  G01L25/00 ,  H01L22/34

Abstract: A method and corresponding system are provided for determining a three-dimensional stress field of an object having a flat surface. At least four flat resistors are placed on the flat surface of the object, with at least one of the resistors having a geometry different from that of the others. A variation of resistance of the resistors is measured. The three-dimensional stress field is determined from a system of equations involving the stress field, values of variations of the measured resistive values and sensitivity parameters of the resistors.

公开(公告)号：US09614367B2

公开(公告)日：2017-04-04

申请号：US14475683

申请日：2014-09-03

Applicant: STMicroelectronics SA

Inventor： Philippe Galy ,  Johan Bourgeat

IPC: H02H9/00 ,  H02H9/04 ,  H01L27/02 ,  H01L29/74

CPC classification number: H02H9/046 ,  H01L27/0262 ,  H01L27/0277 ,  H01L29/7436 ,  H02H9/044

Abstract: A device includes a transistor configured for operating in a hybrid mode, an element configured for generating and injecting a current into the substrate of the transistor in the presence of an ESD pulse, and a thyristor triggerable at least by the element.

公开(公告)号：US09543409B2

公开(公告)日：2017-01-10

申请号：US14855834

申请日：2015-09-16

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Christian Arvet ,  Sebastien Barnola ,  Sebastien Lagrasta ,  Nicolas Posseme

IPC: H01L29/66 ,  H01L21/283 ,  H01L21/311 ,  H01L29/423 ,  H01L29/51

CPC classification number: H01L29/6656 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/283 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L29/42364 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66628

Abstract: The production of spacers at flanks of a transistor gate, including a step of forming a dielectric layer covering the gate and a peripheral region of a layer of semiconductor material surrounding the gate, including forming a superficial layer covering the gate and the peripheral region; partially removing the superficial layer configured so as to completely remove the superficial layer at the peripheral region while preserving a residual part of the superficial layer at the flanks; and selective etching of the dielectric layer vis-à-vis the material of the residual part of the superficial layer and vis-à-vis the semiconductor material.

Abstract translation: 在晶体管栅极的侧面制造间隔物，包括形成覆盖栅极的介电层和围绕栅极的半导体材料层的外围区域的步骤，包括形成覆盖栅极和外围区域的表面层; 部分去除表层，构造成在外围区域完全除去表层，同时在侧面保留表层的残留部分; 并且相对于表层的残余部分的材料和相对于半导体材料的材料的电介质层的选择性蚀刻。

公开(公告)号：US20170005517A1

公开(公告)日：2017-01-05

申请号：US15041181

申请日：2016-02-11

Applicant: STMicroelectronics SA

Inventor： Julien Goulier

IPC: H02J50/10 ,  H02J50/80

CPC classification number: H02J50/10 ,  H02J50/20 ,  H02J50/80

Abstract: A contactless card is powered by an antenna connected to the input of a rectifier. An output of the rectifier is coupled to a processing unit that consumes a first current output from the rectifier. A current regulation circuit is connected to the output of the rectifier. The current regulation circuit operates to absorb a second current from the output of the rectifier such that a sum of the first and second currents is a constant current.

Abstract translation: 非接触式卡由连接到整流器输入端的天线供电。 整流器的输出耦合到消耗来自整流器的第一电流输出的处理单元。 电流调节电路连接到整流器的输出端。 电流调节电路用于从整流器的输出吸收第二电流，使得第一和第二电流的和是恒定电流。

公开(公告)号：US20170003449A1

公开(公告)日：2017-01-05

申请号：US14754994

申请日：2015-06-30

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Jean-Robert MANOUVRIER ,  Jean-Francois CARPENTIER ,  Patrick LEMAITRE

IPC: G02B6/124 ,  G02B6/30 ,  G02B5/18

CPC classification number: G02B6/124 ,  G02B6/29395 ,  G02B6/30 ,  G02F1/025 ,  G02F2201/302

Abstract: An electro-optic device may include a photonic chip having an optical grating coupler at a surface. The optical grating coupler may include a first semiconductor layer having a first base and first fingers extending outwardly from the first base. The optical grating coupler may include a second semiconductor layer having a second base and second fingers extending outwardly from the second base and being interdigitated with the first fingers to define semiconductor junction areas, with the first and second fingers having a non-uniform width. The electro-optic device may include a circuit coupled to the optical grating coupler and configured to bias the semiconductor junction areas and change one or more optical characteristics of the optical grating coupler.

Abstract translation: 电光器件可以包括在表面具有光栅耦合器的光子芯片。 光栅耦合器可以包括第一半导体层，其具有从第一基底向外延伸的第一基底和第一指状物。 光栅耦合器可以包括第二半导体层，第二半导体层具有从第二基底向外延伸的第二基极和第二指状物，并且与第一指状物交叉以限定半导体结区域，第一和第二指状物具有不均匀的宽度。 电光器件可以包括耦合到光栅耦合器并被配置为偏置半导体结区域并改变光栅耦合器的一个或多个光学特性的电路。

公开(公告)号：US20160380427A1

公开(公告)日：2016-12-29

申请号：US14964704

申请日：2015-12-10

Applicant: STMicroelectronics SA

Inventor： Johan Bourgeat ,  Boris Heitz ,  Jean Jimenez

IPC: H02H9/04

CPC classification number: H02H9/04 ,  H01L27/0262 ,  H01L27/0285 ,  H02H9/046

Abstract: An electronic device includes first and second terminals with an electronic circuit coupled there between. The electronic circuit includes a protection circuit and a resistive-capacitive circuit. The resistive-capacitive circuit triggers the protection circuit to protect against electrostatic discharges in the presence of a current pulse between the first and second terminals. A control circuit is configured to slow down a discharge from the resistive-capacitive circuit when the protection circuit is triggered.

Abstract translation: 电子设备包括第一和第二终端，其间连接有电子电路。 电子电路包括保护电路和电阻电容电路。 电阻电容电路在第一和第二端子之间存在电流脉冲的情况下触发保护电路以防止静电放电。 控制电路被配置为当触发保护电路时减缓来自电阻电容电路的放电。

公开(公告)号：US09500805B2

公开(公告)日：2016-11-22

申请号：US14656981

申请日：2015-03-13

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Jean-Robert Manouvrier ,  Patrick Lemaitre ,  Jean-Francois Carpentier

IPC: G02B6/13 ,  H01L29/74 ,  G02B6/12 ,  G02B6/132

CPC classification number: G02B6/12 ,  G02B6/122 ,  G02B6/13 ,  G02B6/132 ,  H01L29/74

Abstract: An optical waveguide in a semiconductor material, may include, between two adjacent portions of the waveguide, a plurality of parallel strips of alternating conductivity types forming a plurality of opposing bipolar junctions between the two adjacent portions.

Abstract translation: 在半导体材料中的光波导可以包括在波导的两个相邻部分之间的多个交替导电类型的平行条带，在两个相邻部分之间形成多个相对的双极结。

公开(公告)号：US20160313578A1

公开(公告)日：2016-10-27

申请号：US15198114

申请日：2016-06-30

Applicant: STMICROELECTRONICS SA

Inventor： JEAN-ROBERT MANOUVRIER

IPC: G02F1/025 ,  H01L31/0232 ,  H01L31/11 ,  G02F1/225 ,  G02F1/01

CPC classification number: G02F1/025 ,  G02B6/12 ,  G02F1/2257 ,  H04B10/548

Abstract: A semiconductor electro-optical phase shifter may include an optical action zone configured to be inserted in an optical waveguide, and a bipolar transistor structure configured so that, in operation, collector current of the bipolar transistor structure crosses the optical action zone perpendicular to the axis of the optical waveguide.

Abstract translation: 半导体电光移相器可以包括被配置为插入在光波导中的光学作用区域和双极晶体管结构，其被配置为使得在操作中双极晶体管结构的集电极电流与垂直于轴线的光学作用区域相交 的光波导。