中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

84 records (took 0.017 seconds)

    Trench capacitor with insulating collar, and appropriate method of fabrication
    61.
    发明申请
    Trench capacitor with insulating collar, and appropriate method of fabrication 审中-公开
    带绝缘套管的沟槽电容器及适当的制造方法

    公开(公告)号：US20050173749A1

    公开(公告)日：2005-08-11

    申请号：US11049295

    申请日：2005-02-03

    Applicant: Harald Seidl

    Inventor： Harald Seidl

    IPC: H01L21/334 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

    CPC classification number: H01L29/945 ,  H01L27/10861 ,  H01L27/1087 ,  H01L29/66181

    Abstract: The present invention provides a trench capacitor, particularly for use in a semiconductor memory cell, having a trench which is formed in a semiconductor substrate; a first conductive capacitor plate which is situated in and/or next to the trench; a second conductive capacitor plate which is situated in the trench; a dielectric layer, which is situated between the first and second capacitor plates, as capacitor dielectric; and an insulating collar in the upper region of the trench. At least one layer of the first first conductive capacitor plate and/or of the second conductive capacitor plate is made of a material from the class containing the metal borides, metal phosphides and metal antimonides of the transition metals from the secondary groups IV, V and VI of the periodic table.

    Abstract translation: 本发明提供一种特别用于半导体存储单元的沟槽电容器，其具有形成在半导体衬底中的沟槽; 第一导电电容器板，位于沟槽中和/或与沟槽相邻; 位于沟槽中的第二导电电容器板; 介电层位于第一和第二电容器板之间，作为电容器电介质; 以及在沟槽的上部区域中的绝缘套环。 第一第一导电电容器板和/或第二导电电容器板的至少一层由来自第二族IV，V和V族的过渡金属的金属硼化物，金属磷化物和金属锑化物的材料制成， VI的周期表。

    Method for fabricating a trench capacitor having an insulation collar, which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell
    63.
    发明申请
    Method for fabricating a trench capacitor having an insulation collar, which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell 失效
    一种用于制造具有绝缘套环的沟槽电容器的方法，所述绝缘套环通过埋入触点电连接到一侧的衬底，特别是用于半导体存储器单元

    公开(公告)号：US20050070066A1

    公开(公告)日：2005-03-31

    申请号：US10935520

    申请日：2004-09-07

    Applicant: Martin Gutsche ,  Harald Seidl

    Inventor： Martin Gutsche ,  Harald Seidl

    IPC: H01L21/02 ,  H01L21/20 ,  H01L21/334 ,  H01L21/336 ,  H01L21/82 ,  H01L21/8242 ,  H01L27/108

    CPC classification number: H01L27/10867 ,  H01L27/10829 ,  H01L27/1087 ,  H01L29/66181

    Abstract: The present invention provides a method for fabricating a trench capacitor having an insulation collar (10; 10a, 10b) in a substrate (1), which is electrically connected to the substrate (1) on one side via a buried contact (15a, 15b), in particular for a semiconductor memory cell having a planar select transistor which is provided in the substrate (1) and is connected via the buried contact (15a, 15b), comprising the steps of: providing a trench (5) in the substrate (1) using a hard mask (2, 3) with a corresponding mask opening; providing a capacitor dielectric (30) in the lower and middle regions of the trench, the insulation collar (10) in the middle and upper regions of the trench and an electrically conductive filling (20) at least up to the top side of the insulation collar (10); completely filling the trench (5) with a filling material (50; 50′; 50″; 20); carrying out an STI trench production process; removing the filling material (50; 50′; 50″; 20) and lowering the electrically conductive filling (20) to below the top side of the insulation collar (10); forming an insulation region (IS; IS1, IS2) on one side with respect to the substrate (1) above the insulation collar (10); uncovering a connection region (KS; KS1, KS2) on the other side with respect to the substrate (1) above the insulation collar (10); and forming the buried contact (15a, 15b) by depositing and etching back a C filling (70; 70′; 70″; 70′″).

    Abstract translation: 本发明提供一种在衬底（1）中具有绝缘套环（10; 10a，10b）的沟槽电容器的制造方法，该沟槽电容器在一侧通过埋入触点（15a，15b）电连接到衬底 ），特别是具有设置在基板（1）中并通过埋入触点（15a，15b）连接的平面选择晶体管的半导体存储单元，包括以下步骤：在基板中提供沟槽（5） （1）使用具有相应掩模开口的硬掩模（2,3）; 在所述沟槽的下部和中部区域中提供电容器电介质（30），所述沟槽的中部和上部区域中的所述绝缘环（10）和至少直到所述绝缘体的顶侧的导电填料（20） 衣领（10）; 用填充材料（50; 50'; 50“; 20）完全填充沟槽（5）; 开展STI沟槽生产工艺; 去除所述填充材料（50; 50'; 50“; 20）并将所述导电填料（20）降低到所述绝缘套环（10）的顶侧下方; 在所述绝缘套环（10）上方相对于所述基板（1）在一侧上形成绝缘区域（IS; IS1，IS2）; 在绝缘套环（10）上方相对于衬底（1）露出另一侧的连接区域（KS; KS1，KS2）; 以及通过沉积和蚀刻C填充物（70; 70'; 70“; 70”'）来形成所述埋入触点（15a，15b）。

    Method of fabricating an oxide collar for a trench capacitor
    64.
    发明申请
    Method of fabricating an oxide collar for a trench capacitor 有权
    制造用于沟槽电容器的氧化物环的方法

    公开(公告)号：US20050037565A1

    公开(公告)日：2005-02-17

    申请号：US10765052

    申请日：2004-01-28

    Applicant: Harald Seidl ,  Martin Gutsche ,  Thomas Hecht

    Inventor： Harald Seidl ,  Martin Gutsche ,  Thomas Hecht

    IPC: C23C16/00 ,  H01L21/02 ,  H01L21/31 ,  H01L21/311 ,  H01L21/314 ,  H01L21/70 ,  H01L21/8234 ,  H01L21/8242

    CPC classification number: H01L21/3141 ,  H01L21/31116 ,  H01L27/1087

    Abstract: A method for fabricating patterned ceramic layers on areas of a relief structure, wherein the layers may be arranged essentially perpendicular to a top side of a substrate. In exemplary embodiments, a patterned ceramic layer forms an oxide collar for a trench capacitor. The oxide collar is produced by a trench firstly being filled with a resist in its lower section, and an oxide layer subsequently being produced on the uncovered areas of the substrate with the aid of a low temperature ALD method. By means of anisotropic etching, only those portions of the ceramic layer which are arranged at the perpendicular walls of the trench remain. The resist filling may subsequently be removed, for example, by means of an oxygen plasma.

    Abstract translation: 一种用于在浮雕结构的区域上制造图案化陶瓷层的方法，其中所述层可以布置成基本上垂直于衬底的顶侧。 在示例性实施例中，图案化陶瓷层形成用于沟槽电容器的氧化物环。 氧化物套环由首先在其下部填充有抗蚀剂的沟槽产生，随后在低温ALD方法的帮助下在衬底的未覆盖区域上产生氧化物层。 通过各向异性蚀刻，仅保留布置在沟槽的垂直壁处的陶瓷层的那些部分。 可以随后例如通过氧等离子体去除抗蚀剂填充。

    Method for fabricating trench capacitor with insulation collar electrically connected to substrate through buried contact, in particular, for a semiconductor memory cell
    65.
    发明申请
    Method for fabricating trench capacitor with insulation collar electrically connected to substrate through buried contact, in particular, for a semiconductor memory cell 失效
    用于制造具有绝缘环的沟槽电容器的方法，所述绝缘套环通过埋入触点电连接到衬底，特别是用于半导体存储器单元

    公开(公告)号：US20050026384A1

    公开(公告)日：2005-02-03

    申请号：US10901406

    申请日：2004-07-27

    Applicant: Stephan Kudelka ,  Martin Popp ,  Harald Seidl ,  Annette Sanger

    Inventor： Stephan Kudelka ,  Martin Popp ,  Harald Seidl ,  Annette Sanger

    IPC: H01L21/20 ,  H01L21/334 ,  H01L21/8242 ,  H01L27/108

    CPC classification number: H01L27/1087 ,  H01L27/10829 ,  H01L29/66181

    Abstract: Fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected thereto on one side through a buried contact, in particular, for a semiconductor memory cell with a planar selection transistor in the substrate and connected through the buried contact, includes providing a trench using an opening in a hard mask, providing a capacitor dielectric in lower and central trench regions, the collar in central and upper trench regions, and a conductive filling at least as far as the insulation collar topside, completely filling the trench with a filling material, carrying out STI trench fabrication process, removing the filling material and sinking the filling to below the collar topside, forming an insulation region on one side above the collar; uncovering a connection region on a different side above the collar, and forming the buried contact by depositing and etching back a metallic filling.

    Abstract translation: 在衬底中制造具有绝缘套环的沟槽电容器，其在一侧通过埋入触点电连接，特别地，用于具有衬底中的平面选择晶体管并通过埋入触点连接的半导体存储器单元包括提供 在硬掩模中使用开口的沟槽，在下部和中部沟槽区域中提供电容器电介质，在中央和上部沟槽区域中的套环，以及至少与绝缘套环顶部一样的导电填充物，完全用一个 填充材料，执行STI沟槽制造工艺，去除填充材料并将填充物下沉到轴环顶部以下，在轴环上方的一侧上形成绝缘区域; 露出套环上方不同侧的连接区域，并通过沉积和蚀刻金属填充物来形成掩埋触点。

Patent Agency Ranking