公开(公告)号：US3786320A

公开(公告)日：1974-01-15

申请号：US3786320D

申请日：1969-09-29

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KANO G ,  FUJIWARA S ,  SAWAKI T ,  IIZUKA M ,  HASEGAWA H

IPC: G01L1/18 ,  H01L21/00 ,  H01L29/00 ,  H01L29/84 ,  H01L11/00 ,  H01L15/00

CPC classification number: H01L29/84 ,  G01L1/18 ,  H01L21/00 ,  H01L29/00

Abstract: Disclosed is a pressure-sensitive transistor whose emitter or collector junction is formed by use of a Schottky barrier junction and wherein the current through the transistor changes in accordance with the applied pressure when pressure is applied to said junction by pressure applying means. Such a transistor is advantageous in that a high pressure-to-current conversion factor is obtained, little noise is generated at the junction, and the reverse leakage current appearing at the junction is extremely small.

Abstract translation: 公开了一种压敏晶体管，其发射极或集电极结通过使用肖特基势垒结形成，并且其中当压力通过压力施加装置施加到所述接合点时，通过晶体管的电流根据施加的压力而变化。 这样的晶体管的优点在于，获得高的压力 - 电流转换因子，在结处产生很少的噪声，并且在结处出现的反向泄漏电流非常小。

公开(公告)号：US3764864A

公开(公告)日：1973-10-09

申请号：US3764864D

申请日：1967-03-21

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： OKUMURA T ,  TSUCHITANI A ,  HASEGAWA T

IPC: H01L27/02 ,  H01L11/00 ,  H01L15/00

CPC classification number: H01L27/0255

Abstract: An insulated gate field-effect transistor constructed by forming, in a portion of the semiconductor substrate close to the source region, a region which constitutes a p-n junction with the substrate, and by connecting this latter region to the gate electrode, whereby there is caused, between said region and the source, a current due to punch-through at high gate voltage so that the breakdown of the transistor is prevented.

Abstract translation: 一种绝缘栅场效应晶体管，其通过在靠近源极区域的半导体衬底的一部分中形成与衬底构成pn结的区域，并将后一区域连接到栅极电极，由此产生 在所述区域和源极之间，由于在高栅极电压下穿通导致的电流，从而防止了晶体管的击穿。

公开(公告)号：US3764366A

公开(公告)日：1973-10-09

申请号：US3764366D

申请日：1970-10-30

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： OKAMOTO M ,  NINAGAWA C ,  ASHIZAKI S

IPC: H01J9/227 ,  H01J9/22 ,  H01J29/32

CPC classification number: H01J9/2274

Abstract: IN ORDER TO AVOID UNDESIRABLE LOSS OF COLOR DISPARITY IN THE PERFORMANCE OF A CATHODE RAY TUBE OF THE MULTIBEAM, MULTI-COLOR, SHADOW MASK TYPE, IT IS PREFERABLE TO LIMIT THE DIAMETER OF EACH COLOR DOT ON THE PHOSPHOR SCREEN. IN THE PROCESS OF FIXING PHOSPHOR DOTS ON A PHOSPHOR SCREEN INSIDE A FACE PLATE OF THE CATHODE RAY TUBE DURING THE FABRICATION THEREOF, A SPECIALLY SHAPED LIGHTEMITTING SOURCE IS EMPLOYED, IN ORDER TO LIMIT THE DIAMETER OF EACH PHOSPHOR DOT TO NO LARGER THAN THAT OF EACH APERTURE IN THE SHADOW MASK THROUGH WHICH ULTRAVIOLET RAYS STRIKE THE SCREEN TO FIX SAID DOT. SAID LIGHT-EMITTING SOURCE IS FORMED TO HAVE A LIGHT-EMITTING FACE WHICH IS SHAPED IN THE FORM OF A RING DISPOSED IN PARALLEL RELATIONSHIP WITH THE FACE PLATE AND WHICH IS FORMED ON THE TOP OF A LIGHT CONDUIT MADE OF A TRANSPARENT MATERIAL.

公开(公告)号：US3742315A

公开(公告)日：1973-06-26

申请号：US3742315D

申请日：1971-10-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KANO G ,  HASEGAWA H ,  IIZUKA M ,  FUJIWARA S ,  TERAMOTO I ,  IWASA H

IPC: H01L21/306 ,  H01L23/485 ,  H01L29/00 ,  H01L29/872 ,  H01L5/02 ,  H01L7/50 ,  H01L7/60

CPC classification number: H01L29/872 ,  H01L21/30608 ,  H01L23/4855 ,  H01L29/00 ,  H01L2924/0002 ,  Y10S148/051 ,  Y10S148/102 ,  Y10S148/115 ,  Y10S148/139 ,  H01L2924/00

Abstract: A semiconductor device having a Schottky barrier junction formed in the bottom of a polygonal recess on a surface of a semiconductor substrate comprises an undercut in the recess beneath an insulating mask formed on the substrate, and a metal passing through the mask and extending to the bottom of the recess for forming said junction. The undercut provides an enclosed spacing encircling the junction portion of said metal and said semiconductor, thereby improving the backward breakdown voltage characteristic therein.

公开(公告)号：US3714598A

公开(公告)日：1973-01-30

申请号：US3714598D

申请日：1971-03-22

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： WAKAI S ,  NABAE M

IPC: H03G3/20 ,  H03G3/30 ,  H03G3/34 ,  H04N5/53

CPC classification number: H04N5/53 ,  H03G3/3052 ,  H03G3/345

Abstract: An AGC amplifier having a Darlington pair as a noise gate circuit for preventing the development of unwanted AGC outputs due to noise pulses. The Darlington pair develops a larger overdrive with the same base current than if a single transistor is employed, so a longer storage time of the transistors results, lengthening the gate period. This makes available an AGC amplifier circuit with a noise gate circuit whose gate period is longer without using a capacitor, thereby providing a convenient means for application to monolithic integrated circuits.

公开(公告)号：US3705364A

公开(公告)日：1972-12-05

申请号：US3705364D

申请日：1969-09-29

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKESHIMA MASUMI

IPC: H03C3/22 ,  H01L21/00 ,  H01L21/308 ,  H01L29/00 ,  H03B9/12 ,  H03B9/14 ,  H03C7/02 ,  H03L7/04 ,  H03C3/08

CPC classification number: H03L7/04 ,  H01L21/00 ,  H01L21/308 ,  H01L29/00 ,  H03B9/141 ,  H03B2200/0068

Abstract: Apparatus for generating microwaves comprising a cavity resonator, a microwave generating element and a solid-state variable reactance element such as a variable capacitance diode, both of these elements being disposed within the cavity resonator. It is possible to obtain a controlled and/or a modulated microwave output from the apparatus by varying the reactance of and/or by supplying a modulating signal to the variable reactance element.

公开(公告)号：US3600235A

公开(公告)日：1971-08-17

申请号：US3600235D

申请日：1969-06-02

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： OKUMURA TOMISABURO

IPC: H01L21/316 ,  H01L29/00 ,  H01L7/34

CPC classification number: H01L21/31662 ,  H01L21/02238 ,  H01L21/02255 ,  H01L29/00 ,  Y10S148/141

Abstract: A MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE HAVING A SOURCE AND DRAIN DOPED OPPOSITE CONDUCTION TYPE TO THE SUBSTRATE AND A GATE ON AN INSULATOR FILM COATED ON A SURFACE PORTION OF THE SEMICONDUCTOR SUBSTRATE BETWEEN BOTH DOPED REGIONS; FORMING A DOPED LAYER PRELIMINARILY ON THE WHOLE SURFACE OF SUBSTRATE, ETCHING THESE LAYERS SO AS TO FORM THE SOURCE AND DRAIN REGIONS, AND FORMING A GATE INSULATOR FILM ON THE PORTIONS WHERE THE DOPED LAYERS ARE REMOVED BY ETCHING, THEREBY FORMING THE GATE ELECTRODE ON THESE PORTIONS. BY THESE STEPS A SEMICONDUCTOR DEVICE HAVING A HIGH MUTUAL CONDUCTANCE AND A LOW INPUT ELECTRIC CAPACITANCE CAN BE OBTAINED. THIS METHOD IS APPLICABLE TO THE MANUFACTURE OF ACTIVE ELEMENTS SUCH AS TRANISTORS AND FURTHER INTEGRATED CIRCUIT ELEMENT.

公开(公告)号：US3591838A

公开(公告)日：1971-07-06

申请号：US3591838D

申请日：1968-12-23

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJIWARA SHOHEI ,  KANO GOTA ,  MATSUOKA SHUNSUKE ,  SAWAKI TSUKASA

IPC: H01L21/00 ,  H01L21/20 ,  H01L21/24 ,  H01L21/28 ,  H01L21/283 ,  H04R1/10 ,  H04R5/033 ,  H01L3/00

CPC classification number: H01L21/28 ,  H01L21/00 ,  H01L21/24 ,  H01L21/283 ,  Y10S148/02

Abstract: In a semiconductor device a metal electrode film formed by an evaporated gold-chromium alloy containing 3 percent to 13 percent by weight of chromium can not only make low ohmic contact with the semiconductor substrate but can be connected to it mechanically firmly. The lead-tin eutectic alloy can be soldered satisfactorily to the metal electrode film without causing erosion even if the electrode film is dipped in a fused solder solution. The semiconductor device with such a gold-chromium alloy film has great industrial merit since the manufacturing steps, particularly the connection of external electrode lead wires, are greatly simplified.

公开(公告)号：US3578754A

公开(公告)日：1971-05-18

申请号：US3578754D

申请日：1969-02-25

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KUSUDA ZENJI ,  KOBAYASHI TAKEJI

IPC: F25D21/08 ,  F24F11/02 ,  F25D21/00 ,  G05D23/24 ,  F25D21/06

CPC classification number: F25D21/006 ,  F25D2700/122 ,  G05D23/1909 ,  G05D23/24

Abstract: A defrosting controller for electric refrigerators which is operated under control of a first transistor adapted for triggering a silicon-controlled rectifier depending upon the result detected by a temperature detector in the freezer of the refrigerator and under control of a second transistor for keeping the first transistor in one state during the defrosting operation so that the defrosting operation is automatically stopped as soon as the temperature within the freezer reaches a predetermined temperature after starting the defrosting operation. Thus, frost accumulated within the freezing compartment can completely be removed and an unnecessary temperature rise within the freezing and provisions compartments can be prevented.

公开(公告)号：US3573352A

公开(公告)日：1971-04-06

申请号：US3573352D

申请日：1968-04-08

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： FUJITA YASUHIRO

IPC: H04N9/73 ,  H04N9/32

CPC classification number: H04N9/73

Abstract: This specification discloses a color television receiver wherein the white balance controlling reference color illumination occurring in a portion of the fluorescent screen is passed through three primary-color filters so as to be separated into ''''red,'''' ''''green'''' and ''''blue'''' light rays which are irradiated onto photosensitive elements so that variations in the filtered light rays are converted to electrical quantities to be fed back to the video circuit, thereby directly or indirectly controlling the color reproduction signal voltage to be applied to the color picture tube.