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    Method of fabricating semiconductor device isolation structure
    61.
    发明授权
    Method of fabricating semiconductor device isolation structure 有权
    制造半导体器件隔离结构的方法

    公开(公告)号：US09224606B2

    公开(公告)日：2015-12-29

    申请号：US13336887

    申请日：2011-12-23

    申请人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Chu-Yun Fu ,  Ding-Yuan Chen

    发明人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Chu-Yun Fu ,  Ding-Yuan Chen

    IPC分类号： H01L21/76 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78

    CPC分类号： H01L21/76202 ,  H01L21/26506 ,  H01L21/26533 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/324 ,  H01L21/762 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/6659 ,  H01L29/7833

    摘要： A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.

    摘要翻译： 包括可折入隔离结构的半导体器件和用于制造这种器件的方法。 优选实施例包括形成至少一个隔离结构的半导体材料的衬底，该隔离结构具有折返轮廓并且隔离一个或多个相邻的操作部件。 至少一个隔离结构的折返轮廓由衬底材料形成，并且通过离子注入产生，优选地使用以多个不同角度和能级施加的氧离子。 在另一个实施方案中，本发明是形成用于进行至少一个氧离子注入的半导体器件的隔离结构的方法。

    Light-emitting diode with textured substrate
    64.
    发明授权
    Light-emitting diode with textured substrate 有权
    具纹理衬底的发光二极管

    公开(公告)号：US08659033B2

    公开(公告)日：2014-02-25

    申请号：US13267701

    申请日：2011-10-06

    申请人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu ,  Hung-Ta Lin

    发明人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu ,  Hung-Ta Lin

    IPC分类号： H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00

    CPC分类号： H01L33/22 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32

    摘要： A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

    摘要翻译： 提供了一种发光二极管（LED）装置。 LED装置已经凸起形成在基板上的半导体区域。 在凸起的半导体区域上形成LED结构，使得LED器件的底部接触层和有源层是保形层。 顶部接触层具有平坦的表面。 在一个实施例中，顶部接触层在多个凸起的半导体区域上是连续的，而底部接触层和有源层在相邻凸起的半导体区域之间是不连续的。

    Light-Emitting Diodes on Concave Texture Substrate
    65.
    发明申请
    Light-Emitting Diodes on Concave Texture Substrate 有权
    凹面纹理基板上的发光二极管

    公开(公告)号：US20120119236A1

    公开(公告)日：2012-05-17

    申请号：US13358327

    申请日：2012-01-25

    申请人： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    发明人： Chen-Hua Yu ,  Hung-Ta Lin ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu

    IPC分类号： H01L27/15 ,  H01L33/48

    CPC分类号： H01L33/48 ,  H01L33/20 ,  H01L33/24

    摘要： A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

    摘要翻译： 提供了一种形成在凹面纹理基板上的发光二极管（LED）的半导体器件。 对衬底进行图案化和蚀刻以形成凹陷。 沿着凹部的底部形成分离层。 沿着侧壁和任选地沿着相邻凹部之间的基板的表面形成LED结构。 在这些实施例中，与平面表面相比，LED结构的表面积增加。 在另一个实施例中，LED结构形成在凹部内，使得底部接触层与凹部的拓扑不一致。 在这些实施例中，硅衬底中的凹陷导致底接触层中的立方结构，例如具有非极性特性并且表现出更高外部量子效率的n-GaN层。

    Light-emitting diode integration scheme
    66.
    发明授权
    Light-emitting diode integration scheme 有权
    发光二极管集成方案

    公开(公告)号：US08058669B2

    公开(公告)日：2011-11-15

    申请号：US12535525

    申请日：2009-08-04

    申请人： Ding-Yuan Chen ,  Wen-Chih Chiou ,  Chen-Hua Yu

    发明人： Ding-Yuan Chen ,  Wen-Chih Chiou ,  Chen-Hua Yu

    IPC分类号： H01L33/00

    CPC分类号： H01L25/0753 ,  H01L33/642 ,  H01L33/647 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0206 ,  H05K1/113 ,  H05K2201/10106 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A circuit structure includes a carrier substrate, which includes a first through-via and a second through-via. Each of the first through-via and the second through-via extends from a first surface of the carrier substrate to a second surface of the carrier substrate opposite the first surface. The circuit structure further includes a light-emitting diode (LED) chip bonded onto the first surface of the carrier substrate. The LED chip includes a first electrode and a second electrode connected to the first through-via and the second through-via, respectively.

    摘要翻译： 电路结构包括载体基板，其包括第一通孔和第二通孔。 第一通孔和第二通孔中的每一个从载体衬底的第一表面延伸到与第一表面相对的载体衬底的第二表面。 电路结构还包括结合到载体基板的第一表面上的发光二极管（LED）芯片。 LED芯片包括分别连接到第一通孔和第二通孔的第一电极和第二电极。

    Light-emitting diode with textured substrate
    67.
    发明授权
    Light-emitting diode with textured substrate 有权
    具纹理衬底的发光二极管

    公开(公告)号：US08058082B2

    公开(公告)日：2011-11-15

    申请号：US12189635

    申请日：2008-08-11

    申请人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu ,  Hung-Ta Lin

    发明人： Chen-Hua Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Chia-Lin Yu ,  Hung-Ta Lin

    IPC分类号： H01L21/00

    CPC分类号： H01L33/22 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32

    摘要： A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

    摘要翻译： 提供了一种发光二极管（LED）装置。 LED装置已经凸起形成在基板上的半导体区域。 在凸起的半导体区域上形成LED结构，使得LED器件的底部接触层和有源层是保形层。 顶部接触层具有平坦的表面。 在一个实施例中，顶部接触层在多个凸起的半导体区域上是连续的，而底部接触层和有源层在相邻凸起的半导体区域之间是不连续的。

    III-nitride based semiconductor structure with multiple conductive tunneling layer
    69.
    发明授权
    III-nitride based semiconductor structure with multiple conductive tunneling layer 有权
    具有多个导电隧穿层的III族氮化物基半导体结构

    公开(公告)号：US08044409B2

    公开(公告)日：2011-10-25

    申请号：US12189562

    申请日：2008-08-11

    申请人： Chia-Lin Yu ,  Ding-Yuan Chen ,  Chen-Hua Yu ,  Wen-Chih Chiou

    发明人： Chia-Lin Yu ,  Ding-Yuan Chen ,  Chen-Hua Yu ,  Wen-Chih Chiou

    IPC分类号： H01L27/15

    CPC分类号： H01L33/04 ,  H01L33/12 ,  H01L33/32

    摘要： A semiconductor structure includes a substrate and a conductive carrier-tunneling layer over and contacting the substrate. The conductive carrier-tunneling layer includes first group-III nitride (III-nitride) layers having a first bandgap, wherein the first III-nitride layers have a thickness less than about 5 nm; and second III-nitride layers having a second bandgap lower than the first bandgap, wherein the first III-nitride layers and the second III-nitride layers are stacked in an alternating pattern. The semiconductor structure is free from a III-nitride layer between the substrate and the conductive carrier-tunneling layer. The semiconductor structure further includes an active layer over the conductive carrier-tunneling layer.

    摘要翻译： 半导体结构包括衬底和与衬底接触的导电载体隧穿层。 导电载体隧穿层包括具有第一带隙的第一III族氮化物（III族氮化物）层，其中第一III族氮化物层具有小于约5nm的厚度; 和具有比第一带隙低的第二带隙的第二III族氮化物层，其中第一III族氮化物层和第二III族氮化物层以交替图案堆叠。 半导体结构在衬底和导电载体 - 隧穿层之间不含III族氮化物层。 半导体结构还包括在导电载体 - 隧穿层上的有源层。